1. 12 Oct, 2022 19 commits
    • Youling Tang's avatar
      LoongArch: Add kexec support · 4a03b2ac
      Youling Tang authored
      Add three new files, kexec.h, machine_kexec.c and relocate_kernel.S to
      the LoongArch architecture, so as to add support for the kexec re-boot
      mechanism (CONFIG_KEXEC) on LoongArch platforms.
      
      Kexec supports loading vmlinux.elf in ELF format and vmlinux.efi in PE
      format.
      
      I tested kexec on LoongArch machines (Loongson-3A5000) and it works as
      expected:
      
       $ sudo kexec -l /boot/vmlinux.efi --reuse-cmdline
       $ sudo kexec -e
      Signed-off-by: default avatarYouling Tang <tangyouling@loongson.cn>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      4a03b2ac
    • Youling Tang's avatar
      LoongArch: Use generic BUG() handler · 2d2c3952
      Youling Tang authored
      Inspired by commit 9fb7410f("arm64/BUG: Use BRK instruction for
      generic BUG traps"), do similar for LoongArch to use generic BUG()
      handler.
      
      This patch uses the BREAK software breakpoint instruction to generate
      a trap instead, similarly to most other arches, with the generic BUG
      code generating the dmesg boilerplate.
      
      This allows bug metadata to be moved to a separate table and reduces
      the amount of inline code at BUG() and WARN() sites. This also avoids
      clobbering any registers before they can be dumped.
      
      To mitigate the size of the bug table further, this patch makes use of
      the existing infrastructure for encoding addresses within the bug table
      as 32-bit relative pointers instead of absolute pointers.
      
      (Note: this limits the max kernel size to 2GB.)
      
      Before patch:
      [ 3018.338013] lkdtm: Performing direct entry BUG
      [ 3018.342445] Kernel bug detected[#5]:
      [ 3018.345992] CPU: 2 PID: 865 Comm: cat Tainted: G D 6.0.0-rc6+ #35
      
      After patch:
      [  125.585985] lkdtm: Performing direct entry BUG
      [  125.590433] ------------[ cut here ]------------
      [  125.595020] kernel BUG at drivers/misc/lkdtm/bugs.c:78!
      [  125.600211] Oops - BUG[#1]:
      [  125.602980] CPU: 3 PID: 410 Comm: cat Not tainted 6.0.0-rc6+ #36
      
      Out-of-line file/line data information obtained compared to before.
      Signed-off-by: default avatarYouling Tang <tangyouling@loongson.cn>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      2d2c3952
    • Huacai Chen's avatar
      LoongArch: Add SysRq-x (TLB Dump) support · dea2df3c
      Huacai Chen authored
      Add SysRq-x (TLB Dump) support for LoongArch, which is useful for
      debugging.
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      dea2df3c
    • Huacai Chen's avatar
      LoongArch: Add perf events support · b37042b2
      Huacai Chen authored
      The perf events infrastructure of LoongArch is very similar to old MIPS-
      based Loongson, so most of the codes are derived from MIPS.
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      b37042b2
    • Huacai Chen's avatar
      LoongArch: Add qspinlock support · 5f1e001b
      Huacai Chen authored
      On NUMA system, the performance of qspinlock is better than generic
      spinlock. Below is the UnixBench test results on a 8 nodes (4 cores
      per node, 32 cores in total) machine.
      
      A. With generic spinlock:
      
      System Benchmarks Index Values               BASELINE       RESULT    INDEX
      Dhrystone 2 using register variables         116700.0  449574022.5  38523.9
      Double-Precision Whetstone                       55.0      85190.4  15489.2
      Execl Throughput                                 43.0      14696.2   3417.7
      File Copy 1024 bufsize 2000 maxblocks          3960.0     143157.8    361.5
      File Copy 256 bufsize 500 maxblocks            1655.0      37631.8    227.4
      File Copy 4096 bufsize 8000 maxblocks          5800.0     444814.2    766.9
      Pipe Throughput                               12440.0    5047490.7   4057.5
      Pipe-based Context Switching                   4000.0    2021545.7   5053.9
      Process Creation                                126.0      23829.8   1891.3
      Shell Scripts (1 concurrent)                     42.4      33756.7   7961.5
      Shell Scripts (8 concurrent)                      6.0       4062.9   6771.5
      System Call Overhead                          15000.0    2479748.6   1653.2
                                                                         ========
      System Benchmarks Index Score                                        2955.6
      
      B. With qspinlock:
      
      System Benchmarks Index Values               BASELINE       RESULT    INDEX
      Dhrystone 2 using register variables         116700.0  449467876.9  38514.8
      Double-Precision Whetstone                       55.0      85174.6  15486.3
      Execl Throughput                                 43.0      14769.1   3434.7
      File Copy 1024 bufsize 2000 maxblocks          3960.0     146150.5    369.1
      File Copy 256 bufsize 500 maxblocks            1655.0      37496.8    226.6
      File Copy 4096 bufsize 8000 maxblocks          5800.0     447527.0    771.6
      Pipe Throughput                               12440.0    5175989.2   4160.8
      Pipe-based Context Switching                   4000.0    2207747.8   5519.4
      Process Creation                                126.0      25125.5   1994.1
      Shell Scripts (1 concurrent)                     42.4      33461.2   7891.8
      Shell Scripts (8 concurrent)                      6.0       4024.7   6707.8
      System Call Overhead                          15000.0    2917278.6   1944.9
                                                                         ========
      System Benchmarks Index Score                                        3040.1
      Signed-off-by: default avatarRui Wang <wangrui@loongson.cn>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      5f1e001b
    • Huacai Chen's avatar
      LoongArch: Use TLB for ioremap() · d2791341
      Huacai Chen authored
      We can support more cache attributes (e.g., CC, SUC and WUC) and page
      protection when we use TLB for ioremap(). The implementation is based
      on GENERIC_IOREMAP.
      
      The existing simple ioremap() implementation has better performance so
      we keep it and introduce ARCH_IOREMAP to control the selection.
      
      We move pagetable_init() earlier to make early ioremap() works, and we
      modify the PCI ecam mapping because the TLB-based version of ioremap()
      will actually take the size into account.
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      d2791341
    • Huacai Chen's avatar
      LoongArch: Support access filter to /dev/mem interface · 235d074f
      Huacai Chen authored
      Accidental access to /dev/mem is obviously disastrous, but specific
      access can be used by people debugging the kernel. So select GENERIC_
      LIB_DEVMEM_IS_ALLOWED, as well as define ARCH_HAS_VALID_PHYS_ADDR_RANGE
      and related helpers, to support access filter to /dev/mem interface.
      Signed-off-by: default avatarWeihao Li <liweihao@loongson.cn>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      235d074f
    • Huacai Chen's avatar
      LoongArch: Refactor cache probe and flush methods · b61a40af
      Huacai Chen authored
      Current cache probe and flush methods have some drawbacks:
      1, Assume there are 3 cache levels and only 3 levels;
      2, Assume L1 = I + D, L2 = V, L3 = S, V is exclusive, S is inclusive.
      
      However, the fact is I + D, I + D + V, I + D + S and I + D + V + S are
      all valid. So, refactor the cache probe and flush methods to adapt more
      types of cache hierarchy.
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      b61a40af
    • Rui Wang's avatar
      LoongArch: mm: Refactor TLB exception handlers · a2a84e36
      Rui Wang authored
      This patch simplifies TLB load, store and modify exception handlers:
      
      1. Reduce instructions, such as alu/csr and memory access;
      2. Execute tlb search instruction only in the fast path;
      3. Return directly from the fast path for both normal and huge pages;
      4. Re-tab the assembly for better vertical alignment.
      
      And fixes the concurrent modification issue of fast path for huge pages.
      
      This issue will occur in the following steps:
      
         CPU-1 (In TLB exception)         CPU-2 (In THP splitting)
      1: Load PMD entry (HUGE=1)
      2: Goto huge path
      3:                                  Store PMD entry (HUGE=0)
      4: Reload PMD entry (HUGE=0)
      5: Fill TLB entry (PA is incorrect)
      
      This patch also slightly improves the TLB processing performance:
      
      * Normal pages: 2.15%, Huge pages: 1.70%.
      
        #include <stdio.h>
        #include <stdlib.h>
        #include <unistd.h>
        #include <sys/mman.h>
      
        int main(int argc, char *argv[])
        {
              size_t page_size;
              size_t mem_size;
              size_t off;
              void *base;
              int flags;
              int i;
      
              if (argc < 2) {
                      fprintf(stderr, "%s MEM_SIZE [HUGE]\n", argv[0]);
                      return -1;
              }
      
              page_size = sysconf(_SC_PAGESIZE);
              flags = MAP_PRIVATE | MAP_ANONYMOUS;
              mem_size = strtoul(argv[1], NULL, 10);
              if (argc > 2)
                      flags |= MAP_HUGETLB;
      
              for (i = 0; i < 10; i++) {
                      base = mmap(NULL, mem_size, PROT_READ, flags, -1, 0);
                      if (base == MAP_FAILED) {
                              fprintf(stderr, "Map memory failed!\n");
                              return -1;
                      }
      
                      for (off = 0; off < mem_size; off += page_size)
                              *(volatile int *)(base + off);
      
                      munmap(base, mem_size);
              }
      
              return 0;
        }
      Signed-off-by: default avatarRui Wang <wangrui@loongson.cn>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      a2a84e36
    • Xi Ruoyao's avatar
      LoongArch: Support R_LARCH_GOT_PC_{LO12,HI20} in modules · 59b3d4a9
      Xi Ruoyao authored
      GCC >= 13 and GNU assembler >= 2.40 use these relocations to address
      external symbols, so we need to add them.
      
      Let the module loader emit GOT entries for data symbols so we would be
      able to handle GOT relocations. The GOT entry is just the data's symbol
      address.
      
      In module.lds, emit a stub .got section for a section header entry. The
      actual content of the section entry will be filled at runtime by module_
      frob_arch_sections().
      Tested-by: default avatarWANG Xuerui <git@xen0n.name>
      Signed-off-by: default avatarXi Ruoyao <xry111@xry111.site>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      59b3d4a9
    • Xi Ruoyao's avatar
      LoongArch: Support PC-relative relocations in modules · 9bd1e380
      Xi Ruoyao authored
      Binutils >= 2.40 uses R_LARCH_B26 instead of R_LARCH_SOP_PUSH_PLT_PCREL,
      and R_LARCH_PCALA* instead of R_LARCH_SOP_PUSH_PCREL.
      
      Handle R_LARCH_B26 and R_LARCH_PCALA* in the module loader. For R_LARCH_
      B26, also create a PLT entry as needed.
      Tested-by: default avatarWANG Xuerui <git@xen0n.name>
      Signed-off-by: default avatarXi Ruoyao <xry111@xry111.site>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      9bd1e380
    • Xi Ruoyao's avatar
      LoongArch: Define ELF relocation types added in ABIv2.0 · 0a75e5d1
      Xi Ruoyao authored
      These relocation types are used by GNU binutils >= 2.40 and GCC >= 13.
      Add their definitions so we will be able to use them in later patches.
      
      Link: https://github.com/loongson/LoongArch-Documentation/pull/57Tested-by: default avatarWANG Xuerui <git@xen0n.name>
      Signed-off-by: default avatarXi Ruoyao <xry111@xry111.site>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      0a75e5d1
    • Xi Ruoyao's avatar
      LoongArch: Adjust symbol addressing for AS_HAS_EXPLICIT_RELOCS · 11cd8a64
      Xi Ruoyao authored
      If explicit relocation hints are used by the toolchain, -Wa,-mla-*
      options will be useless for the C code. So only use them for the
      !CONFIG_AS_HAS_EXPLICIT_RELOCS case.
      
      Replace "la" with "la.pcrel" in head.S to keep the semantic consistent
      with new and old toolchains for the low level startup code.
      
      For per-CPU variables, the "address" of the symbol is actually an offset
      from $r21. The value is near the loading address of main kernel image,
      but far from the loading address of modules. So we use model("extreme")
      attibute to tell the compiler that a PC-relative addressing with 32-bit
      offset is not sufficient for local per-CPU variables.
      
      The behavior with different assemblers and compilers are summarized in
      the following table:
      
      AS has            CC has
      explicit relocs   explicit relocs * Behavior
      ==============================================================
      No                No                Use la.* macros.
                                          No change from Linux 6.0.
      --------------------------------------------------------------
      No                Yes               Disable explicit relocs.
                                          No change from Linux 6.0.
      --------------------------------------------------------------
      Yes               No                Not supported.
      --------------------------------------------------------------
      Yes               Yes               Enable explicit relocs.
                                          No -Wa,-mla* options used.
      ==============================================================
      *: We assume CC must have model attribute if it has explicit relocs.
         Both features are added in GCC 13 development cycle, so any GCC
         release >= 13 should be OK. Using early GCC 13 development snapshots
         may produce modules with unsupported relocations.
      
      Link: https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=f09482a
      Link: https://gcc.gnu.org/r13-1834
      Link: https://gcc.gnu.org/r13-2199Tested-by: default avatarWANG Xuerui <git@xen0n.name>
      Signed-off-by: default avatarXi Ruoyao <xry111@xry111.site>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      11cd8a64
    • Xi Ruoyao's avatar
      LoongArch: Add Kconfig option AS_HAS_EXPLICIT_RELOCS · 0d8dad70
      Xi Ruoyao authored
      GNU as >= 2.40 and GCC >= 13 will support using explicit relocation
      hints in the assembly code, instead of la.* macros. The usage of
      explicit relocation hints can improve code generation so it's enabled
      by default by GCC >= 13.
      
      Introduce a Kconfig option AS_HAS_EXPLICIT_RELOCS as the switch for
      "use explicit relocation hints or not".
      Tested-by: default avatarWANG Xuerui <git@xen0n.name>
      Signed-off-by: default avatarXi Ruoyao <xry111@xry111.site>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      0d8dad70
    • Colin Ian King's avatar
      LoongArch: Kconfig: Fix spelling mistake "delibrately" -> "deliberately" · 9550dfde
      Colin Ian King authored
      There is a spelling mistake in a commented section. Fix it.
      Signed-off-by: default avatarColin Ian King <colin.i.king@gmail.com>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      9550dfde
    • Huacai Chen's avatar
      LoongArch: Mark __xchg() and __cmpxchg() as __always_inline · ddf50271
      Huacai Chen authored
      Commit ac7c3e4f ("compiler: enable CONFIG_OPTIMIZE_INLINING
      forcibly") allows compiler to uninline functions marked as 'inline'.
      In case of __xchg()/__cmpxchg() this would cause to reference
      BUILD_BUG(), which is an error case for catching bugs and will not
      happen for correct code, if __xchg()/__cmpxchg() is inlined.
      
      This bug can be produced with CONFIG_DEBUG_SECTION_MISMATCH enabled,
      and the solution is similar to below commits:
      46f16195 ("MIPS: include: Mark __xchg as __always_inline"),
      88356d09 ("MIPS: include: Mark __cmpxchg as __always_inline").
      Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      ddf50271
    • Huacai Chen's avatar
      LoongArch: Flush TLB earlier at initialization · 1299a129
      Huacai Chen authored
      Move local_flush_tlb_all() earlier (just after setup_ptwalker() and
      before page allocation). This can avoid stale TLB entries misguiding
      the later page allocation. Without this patch the second kernel of
      kexec/kdump fails to boot SMP.
      
      BTW, move output_pgtable_bits_defines() into tlb_init() since it has
      nothing to do with tlb handler setup.
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      1299a129
    • Tiezhu Yang's avatar
      LoongArch: Do not create sysfs control file for io master CPUs · a522b7ad
      Tiezhu Yang authored
      Now io master CPUs are not hotpluggable on LoongArch, but in the current
      code only /sys/devices/system/cpu/cpu0/online is not created. Let us set
      the hotpluggable field of all the io master CPUs as 0, then prevent to
      create sysfs control file for all the io master CPUs which confuses some
      user space tools. This is similar with commit 9cce844a ("MIPS: CPU#0
      is not hotpluggable").
      Signed-off-by: default avatarTiezhu Yang <yangtiezhu@loongson.cn>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      a522b7ad
    • Jianmin Lv's avatar
      LoongArch: Fix cpu name after CPU-hotplug · 4b2edd38
      Jianmin Lv authored
      Don't overwrite the SMBIOS-provided CPU name on coming back from CPU-
      hotplug (including S3/S4) if it is already initialized.
      Reviewed-by: default avatarWANG Xuerui <git@xen0n.name>
      Signed-off-by: default avatarJianmin Lv <lvjianmin@loongson.cn>
      Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
      4b2edd38
  2. 03 Oct, 2022 1 commit
  3. 02 Oct, 2022 4 commits
  4. 01 Oct, 2022 9 commits
  5. 30 Sep, 2022 7 commits
    • Linus Torvalds's avatar
      Merge tag 'drm-fixes-2022-10-01' of git://anongit.freedesktop.org/drm/drm · ffb4d94b
      Linus Torvalds authored
      Pull drm fixes from Daniel Vetter:
       "Some last minute amd fixes:
      
         - VCN 4.x and GC 11.x fixes, mostly around fw"
      
      * tag 'drm-fixes-2022-10-01' of git://anongit.freedesktop.org/drm/drm:
        drm/amdgpu/gfx11: switch to amdgpu_gfx_rlc_init_microcode
        drm/amdgpu: add helper to init rlc firmware
        drm/amdgpu: add helper to init rlc fw in header v2_4
        drm/amdgpu: add helper to init rlc fw in header v2_3
        drm/amdgpu: add helper to init rlc fw in header v2_2
        drm/amdgpu: add helper to init rlc fw in header v2_1
        drm/amdgpu: add helper to init rlc fw in header v2_0
        drm/amdgpu: save rlcv/rlcp ucode version in amdgpu_gfx
        drm/amdgpu: Enable sram on vcn_4_0_2
        drm/amdgpu: Enable VCN DPG for GC11_0_1
      ffb4d94b
    • Linus Torvalds's avatar
      Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux · e5fa173f
      Linus Torvalds authored
      Pull clk driver fixes from Stephen Boyd:
       "Here's the last batch of clk driver fixes for this release.
      
        These patches fix serious problems, for example, i.MX has an issue
        where changing the NAND clk frequency hangs the system. On Allwinner
        H6 the GPU is being overclocked which could lead to long term hardware
        damage.
      
        And finally on some Broadcom SoCs the serial console stopped working
        because the clk tree hierarchy description got broken by an
        inadvertant DT node name change. That's fixed by using
        'clock-output-names' to generate a stable and unique name for clks so
        the framework can properly link things up.
      
        There's also a couple build fixes in here. One to fix CONFIG_OF=n
        builds and one to avoid an array out of bounds bug that happens during
        clk registration on microchip. I hope that KASAN would have found that
        OOB problem, but probably KASAN wasn't attempted. Instead LLVM/clang
        compilation caused an oops, while GCC didn't"
      
      * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
        clk: imx93: drop of_match_ptr
        clk: iproc: Do not rely on node name for correct PLL setup
        clk: sunxi-ng: h6: Fix default PLL GPU rate
        clk: imx: imx6sx: remove the SET_RATE_PARENT flag for QSPI clocks
        clk: microchip: mpfs: make the rtc's ahb clock critical
        clk: microchip: mpfs: fix clk_cfg array bounds violation
        clk: ingenic-tcu: Properly enable registers before accessing timers
      e5fa173f
    • Linus Torvalds's avatar
      Merge tag 'perf-tools-fixes-for-v6.0-2022-09-29' of... · c816f2e9
      Linus Torvalds authored
      Merge tag 'perf-tools-fixes-for-v6.0-2022-09-29' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux
      
      Pull perf tools fixes from Arnaldo Carvalho de Melo:
      
       - Fail the 'perf test record' entry on error, fixing a regression where
         just setup stuff like allocating memory and not the actual things
         being tested failed.
      
       - Fixup disabling of -Wdeprecated-declarations for the python scripting
         engine, the previous attempt had a brown paper bag thinko.
      
       - Fix branch stack sampling test to include sanity check for branch
         filter on PowerPC.
      
       - Update is_ignored_symbol function to match the kernel ignored list,
         fixing running the 'perf test' entry that compares resolving symbols
         from kallsyms to resolving from vmlinux.
      
       - Augment the data source type with ARM's neoverse_spe list, the
         previous code was limited in its search resolving the data source.
      
       - Fix some clang 5 variable set but unused cases.
      
       - Get a perf cgroup more portably in BPF as the
         __builtin_preserve_enum_value builtin is not available in older
         versions of clang. In those cases we can forgo BPF's CO-RE (Compile
         Once, Run Everywhere).
      
       - More Fixes for Intel's hybrid CPU model.
      
      * tag 'perf-tools-fixes-for-v6.0-2022-09-29' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux:
        perf build: Fixup disabling of -Wdeprecated-declarations for the python scripting engine
        perf tests mmap-basic: Remove unused variable to address clang 15 warning
        perf parse-events: Ignore clang 15 warning about variable set but unused in bison produced code
        perf tests record: Fail the test if the 'errs' counter is not zero
        perf test: Fix test case 87 ("perf record tests") for hybrid systems
        perf arm-spe: augment the data source type with neoverse_spe list
        perf tests vmlinux-kallsyms: Update is_ignored_symbol function to match the kernel ignored list
        perf tests powerpc: Fix branch stack sampling test to include sanity check for branch filter
        perf parse-events: Remove "not supported" hybrid cache events
        perf print-events: Fix "perf list" can not display the PMU prefix for some hybrid cache events
        perf tools: Get a perf cgroup more portably in BPF
      c816f2e9
    • Linus Torvalds's avatar
      Merge tag 'for-linus-6.0' of git://git.kernel.org/pub/scm/virt/kvm/kvm · 920541bb
      Linus Torvalds authored
      Pull kvm fixes from Paolo Bonzini:
       "A small fix to the reported set of supported CPUID bits, and selftests
        fixes:
      
         - Skip tests that require EPT when it is not available
      
         - Do not hang when a test fails with an empty stack trace
      
         - avoid spurious failure when running access_tracking_perf_test in a
           KVM guest
      
         - work around GCC's tendency to optimize loops into mem*() functions,
           which breaks because the guest code in selftests cannot call into
           PLTs
      
         - fix -Warray-bounds error in fix_hypercall_test"
      
      * tag 'for-linus-6.0' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
        KVM: selftests: Compare insn opcodes directly in fix_hypercall_test
        KVM: selftests: Implement memcmp(), memcpy(), and memset() for guest use
        KVM: x86: Hide IA32_PLATFORM_DCA_CAP[31:0] from the guest
        KVM: selftests: Gracefully handle empty stack traces
        KVM: selftests: replace assertion with warning in access_tracking_perf_test
        KVM: selftests: Skip tests that require EPT when it is not available
      920541bb
    • Daniel Vetter's avatar
      Merge tag 'amd-drm-fixes-6.0-2022-09-30-1' of... · 414208e4
      Daniel Vetter authored
      Merge tag 'amd-drm-fixes-6.0-2022-09-30-1' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes
      
      amd-drm-fixes-6.0-2022-09-30-1:
      
      amdgpu:
      - VCN 4.x fixes
      - RLC fixes for GC 11.x
      Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      From: Alex Deucher <alexander.deucher@amd.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20220930210454.542719-1-alexander.deucher@amd.com
      414208e4
    • Hawking Zhang's avatar
      drm/amdgpu/gfx11: switch to amdgpu_gfx_rlc_init_microcode · 0fd85e89
      Hawking Zhang authored
      switch to common helper to initialize rlc firmware
      for gfx11
      Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
      Acked-by: default avatarChristian König <christian.koenig@amd.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      0fd85e89
    • Hawking Zhang's avatar
      drm/amdgpu: add helper to init rlc firmware · 04fa38cc
      Hawking Zhang authored
      To initialzie rlc firmware according to rlc
      firmware header version
      
      v2: squash in backwards compat fix
      Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
      Acked-by: default avatarChristian König <christian.koenig@amd.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      04fa38cc