- 25 Jul, 2022 40 commits
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Alvin Lee authored
[Description] - Calculation for NumWays in MALL should be based on number of MBlks Reviewed-by:
Jun Lei <Jun.Lei@amd.com> Acked-by:
Alex Hung <alex.hung@amd.com> Signed-off-by:
Alvin Lee <Alvin.Lee2@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Samson Tam authored
[Why] In single display ODM combine mode, two MPO videos ( three planes ) are not working [How] When we detect three planes, don't set odm combine 2to1 policy for the MPO planes. Otherwise, we run out of pipes available Add support for two MPO videos in dc_add_plane_to_context(). Don't allow both videos to be on the same side of the display. Add extra check when fetching free pipe for two MPO videos. Reviewed-by:
Samson Tam <Samson.Tam@amd.com> Tested-by:
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Nicholas Kazlauskas authored
[Why] If BIOS doesn't specify number of memory channels then bandwidth validation will fail due to insufficient BW in DML. [How] If BIOS is setting zero channels then use the default in the table. If no entry is in the table and no BIOS value is specified then throw an ASSERT for future developers to look into. Reviewed-by:
Michael Strauss <Michael.Strauss@amd.com> Acked-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by:
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Alvin Lee authored
[Description] - For any DRR cases in SubVP, don't lock for VSYNC flips - For DCN32/321 use FW to do DRR manual trigger programming - Add bit in SubVP cmd to indicate if the SubVP pipe is DRR Reviewed-by:
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Nicholas Kazlauskas authored
[Why] Access violation occurs when swapping between HDMI and FRL monitors because we're missing the immediate_disable_crtc callback and it's required for the DCN314 clk manager. [How] Update the table to match the DCN31 optc functions for ones that should be the same: - immediate_disable_crtc - configure_crc Reviewed-by:
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Nicholas Kazlauskas authored
[Why] We don't write out attributes after disabling and re-enabling the link on some monitors, causing some, but not all, HDMI displays to fail to lightup on DCN314. [How] Firmware used to do this after DIG link setup. Since firmware is no longer doing this to support USB4 and dynamic link remapping we'll need to add this to driver in the equivalent paths. New optional callbacks were created in the stream encoder interface and implementations were added for DCN314. Reviewed-by:
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Aric Cyr authored
[why] In some cases MPC tree bottom pipe ends up point to itself. This causes iterating from top to bottom to hang the system in an infinite loop. [how] When looping to next MPC bottom pipe, check that the pointer is not same as current to avoid infinite loop. Reviewed-by:
Josip Pavic <Josip.Pavic@amd.com> Reviewed-by:
Aric Cyr <aric.cyr@amd.com> Tested-by:
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Aaron Liu authored
Enable swiotlb for gmc 11.0. Signed-off-by:
Aaron Liu <aaron.liu@amd.com> Reviewed-by:
Huang Rui <ray.huang@amd.com> Signed-off-by:
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Aaron Liu authored
Enable swiotlb for gmc 10.0. v2: include drm_cache.h to use the function ‘drm_need_swiotlb’ Signed-off-by:
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Slark Xiao authored
Replace 'the the' with 'the' in the comment. Signed-off-by:
Slark Xiao <slark_xiao@163.com> Signed-off-by:
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Alex Deucher authored
Move stack variables to dummy structure. Reviewed-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by:
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Alex Deucher authored
Move stack variables to dummy structure. Reviewed-by:
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Alex Deucher authored
Move stack variables to dummy structure. Reviewed-by:
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Alex Deucher authored
Move stack variables to dummy structure. Reviewed-by:
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Alex Deucher authored
Move additional dummy structures off the stack and into the dummy vars structure. Fixes the following: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c: In function 'DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation': drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:1659:1: error: the frame size of 2144 bytes is larger than 2048 bytes [-Werror=frame-larger-than=] 1659 | } | ^ drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c: In function 'dml32_ModeSupportAndSystemConfigurationFull': drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:3799:1: error: the frame size of 2464 bytes is larger than 2048 bytes [-Werror=frame-larger-than=] 3799 | } // ModeSupportAndSystemConfigurationFull | ^ v2: move more stuff to dummy structure, fix init order (Alex) Acked-by:Christian König <christian.koenig@amd.com> Reviewed-by:
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Philip Yang authored
Move process queues cleanup to deferred work kfd_process_wq_release, to avoid potential deadlock circular locking warning: WARNING: possible circular locking dependency detected the existing dependency chain (in reverse order) is: -> #2 ((work_completion)(&svms->deferred_list_work)){+.+.}-{0:0}: __flush_work+0x343/0x4a0 svm_range_list_lock_and_flush_work+0x39/0xc0 svm_range_set_attr+0xe8/0x1080 [amdgpu] kfd_ioctl+0x19b/0x600 [amdgpu] __x64_sys_ioctl+0x81/0xb0 do_syscall_64+0x34/0x80 entry_SYSCALL_64_after_hwframe+0x44/0xae -> #1 (&info->lock#2){+.+.}-{3:3}: __mutex_lock+0xa4/0x940 amdgpu_amdkfd_gpuvm_acquire_process_vm+0x2e3/0x590 kfd_process_device_init_vm+0x61/0x200 [amdgpu] kfd_ioctl_acquire_vm+0x83/0xb0 [amdgpu] kfd_ioctl+0x19b/0x600 [amdgpu] __x64_sys_ioctl+0x81/0xb0 do_syscall_64+0x34/0x80 entry_SYSCALL_64_after_hwframe+0x44/0xae -> #0 (&process->mutex){+.+.}-{3:3}: __lock_acquire+0x1365/0x23d0 lock_acquire+0xc9/0x2e0 __mutex_lock+0xa4/0x940 kfd_process_notifier_release+0x96/0xe0 [amdgpu] __mmu_notifier_release+0x94/0x210 exit_mmap+0x35/0x1f0 mmput+0x63/0x120 svm_range_deferred_list_work+0x177/0x2c0 [amdgpu] process_one_work+0x2a4/0x600 worker_thread+0x39/0x3e0 kthread+0x16d/0x1a0 Possible unsafe locking scenario: CPU0 CPU1 ---- ---- lock((work_completion)(&svms->deferred_list_work)); lock(&info->lock#2); lock((work_completion)(&svms->deferred_list_work)); lock(&process->mutex); Signed-off-by:Philip Yang <Philip.Yang@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Philip Yang authored
If process has signal pending, mmu_notifier_get_locked fails and calls ops->free_notifier, kfd_process_free_notifier will schedule kfd_process_wq_release as process refcount is 1, but process structure is already freed. This use after free bug causes system crash with different backtrace. The fix is to increase process refcount and then decrease the refcount after mmu_notifier_get success. Signed-off-by:
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Roman Li authored
Use same modifiers as for AMDGPU_FAMILY_GC_11_0_0 Signed-off-by:
Roman Li <roman.li@amd.com> Reviewed-by:
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Roman Li authored
[Why] While parsing dc_version redundant check leads to invalid dc_version for dcn314. [How] Remove redundant check Fixes: ee7b62e1 ("drm/amd/display: Enable DCN314 in DC") Signed-off-by:
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Melissa Wen authored
The -mno-gnu-attribute option in dcn301 clk mgr makefile hides a soft vs hard fp error for powerpc. After removing this flag, we can see some FPU code remains there: gcc-11.3.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o uses hard float, drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.o uses soft float Therefore, remove the -mno-gnu-attribute flag for dcn301/powerpc and move FPU-associated code to DML folder. Signed-off-by:
Melissa Wen <mwen@igalia.com> Reviewed-by:
Maíra Canal <mairacanal@riseup.net> Reviewed-by:
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Melissa Wen authored
The -mno-gnu-attribute option in clk mgr makefile for dcn30 hides a soft vs hard fp error for powerpc. After removing this flag, we can see some FPU code remains there: gcc-11.3.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o uses hard float, drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.o uses soft float Therefore, remove the -mno-gnu-attribute flag for dcn30/powerpc and move FPU-associated code to DML folder. Signed-off-by:
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Melissa Wen authored
The -mno-gnu-attribute option in dcn21 clk mgr makefile hides a soft vs hard fp error for powerpc. After removing this flag, we can see some FPU code remains there: /gcc-11.3.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o uses hard float, drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn21/rn_clk_mgr.o uses soft float Therefore, remove the -mno-gnu-attribute flag for dcn21/powerpc and move FPU-associated code to DML folder. Signed-off-by:
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Melissa Wen authored
Many lines of code in dcn31_resource_construct are wrapped by DC_FP macro to protect FPU operations; however, there is no FPU in this region. Therefore, just remove the wrapper for clarity. Signed-off-by:
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Melissa Wen authored
Move remaining FPU code to DML folder that caused compilation error for powerpc. This patch depends on [1] to prevent the error below: /gcc-11.3.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o uses hard float, drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.o uses soft float /gcc-11.3.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld: failed to merge target specific data of file drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.o /gcc-11.3.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o uses hard float, drivers/gpu/drm/amd/amdgpu/../display/dc/dcn315/dcn315_resource.o uses soft float /gcc-11.3.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld: failed to merge target specific data of file drivers/gpu/drm/amd/amdgpu/../display/dc/dcn315/dcn315_resource.o /gcc-11.3.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o uses hard float, drivers/gpu/drm/amd/amdgpu/../display/dc/dcn316/dcn316_resource.o uses soft float /gcc-11.3.0-nolibc/powerpc64-linux/bin/powerpc64-linux-ld: failed to merge target specific data of file drivers/gpu/drm/amd/amdgpu/../display/dc/dcn316/dcn316_resource.o [1] https://lore.kernel.org/amd-gfx/20220716195144.342960-1-mwen@igalia.com/Reported-by:
Guenter Roeck <linux@roeck-us.net> Signed-off-by:
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Aric Cyr authored
This version brings along following fixes: - Isolate FPU operation for DCN32/321 under the DML folder - Create a specific file for CRTC and plane based on amdgpu_dm - Fix DSC issues - Update DML logic Acked-by:
Alan Liu <HaoPing.Liu@amd.com> Signed-off-by:
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Rodrigo Siqueira authored
This commit fully move the missing FPU operations from dcn321 resource to dcn321 fpu. It also remove those FPU flags from the Makefile. Tested-by:
Harry Wentland <Harry.Wentland@amd.com> Signed-off-by:
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Rodrigo Siqueira authored
The file dcn321_resource has a lot of FPU operations that should be inside the dml folder. This commit introduces the dcn321_fpu file and moves some of the FPU operation functions to this new file. Tested-by:
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Rodrigo Siqueira authored
This is the final commit from the FPU isolation for DCN32 and for this reason we can finally remove flags related to FPU. Tested-by:
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Rodrigo Siqueira authored
The final part of the DCN32 code that uses FPU is the bounding box code, and this commit move it to dcn32_fpu. Tested-by:
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Rodrigo Siqueira authored
Move get_optimal_ntuple to the FPU code and call it inside insert_entry_into_table_sorted. Tested-by:
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Rodrigo Siqueira authored
Move dlg params calculation to the FPU folder and make it static. Tested-by:
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Rodrigo Siqueira authored
Move dcn32_calculate_wm_and_dlg from dcn32 resources to the FPU code. Additionally, this commit adds an interface to it. Tested-by:
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Rodrigo Siqueira authored
It looks like many of the code related to SubVP uses FPU operation, and we have many static functions that are part of this feature. This commit is a little bit large, but it only moves SubVP operation from one file to another, and I had to do it in a single change due to dependencies between functions. Tested-by:
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Rodrigo Siqueira authored
This commit moves phanton FPU stream to dcn32_fpu file. Tested-by:
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Rodrigo Siqueira authored
The insert_entry_into_table_sorted function uses FPU operation and calls other static functions support. This commit moves the insert entry function with all the required struct and static functions to the FPU file. Tested-by:
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Rajneesh Bhardwaj authored
This simplifies existing coherence handling for Arcturus and Aldabaran to account for !coherent && uncached scenarios. Reviewed-by:
Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by:
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Chengming Gui authored
Support {GLOBAL/SE0/SE1/SE2/SE3}_TAP_DELAYS uploading. v2: upload TAP_DELAYS before RLC autoload was triggered. (Hawking) Signed-off-by:Chengming Gui <Jack.Gui@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Evan Quan authored
The current approach breaks S3/S4 as asic reset is needed for them. And putting SMU out of service(via SMU_MSG_PrepareMp1ForUnload) will make that(asic reset) failed. Considering with current designs, there is actually also asic reset involved on driver reloading. That can make asic back to a clean state. So, the SMU_MSG_PrepareMp1ForUnload operation will be not so necessary. Thus we will just drop the SMU_MSG_PrepareMp1ForUnload operation. We may revise the whole driver reloading sequences when there is a better design. Fixes: 72aeb6ee ("drm/amd/pm: fix driver reload SMC firmware fail issue for smu13") Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
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Evan Quan authored
Only PP_MP1_STATE_UNLOAD is supported for now. For other mp1 state, we should just ignore it. Otherwise, there will be errors coming out. Signed-off-by:
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Evan Quan authored
To fit the latest 78.49.0 PMFW. Also, bump the version to 0x2B. Signed-off-by:
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