- 20 Jun, 2017 1 commit
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git://anongit.freedesktop.org/tegra/linuxDave Airlie authored
drm/tegra: Changes for v4.13-rc1 This starts off with the addition of more documentation for the host1x and DRM drivers and finishes with a slew of fixes and enhancements for the staging IOCTLs as a result of the awesome work done by Dmitry and Erik on the grate reverse-engineering effort. * tag 'drm/tegra/for-4.13-rc1' of git://anongit.freedesktop.org/tegra/linux: gpu: host1x: At first try a non-blocking allocation for the gather copy gpu: host1x: Refactor channel allocation code gpu: host1x: Remove unused host1x_cdma_stop() definition gpu: host1x: Remove unused 'struct host1x_cmdbuf' gpu: host1x: Check waits in the firewall gpu: host1x: Correct swapped arguments in the is_addr_reg() definition gpu: host1x: Forbid unrelated SETCLASS opcode in the firewall gpu: host1x: Forbid RESTART opcode in the firewall gpu: host1x: Forbid relocation address shifting in the firewall gpu: host1x: Do not leak BO's phys address to userspace gpu: host1x: Correct host1x_job_pin() error handling gpu: host1x: Initialize firewall class to the job's one drm/tegra: dc: Disable plane if it is invisible drm/tegra: dc: Apply clipping to the plane drm/tegra: dc: Avoid reset asserts on Tegra20 drm/tegra: Check syncpoint ID in the 'submit' IOCTL drm/tegra: Correct copying of waitchecks and disable them in the 'submit' IOCTL drm/tegra: Check for malformed offsets and sizes in the 'submit' IOCTL drm/tegra: Add driver documentation gpu: host1x: Flesh out kerneldoc
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- 16 Jun, 2017 5 commits
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Dave Airlie authored
Linux 4.12-rc5 for nouveau fixes
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git://git.pengutronix.de/git/pza/linuxDave Airlie authored
imx-drm: cleanups and YUV 4:2:0 memory read/write reduction support - Remove counter load enable form PRE, which has no effect. - Add support for setting the double read/write reduction flag in channel parameter memory. This can be used to save some memory bandwidth when capturing in YUV 4:2:0 chroma subsampled formats. - Allocate DMA channel structures as needed, most of the 64 channels are unused or even reserved. - Remove unused interrupt busy waiting routine. - Set VDIC field order for both AUTO and MAN inputs simultaneously as both can't be active at the same time. * tag 'imx-drm-next-2017-06-08' of git://git.pengutronix.de/git/pza/linux: gpu: ipu-v3: vdic: include AUTO field order bit in ipu_vdi_set_field_order gpu: ipu-v3: remove interrupt busy waiting routine gpu: ipu-v3: allocate ipuv3_channels as needed gpu: ipu-v3: Add support for double read/write reduction gpu: ipu-v3: prg: remove counter load enable
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http://git.agner.ch/git/linux-drm-fsl-dcuDave Airlie authored
some fsl-dcu cleanups * tag 'drm-fsl-dcu-for-v4.13' of http://git.agner.ch/git/linux-drm-fsl-dcu: drm/fsl-dcu: use new drm_atomic_helper_shutdown drm/fsl-dcu: implement irq_preinstall/uninstall callbacks drm/fsl: Drop drm_vblank_cleanup
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git://linuxtv.org/pinchartl/mediaDave Airlie authored
The series interleaves DRM and V4L2 patches due to dependencies between the R- Car DU and VSP drivers. Mauro has acked all the V4L2 patches to go through your tree, and they don't conflict with anything queued for v4.13 in his tree. If I need to send any conflicting patches through Mauro's tree for v4.13, I'll make sure to base them on this branch. * 'drm/next/du' of git://linuxtv.org/pinchartl/media: drm: rcar-du: Map memory through the VSP device v4l: vsp1: Add API to map and unmap DRM buffers through the VSP v4l: vsp1: Map the DL and video buffers through the proper bus master v4l: rcar-fcp: Add an API to retrieve the FCP device v4l: rcar-fcp: Don't get/put module reference drm: rcar-du: Register a completion callback with VSP1 v4l: vsp1: Extend VSP1 module API to allow DRM callbacks v4l: vsp1: Postpone frame end handling in event of display list race drm: rcar-du: Arm the page flip event after queuing the page flip
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Dave Airlie authored
Merge tag 'sunxi-drm-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into drm-next sun4i-drm changes for 4.13 An unusually big pull request for this merge window, with three notable features: - V3s display engine support. This is especially notable because it uses a different display engine used on the newer Allwinner SoCs (H3, A64 and the likes) that will be quite easily supported now. - HDMI support for the old Allwinner SoCs. This is enabled only on the A10s for now, but should be really easy to extend to deal with A10, A20 and A31 - Preliminary work to deal with dual-pipeline SoCs (A10, A20, A31, H3, etc.). It currently ignores the second pipeline, but we can use the dual-pipelines bindings. This will be useful to enable the display pipeline while we work on the dual-pipeline. * tag 'sunxi-drm-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (27 commits) drm/sun4i: Add compatible for the A10s pipeline drm/sun4i: Add HDMI support dt-bindings: display: sun4i: Add allwinner,tcon-channel property dt-bindings: display: sun4i: Add HDMI display bindings drm/sun4i: Ignore the generic connectors for components drm/sun4i: tcon: multiply the vtotal when not in interlace drm/sun4i: tcon: Change vertical total size computation inconsistency drm/sun4i: tcon: Fix tcon channel 1 backporch calculation drm/sun4i: tcon: Switch mux on only for composite drm/sun4i: tcon: Move the muxing out of the mode set function drm/sun4i: tcon: Add channel debug drm/sun4i: tcon: add support for V3s TCON drm/sun4i: Add compatible string for V3s display engine drm/sun4i: add support for Allwinner DE2 mixers drm/sun4i: add a Kconfig option for sun4i-backend drm/sun4i: abstract a engine type drm/sun4i: return only planes for layers created dt-bindings: add bindings for DE2 on V3s SoC drm/sun4i: backend: Clarify sun4i_backend_layer_enable debug message drm/sun4i: Set TCON clock inside sun4i_tconX_mode_set ...
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- 15 Jun, 2017 34 commits
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
New radeon and amdgpu features for 4.13: - Lots of Vega10 bug fixes - Preliminary Raven support - KIQ support for compute rings - MEC queue management rework from Andres - Audio support for DCE6 - SR-IOV improvements - Improved module parameters for controlling radeon vs amdgpu support for SI and CIK - Bug fixes - General code cleanups [airlied: dropped drmP.h header from one file was needed and build broke] * 'drm-next-4.13' of git://people.freedesktop.org/~agd5f/linux: (362 commits) drm/amdgpu: Fix compiler warnings drm/amdgpu: vm_update_ptes remove code duplication drm/amd/amdgpu: Port VCN over to new SOC15 macros drm/amd/amdgpu: Port PSP v10.0 over to new SOC15 macros drm/amd/amdgpu: Port PSP v3.1 over to new SOC15 macros drm/amd/amdgpu: Port NBIO v7.0 driver over to new SOC15 macros drm/amd/amdgpu: Port NBIO v6.1 driver over to new SOC15 macros drm/amd/amdgpu: Port UVD 7.0 over to new SOC15 macros drm/amd/amdgpu: Port MMHUB over to new SOC15 macros drm/amd/amdgpu: Cleanup gfxhub read-modify-write patterns drm/amd/amdgpu: Port GFXHUB over to new SOC15 macros drm/amd/amdgpu: Add offset variant to SOC15 macros drm/amd/powerplay: add avfs control for Vega10 drm/amdgpu: add virtual display support for raven drm/amdgpu/gfx9: fix compute ring doorbell index drm/amd/amdgpu: Rename KIQ ring to avoid spaces drm/amd/amdgpu: gfx9 tidy ups (v2) drm/amdgpu: add contiguous flag in ucode bo create drm/amdgpu: fix missed gpu info firmware when cache firmware during S3 drm/amdgpu: export test ib debugfs interface ...
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git://anongit.freedesktop.org/git/drm-miscDave Airlie authored
Cross-subsystem Changes: - dt-bindings: add vendor prefix for NLT Technologies, Ltd. (Lucas) - dt-bindings: Add support for samsung s6e3hf2 panel (Hoegeun) Core Changes: - Add drm_panel_bridge to avoid connector boilerplate in drivers (Eric) - Trival fixes for dupe forward decl and reduce scope of variable (Dawid) Driver Changes: - dw-hdmi: Use mode_valid hook on bridge instead of connector (Jose) - vc4,atmel-hlcdc: Use drm_panel_bridge where appropriate (Eric) - panel: Add Innolux P079ZCA panel driver (Chris) - panel-simple: Add NL12880B20-05, NL192108AC18-02D, P320HVN03 panels (Lucas) - panel-samsung-s6e3ha2: Add s6e3hf2 panel support (Hoegeun) - zte,vc4,pl111,panel,mxsfb: Miscellaneous fixes Cc: Jose Abreu <Jose.Abreu@synopsys.com> Cc: Eric Anholt <eric@anholt.net> Cc: Chris Zhong <zyw@rock-chips.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Hoegeun Kwon <hoegeun.kwon@samsung.com> Cc: Dawid Kurek <dawikur@gmail.com> * tag 'drm-misc-next-2017-06-15' of git://anongit.freedesktop.org/git/drm-misc: (26 commits) drm: Reduce scope of 'state' variable drm: mxsfb_crtc: Reset the eLCDIF controller drm: Remove duplicate forward declaration drm/panel: s6e3ha2: Add support for s6e3hf2 panel on TM2e board dt-bindings: Add support for samsung s6e3hf2 panel drm/panel: add backlight dependency for sitronix-st7789v drm/panel: S6E3HA2 needs backlight code drm/panel: simple: add support for AUO P320HVN03 drm/panel: simple: add support for NLT NL192108AC18-02D dt-bindings: add vendor prefix for NLT Technologies, Ltd. drm/panel: simple: add support for NEC NL12880B20-05 drm/panel: add Innolux P079ZCA panel driver dt-bindings: Add INNOLUX P079ZCA panel bindings drm/vc4: Fix resource leak in 'vc4_get_hang_state_ioctl()' in error handling path drm/vc4/vc4_bo.c: always set bo->resv drm: Add const to name field declaration in struct drm_prop_enum_list drm/pl111: Fix offset calculation for the primary plane. drm/atmel-hlcdc: Fix panel registration drm/bridge: Build the panel wrapper in drm_kms_helper drm/atmel-hlcdc: Replace the panel usage with drm_panel_bridge. ...
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Dawid Kurek authored
Smaller scope reduces visibility of variable and makes usage of uninitialized variable less possible. Changes in v2: - separate declaration and initialization Changes in v3: - add missing signed-off-by tag Signed-off-by:
Dawid Kurek <dawikur@gmail.com> Signed-off-by:
Sean Paul <seanpaul@chromium.org> Link: http://patchwork.freedesktop.org/patch/msgid/20170615174556.GA8872@gmail.com
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Fabio Estevam authored
According to the eLCDIF initialization steps listed in the MX6SX Reference Manual the eLCDIF block reset is mandatory. Without performing the eLCDIF reset the display shows garbage content when the kernel boots. In earlier tests this issue has not been observed because the bootloader was previously showing a splash screen and the bootloader display driver does properly implement the eLCDIF reset. Add the eLCDIF reset to the driver, so that it can operate correctly independently of the bootloader. Tested on a imx6sx-sdb board. Cc: <stable@vger.kernel.org> Signed-off-by:
Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by:
Marek Vasut <marex@denx.de> Signed-off-by:
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Harish Kasiviswanathan authored
Acked-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by:
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Harish Kasiviswanathan authored
CPU and GPU paths were mostly the same. Acked-by:
Christian König <christian.koenig@amd.com> Acked-by:
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Tom St Denis authored
Signed-off-by:
Tom St Denis <tom.stdenis@amd.com> Reviewed-by:
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Tom St Denis authored
Signed-off-by:
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Tom St Denis authored
Signed-off-by:
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Tom St Denis authored
Signed-off-by:
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Tom St Denis authored
Signed-off-by:
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Tom St Denis authored
Signed-off-by:
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Tom St Denis authored
Signed-off-by:
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Tom St Denis authored
Signed-off-by:
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Tom St Denis authored
Signed-off-by:
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Tom St Denis authored
Allows reading/writing via SOC15 macros with offset for various register banks. Signed-off-by:
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Eric Huang authored
Signed-off-by:
Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by:
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Alex Deucher authored
Same as other asics. If enabled, exposes a user selectable number of virtual displays. Reviewed-by:
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Alex Deucher authored
This got lost when the code was revamped. Copy/paste bug from gfx8. Reported-by:
Evan Quan <evan.quan@amd.com> Fixes: 78c16834 (drm/amdgpu: allow split of queues with kfd at queue granularity v4) Reviewed-by:
Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by:
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Tom St Denis authored
Swap space for underscore in ring name. Signed-off-by:
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Tom St Denis authored
A couple of simple tidy ups to register programming. Signed-off-by:
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horchen authored
Under VF environment, the ucode would be settled to the visible VRAM, As it would be pinned to the visible VRAM, it's better to add contiguous flag,otherwise it need to move gpu address during the pin process. This movement is not necessary. Signed-off-by:
horchen <horace.chen@amd.com> Reviewed-by:
Huang Rui <ray.huang@amd.com> Reviewed-by:
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Huang Rui authored
gpu_info firmware is released after data is used. But when system enters into suspend, upper class driver will cache all firmware names. At that time, gpu_info will be failing to load. It seems an upper class issue, that we should not release gpu_info firmware until device finished. [ 903.236589] cache_firmware: amdgpu/vega10_sdma1.bin [ 903.236590] fw_set_page_data: fw-amdgpu/vega10_sdma1.bin buf=ffff88041eee10c0 data=ffffc90002561000 size=17408 [ 903.236591] cache_firmware: amdgpu/vega10_sdma1.bin ret=0 [ 903.464160] __allocate_fw_buf: fw-amdgpu/vega10_gpu_info.bin buf=ffff88041eee2c00 [ 903.471815] (NULL device *): loading /lib/firmware/updates/4.11.0-custom/amdgpu/vega10_gpu_info.bin failed with error -2 [ 903.482870] (NULL device *): loading /lib/firmware/updates/amdgpu/vega10_gpu_info.bin failed with error -2 [ 903.492716] (NULL device *): loading /lib/firmware/4.11.0-custom/amdgpu/vega10_gpu_info.bin failed with error -2 [ 903.503156] (NULL device *): direct-loading amdgpu/vega10_gpu_info.bin Signed-off-by:
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Huang Rui authored
As Christian and David's suggestion, submit the test ib ring debug interfaces. It's useful for debugging with the command submission without VM case. Signed-off-by:
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Eric Huang authored
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Eric Huang authored
Signed-off-by:
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Hawking Zhang authored
No need to clear it. The values are set explicitly. Signed-off-by:
Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by:
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Hawking Zhang authored
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Dmitry Osipenko authored
The blocking gather copy allocation is a major performance downside of the Host1x firewall, it may take hundreds milliseconds which is unacceptable for the real-time graphics operations. Let's try a non-blocking allocation first as a least invasive solution, it makes opentegra (Xorg driver) performance indistinguishable with/without the firewall. Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Reviewed-by:
Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Mikko Perttunen authored
This is largely a rewrite of the Host1x channel allocation code, bringing several changes: - The previous code could deadlock due to an interaction between the 'reflock' mutex and CDMA timeout handling. This gets rid of the mutex. - Support for more than 32 channels, required for Tegra186 - General refactoring, including better encapsulation of channel ownership handling into channel.c Signed-off-by:
Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by:
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Dmitry Osipenko authored
There is no host1x_cdma_stop() in the code, let's remove its definition from the header file. Signed-off-by:
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Dmitry Osipenko authored
The struct host1x_cmdbuf is unused, let's remove it. Signed-off-by:
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Dmitry Osipenko authored
Check waits in the firewall in a way it is done for relocations. Signed-off-by:
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Dmitry Osipenko authored
Arguments of the .is_addr_reg() are swapped in the definition of the function, that is quite confusing. Signed-off-by:
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