- 19 May, 2015 5 commits
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Yingjoe Chen authored
struct mtk_desc_pin.chip, mtk_pinctrl_devdata.invser_offset and mtk_pinctrl_devdata.chip_type are never used in code. Remove them. Some per-pin data are using int for pin number and offsets. Change to short and rearrange to reduce const data size. Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Hongzhou Yang authored
Add pinfunc header file, mt8135/mt8173 relate dts will include it. Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Hongzhou Yang authored
Since 6397 is no need to support interrupt controller, moving interrupt controller relate property to optional list. Also adding mt8173 and mt8127 to bindings. Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Joachim Eastwood authored
Add the required group function map and fill it at probe using the pin capabilities information already present in the driver. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Ray Jui authored
Fixed a small typo in the Cygnus GPIO driver Signed-off-by: Jason Uy <jasonuy@broadcom.com> Signed-off-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 12 May, 2015 10 commits
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Andrew Bresticker authored
Add a driver for the pin controller present on the IMG Pistachio SoC. This driver provides pinmux and pinconfig operations as well as GPIO and IRQ chips for the GPIO banks. Changes from v4: - Switched to using gpiochip_add_pin_range(). - Fixed up Kconfig entry. Changes from v3: - Addressed review comments from Ezequiel. Changes from v2: - Removed module stuff which would be compiled out. Changes from v1: - Addressed review comments from Linus. - Changed compatible string to "img,pistachio-system-pinctrl". - Look for GPIO sub-nodes by name. - A couple of bug fixes. Signed-off-by: Damien Horsley <Damien.Horsley@imgtec.com> Signed-off-by: Govindraj Raja <govindraj.raja@imgtec.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Signed-off-by: Kevin Cernekee <cernekee@chromium.org> Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: James Hartley <james.hartley@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Joachim Eastwood authored
Both pconf_get_pin and pconf_set_pin needs to lookup pin cap based on the pin number. Create a common helper function that both functions can use that also handles the case where no pin number is found in the pins array. This also fixes a small bug in pconf_get_pin where pconf_get_i2c0 would use the pins array index rather than the pin number. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Geert Uytterhoeven authored
As of commit 9d07d414 ("ARM: shmobile: r8a73a4: ape6evm: Remove legacy platform"), r8a73a4 is only supported in generic ARM multi-platform builds. Hence CONFIG_ARCH_MULTIPLATFORM is always set, and the check can be removed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Ulrich Hecht authored
Also renames "R-Car M2" to "R-Car M2-W" to avoid confusion. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Ulrich Hecht authored
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Ulrich Hecht authored
Regarding pin control, r8a7791 and r8a7793 are identical, so it is sufficient to add an sh_pfc_soc_info structure to enable r8a7793 support. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Geert Uytterhoeven authored
The last serial port is called "SCIFB", not "SCIFAB". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Mika Westerberg authored
Intel Sunrisepoint-H is a desktop version of the PCH (Platform Controller Hub). It has slightly different pin configuration compared to the LP version. This patch adds support for Sunrisepoint-H to the existing pinctrl-sunrisepoint.c driver. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Geert Uytterhoeven authored
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Geert Uytterhoeven authored
As of commit 9d07d414 ("ARM: shmobile: r8a73a4: ape6evm: Remove legacy platform"), r8a73a4 is only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to match platform devices by name anymore, hence remove the corresponding platform_device_id entry. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 06 May, 2015 14 commits
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Fabian Frederick authored
Inspired by scripts/coccinelle/api/err_cast.cocci Signed-off-by: Fabian Frederick <fabf@skynet.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Krzysztof Kozlowski authored
The irq_domain_ops are not modified by the driver and the irqdomain core code accepts pointer to a const data. Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Krzysztof Kozlowski authored
The irq_domain_ops are not modified by the driver and the irqdomain core code accepts pointer to a const data. Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Markus Pargmann authored
The old format to define pinctrl settings for imx in DT has two hierarchy levels. The first level are function device nodes. The second level are pingroups which contain a property fsl,pins. The original intention was to define all pin functions in a single dtsi file and just reference the correct ones in the board files. This idea was rejected some time ago leading to the current design to have all the pinfunctions defined in the board files. So we don't need the function device nodes anymore. This patch changes the pinctrl driver to accept devicetrees which do not have the first hierarchy level, function device nodes. For example karo-tx25 already has such a devicetree. Old devicetrees are still parsed and supported. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Helmut Buchsbaum authored
Since SCLK, MISO and MOSI are the only mandatory signals at Zynq's SPI interfaces, SS0, SS1 and SS2 have to be configured separately as they may be used as simple GPIO lines. This, of course, has to be considered in the devicetree, so pin controller configuration for e.g. an SPI0 using SS0 and SS1 only might look like the following snippet (derived from the example of chapter "17.5.3 MIO/EMIO" Routing of Zynq-7000 TRM UG585). So MIO20 can now be used as GPIO instead of being occupied by SPI0 SS2 function. Note the separate pinmux function for the slave select signals: pinctrl_spi0_default: spi0-default { mux_spi { function = "spi0"; groups = "spi0_0_grp"; }; mux_ss { function = "spi0_ss"; groups = "spi0_0_ss0_grp", "spi0_0_ss1_grp"; } conf-output { pins = "MIO16", "MIO21"; slew-rate = <0>; bias-disable; low-power-disable; io-standard = <1>; }; conf-input { pins = "MIO17"; slew-rate = <0>; bias-high-impedance; low-power-disable; io-standard = <1>; }; conf-select { pins = "MIO18", "MIO19"; slew-rate = <0>; bias-pull-up; low-power-disable; io-standard = <1>; }; }; pinctrl_gpio0_default { mux { function = "gpio0"; groups = "gpio0_20_grp" }; conf { pins = "MIO20"; slew-rate = <0>; bias-pull-up; low-power-disable; io-standard = <1>; }; }; Signed-off-by: Helmut Buchsbaum <helmut.buchsbaum@gmail.com> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
Assign GPIO chip and irqchip to the GPIO container dynamically, so we can set a unique name for each GPIO irqchip and see what chip the hwirq offset actually relates to. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This activates strict mode muxing for the Nomadik pin controllers, as these do not allow GPIO and functions to use the same pin simultaneously. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
While the pinmux_ops are ideally just a vtable for pin mux calls, the "strict" setting belongs so intuitively with the pin multiplexing that we should move it here anyway. Putting it in the top pinctrl_desc makes no sense. Cc: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sonic Zhang authored
Disallow simultaneous use of the the GPIO and peripheral mux functions by setting a flag "strict" in struct pinctrl_desc. The blackfin pinmux and gpio controller doesn't allow user to set up a pin for both GPIO and peripheral function. So, add flag strict in struct pinctrl_desc to check both gpio_owner and mux_owner before approving the pin request. v2-changes: - if strict flag is set, check gpio_owner and mux_onwer in if and else clause v3-changes: - add kerneldoc for this struct - augment Documentation/pinctrl.txt Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Frank Li authored
Add i.MX7D pinctrl driver support Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andrew Bresticker authored
Add a device-tree binding document for the pin controller present on the IMG Pistachio SoC. Signed-off-by: Damien Horsley <Damien.Horsley@imgtec.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Joachim Eastwood authored
Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Joachim Eastwood authored
Pinctrl driver for the System Control Unit (SCU) found on NXP LPC18xx/43xx devices. Driver uses the generic pinctrl DT bindings for multiplexing and property settings. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Alexander Stein authored
This adds the callback for set_multiple. As this controller has a separate set and clear register, we can't write directly to PIO_ODSR as this would required a cached variable and would race with at91_gpio_set. So build masks for the PIO_SODR and PIO_CODR registers and write them together. Signed-off-by: Alexander Stein <alexanders83@web.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 04 May, 2015 3 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4Linus Torvalds authored
Pull ext4 fixes from Ted Ts'o: "Some miscellaneous bug fixes and some final on-disk and ABI changes for ext4 encryption which provide better security and performance" * tag 'for_linus_stable' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4: ext4: fix growing of tiny filesystems ext4: move check under lock scope to close a race. ext4: fix data corruption caused by unwritten and delayed extents ext4 crypto: remove duplicated encryption mode definitions ext4 crypto: do not select from EXT4_FS_ENCRYPTION ext4 crypto: add padding to filenames before encrypting ext4 crypto: simplify and speed up filename encryption
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git://people.freedesktop.org/~airlied/linuxLinus Torvalds authored
Pull drm fixes from Dave Airlie: "One intel fix, one rockchip fix, and a bunch of radeon fixes for some regressions from audio rework and vm stability" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/i915/chv: Implement WaDisableShadowRegForCpd drm/radeon: fix userptr return value checking (v2) drm/radeon: check new address before removing old one drm/radeon: reset BOs address after clearing it. drm/radeon: fix lockup when BOs aren't part of the VM on release drm/radeon: add SI DPM quirk for Sapphire R9 270 Dual-X 2G GDDR5 drm/radeon: adjust pll when audio is not enabled drm/radeon: only enable audio streams if the monitor supports it drm/radeon: only mark audio as connected if the monitor supports it (v3) drm/radeon/audio: don't enable packets until the end drm/radeon: drop dce6_dp_enable drm/radeon: fix ordering of AVI packet setup drm/radeon: Use drm_calloc_ab for CS relocs drm/rockchip: fix error check when getting irq MAINTAINERS: add entry for Rockchip drm drivers
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- 03 May, 2015 8 commits
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git://anongit.freedesktop.org/drm-intelDave Airlie authored
Just a single intel fix * tag 'drm-intel-fixes-2015-04-30' of git://anongit.freedesktop.org/drm-intel: drm/i915/chv: Implement WaDisableShadowRegForCpd
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https://github.com/markyzq/kernel-drm-rockchipDave Airlie authored
one fix and maintainers update * 'drm-next0420' of https://github.com/markyzq/kernel-drm-rockchip: drm/rockchip: fix error check when getting irq MAINTAINERS: add entry for Rockchip drm drivers
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git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsiLinus Torvalds authored
Pull SCSI fixes from James Bottomley: "This is three logical fixes (as 5 patches). The 3ware class of drivers were causing an oops with multiqueue by tearing down the command mappings after completing the command (where the variables in the command used to tear down the mapping were no-longer valid). There's also a fix for the qnap iscsi target which was choking on us sending it commands that were too long and a fix for the reworked aha1542 allocating GFP_KERNEL under a lock" * tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: 3w-9xxx: fix command completion race 3w-xxxx: fix command completion race 3w-sas: fix command completion race aha1542: Allocate memory before taking a lock SCSI: add 1024 max sectors black list flag
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git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds authored
Pull slave dmaengine fixes from Vinod Koul: "Here are the fixes in dmaengine subsystem for rc2: - privatecnt fix for slave dma request API by Christopher - warn fix for PM ifdef in usb-dmac by Geert - fix hardware dependency for xgene by Jean" * 'next' of git://git.infradead.org/users/vkoul/slave-dma: dmaengine: increment privatecnt when using dma_get_any_slave_channel dmaengine: xgene: Set hardware dependency dmaengine: usb-dmac: Protect PM-only functions to kill warning
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git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linuxLinus Torvalds authored
Pull powerpc fixes from Michael Ellerman: - build fix for SMP=n in book3s_xics.c - fix for Daniel's pci_controller_ops on powernv. - revert the TM syscall abort patch for now. - CPU affinity fix from Nathan. - two EEH fixes from Gavin. - fix for CR corruption from Sam. - selftest build fix. * tag 'powerpc-4.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linux: powerpc/powernv: Restore non-volatile CRs after nap powerpc/eeh: Delay probing EEH device during hotplug powerpc/eeh: Fix race condition in pcibios_set_pcie_reset_state() powerpc/pseries: Correct cpu affinity for dlpar added cpus selftests/powerpc: Fix the pmu install rule Revert "powerpc/tm: Abort syscalls in active transactions" powerpc/powernv: Fix early pci_controller_ops loading. powerpc/kvm: Fix SMP=n build error in book3s_xics.c
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Jan Kara authored
The estimate of necessary transaction credits in ext4_flex_group_add() is too pessimistic. It reserves credit for sb, resize inode, and resize inode dindirect block for each group added in a flex group although they are always the same block and thus it is enough to account them only once. Also the number of modified GDT block is overestimated since we fit EXT4_DESC_PER_BLOCK(sb) descriptors in one block. Make the estimation more precise. That reduces number of requested credits enough that we can grow 20 MB filesystem (which has 1 MB journal, 79 reserved GDT blocks, and flex group size 16 by default). Signed-off-by: Jan Kara <jack@suse.cz> Signed-off-by: Theodore Ts'o <tytso@mit.edu> Reviewed-by: Eric Sandeen <sandeen@redhat.com>
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Davide Italiano authored
fallocate() checks that the file is extent-based and returns EOPNOTSUPP in case is not. Other tasks can convert from and to indirect and extent so it's safe to check only after grabbing the inode mutex. Signed-off-by: Davide Italiano <dccitaliano@gmail.com> Signed-off-by: Theodore Ts'o <tytso@mit.edu> Cc: stable@vger.kernel.org
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Lukas Czerner authored
Currently it is possible to lose whole file system block worth of data when we hit the specific interaction with unwritten and delayed extents in status extent tree. The problem is that when we insert delayed extent into extent status tree the only way to get rid of it is when we write out delayed buffer. However there is a limitation in the extent status tree implementation so that when inserting unwritten extent should there be even a single delayed block the whole unwritten extent would be marked as delayed. At this point, there is no way to get rid of the delayed extents, because there are no delayed buffers to write out. So when a we write into said unwritten extent we will convert it to written, but it still remains delayed. When we try to write into that block later ext4_da_map_blocks() will set the buffer new and delayed and map it to invalid block which causes the rest of the block to be zeroed loosing already written data. For now we can fix this by simply not allowing to set delayed status on written extent in the extent status tree. Also add WARN_ON() to make sure that we notice if this happens in the future. This problem can be easily reproduced by running the following xfs_io. xfs_io -f -c "pwrite -S 0xaa 4096 2048" \ -c "falloc 0 131072" \ -c "pwrite -S 0xbb 65536 2048" \ -c "fsync" /mnt/test/fff echo 3 > /proc/sys/vm/drop_caches xfs_io -c "pwrite -S 0xdd 67584 2048" /mnt/test/fff This can be theoretically also reproduced by at random by running fsx, but it's not very reliable, though on machines with bigger page size (like ppc) this can be seen more often (especially xfstest generic/127) Signed-off-by: Lukas Czerner <lczerner@redhat.com> Signed-off-by: Theodore Ts'o <tytso@mit.edu> Cc: stable@vger.kernel.org
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