- 16 May, 2022 20 commits
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Hans de Goede authored
Lockdep complains about the smu->message_lock mutex being used before it is initialized through the following call path: amdgpu_device_init() amdgpu_dpm_mode2_reset() smu_mode2_reset() smu_v12_0_mode2_reset() smu_cmn_send_smc_msg_with_param() Move the mutex_init() call to smu_early_init() to fix the mutex being used before it is initialized. This fixes the following lockdep splat: [ 3.867331] ------------[ cut here ]------------ [ 3.867335] fbcon: Taking over console [ 3.867338] DEBUG_LOCKS_WARN_ON(lock->magic != lock) [ 3.867340] WARNING: CPU: 14 PID: 491 at kernel/locking/mutex.c:579 __mutex_lock+0x44c/0x830 [ 3.867349] Modules linked in: amdgpu(+) crct10dif_pclmul drm_ttm_helper crc32_pclmul ttm crc32c_intel ghash_clmulni_intel hid_lg_g15 iommu_v2 sp5100_tco nvme gpu_sched drm_dp_helper nvme_core ccp wmi video hid_logitech_dj ip6_tables ip_tables ipmi_devintf ipmi_msghandler fuse i2c_dev [ 3.867363] CPU: 14 PID: 491 Comm: systemd-udevd Tainted: G I 5.18.0-rc5+ #33 [ 3.867366] Hardware name: Micro-Star International Co., Ltd. MS-7C95/B550M PRO-VDH WIFI (MS-7C95), BIOS 2.90 12/23/2021 [ 3.867369] RIP: 0010:__mutex_lock+0x44c/0x830 [ 3.867372] Code: ff 85 c0 0f 84 33 fc ff ff 8b 0d b7 50 25 01 85 c9 0f 85 25 fc ff ff 48 c7 c6 fb 41 82 99 48 c7 c7 6b 63 80 99 e8 88 2a f8 ff <0f> 0b e9 0b fc ff ff f6 83 b9 0c 00 00 01 0f 85 64 ff ff ff 4c 89 [ 3.867377] RSP: 0018:ffffaef8c0fc79f0 EFLAGS: 00010286 [ 3.867380] RAX: 0000000000000028 RBX: 0000000000000000 RCX: 0000000000000027 [ 3.867382] RDX: ffff9ccc0dda0928 RSI: 0000000000000001 RDI: ffff9ccc0dda0920 [ 3.867384] RBP: ffffaef8c0fc7a80 R08: 0000000000000000 R09: ffffaef8c0fc7820 [ 3.867386] R10: 0000000000000003 R11: ffff9ccc2a2fffe8 R12: 0000000000000002 [ 3.867388] R13: ffff9cc990808058 R14: 0000000000000000 R15: ffff9cc98bfc0000 [ 3.867390] FS: 00007fc4d830f580(0000) GS:ffff9ccc0dd80000(0000) knlGS:0000000000000000 [ 3.867394] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 3.867396] CR2: 0000560a77031410 CR3: 000000010f522000 CR4: 0000000000750ee0 [ 3.867398] PKRU: 55555554 [ 3.867399] Call Trace: [ 3.867401] <TASK> [ 3.867403] ? smu_cmn_send_smc_msg_with_param+0x98/0x240 [amdgpu] [ 3.867533] ? __mutex_lock+0x90/0x830 [ 3.867535] ? amdgpu_dpm_mode2_reset+0x37/0x60 [amdgpu] [ 3.867653] ? smu_cmn_send_smc_msg_with_param+0x98/0x240 [amdgpu] [ 3.867758] smu_cmn_send_smc_msg_with_param+0x98/0x240 [amdgpu] [ 3.867857] smu_mode2_reset+0x2b/0x50 [amdgpu] [ 3.867953] amdgpu_dpm_mode2_reset+0x46/0x60 [amdgpu] [ 3.868096] amdgpu_device_init.cold+0x1069/0x1e78 [amdgpu] [ 3.868219] ? _raw_spin_unlock_irqrestore+0x30/0x50 [ 3.868222] ? pci_conf1_read+0x9b/0xf0 [ 3.868226] amdgpu_driver_load_kms+0x15/0x110 [amdgpu] [ 3.868314] amdgpu_pci_probe+0x1a9/0x3c0 [amdgpu] [ 3.868398] local_pci_probe+0x41/0x80 [ 3.868401] pci_device_probe+0xab/0x200 [ 3.868404] really_probe+0x1a1/0x370 [ 3.868407] __driver_probe_device+0xfc/0x170 [ 3.868410] driver_probe_device+0x1f/0x90 [ 3.868412] __driver_attach+0xbf/0x1a0 [ 3.868414] ? __device_attach_driver+0xe0/0xe0 [ 3.868416] bus_for_each_dev+0x65/0x90 [ 3.868419] bus_add_driver+0x151/0x1f0 [ 3.868421] driver_register+0x89/0xd0 [ 3.868423] ? 0xffffffffc0bd4000 [ 3.868425] do_one_initcall+0x5d/0x300 [ 3.868428] ? do_init_module+0x22/0x240 [ 3.868431] ? rcu_read_lock_sched_held+0x3c/0x70 [ 3.868434] ? trace_kmalloc+0x30/0xe0 [ 3.868437] ? kmem_cache_alloc_trace+0x1e6/0x3a0 [ 3.868440] do_init_module+0x4a/0x240 [ 3.868442] __do_sys_finit_module+0x93/0xf0 [ 3.868446] do_syscall_64+0x5b/0x80 [ 3.868449] ? rcu_read_lock_sched_held+0x3c/0x70 [ 3.868451] ? lockdep_hardirqs_on_prepare+0xd9/0x180 [ 3.868454] ? do_syscall_64+0x67/0x80 [ 3.868456] ? do_syscall_64+0x67/0x80 [ 3.868458] ? do_syscall_64+0x67/0x80 [ 3.868460] ? do_syscall_64+0x67/0x80 [ 3.868462] entry_SYSCALL_64_after_hwframe+0x44/0xae [ 3.868465] RIP: 0033:0x7fc4d8ec1ced [ 3.868467] Code: 5d c3 66 2e 0f 1f 84 00 00 00 00 00 90 f3 0f 1e fa 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d fb 70 0e 00 f7 d8 64 89 01 48 [ 3.868472] RSP: 002b:00007fff687ae6b8 EFLAGS: 00000246 ORIG_RAX: 0000000000000139 [ 3.868475] RAX: ffffffffffffffda RBX: 0000560a76fbca60 RCX: 00007fc4d8ec1ced [ 3.868477] RDX: 0000000000000000 RSI: 00007fc4d902343c RDI: 0000000000000011 [ 3.868479] RBP: 00007fc4d902343c R08: 0000000000000000 R09: 0000560a76fb59c0 [ 3.868481] R10: 0000000000000011 R11: 0000000000000246 R12: 0000000000020000 [ 3.868484] R13: 0000560a76f8bfd0 R14: 0000000000000000 R15: 0000560a76fc2d10 [ 3.868487] </TASK> [ 3.868489] irq event stamp: 120617 [ 3.868490] hardirqs last enabled at (120617): [<ffffffff9817169e>] __up_console_sem+0x5e/0x70 [ 3.868494] hardirqs last disabled at (120616): [<ffffffff98171683>] __up_console_sem+0x43/0x70 [ 3.868497] softirqs last enabled at (119684): [<ffffffff980ee83a>] __irq_exit_rcu+0xca/0x100 [ 3.868501] softirqs last disabled at (119679): [<ffffffff980ee83a>] __irq_exit_rcu+0xca/0x100 [ 3.868504] ---[ end trace 0000000000000000 ]--- Signed-off-by:Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Xiaojian Du authored
This patch will add SMU v13.0.4 into the IP discovery list. Signed-off-by:
Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by:
Huang Rui <ray.huang@amd.com> Reviewed-by:
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Tim Huang authored
Enable the SMU IP v13.0.4 GFXOFF control Signed-off-by:
Tim Huang <tim.huang@amd.com> Reviewed-by:
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Tim Huang authored
Add the entry to set the ppt functions for SMU IP v13.0.4. Signed-off-by:
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Tim Huang authored
Add swsmu ppt files for SMU IP v13.0.4. Signed-off-by:
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Tim Huang authored
Add some common ppt functions that will be used by SMU IP v13.0.x and drop the not used function smu_v13_0_mode2_reset. Signed-off-by:
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Tim Huang authored
The SMU needs this message to trigger IMU initialization. Signed-off-by:
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Huang Rui authored
Add smu v13.0.4 driver SMU interface headers. v2: squash in the header updates (Alex) Signed-off-by:
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Jack Xiao authored
Use the correct Memory Queue Descriptor (MQD) structure for GC 11. Signed-off-by:
Jack Xiao <Jack.Xiao@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Jack Xiao authored
Select the correct microengine (me) when using the map_queue packet. There are different me's for GFX, compute, and scheduling. Signed-off-by:
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Sathishkumar S authored
smartshift apu and dgpu power boost are reported as percentage with respect to their power limits. adjust the units of power before calculating the percentage of boost. Signed-off-by:
Sathishkumar S <sathishkumar.sundararaju@amd.com> Reviewed-by:
Lijo Lazar <lijo.lazar@amd.com> Signed-off-by:
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Sathishkumar S authored
smartshift apu and dgpu power boost are reported as percentage with respect to their power limits. This value[0-100] reflects the boost for the respective device. Signed-off-by:
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Lang Yu authored
MMIO/DOORBELL BOs' backing resources(bus address resources that are used to talk to the GPU) are not managed by GTT manager, but they are counted by GTT manager. That makes no sense. With AMDGPU_GEM_CREATE_PREEMPTIBLE flag, such BOs will be managed by PREEMPT manager(for preemptible contexts, e.g., KFD). Then they won't be evicted and don't need to be pinned as well. But we still leave these BOs pinned to indicate that the underlying resource never moves. Signed-off-by:
Lang Yu <Lang.Yu@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Haohui Mai authored
Setting the HALT bit of SDMA_F32_CNTL in all paths before programming the ring buffer of the SDMA engine. Signed-off-by:
Haohui Mai <ricetons@gmail.com> Signed-off-by:
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Alex Deucher authored
Check if the requested stable pstate matches the current one before changing it. This avoids changing the stable pstate on context destroy if the user never changed it in the first place via the IOCTL. v2: compare the current and requested rather than setting a flag (Lijo) Fixes: 8cda7a4f ("drm/amdgpu/UAPI: add new CTX OP to get/set stable pstates") Reviewed-by:
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Yang Wang authored
- get_power_limit - set_power_limit add above callback functions to enable power_cap hwmon node. Signed-off-by:
Yang Wang <KevinYang.Wang@amd.com> Reviewed-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
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Yang Wang authored
the pp_features can't display full feauture information when these mapping is not exiting. Signed-off-by:
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Yang Wang authored
the pp_features can't display full feauture information when these mapping is not exiting. Signed-off-by:
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Sathishkumar S authored
support reading smartshift apu and dgpu power for smu11 based asic v2: add new version of SmuMetrics and make calculation more readable (Lijo) v3: avoid calculations that result in -ve values and skip related checks v4: use the current power limit on dGPU and exclude smu 11_0_7 (Lijo) v5: remove redundant code (Lijo) Signed-off-by:
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Yang Wang authored
- set_pp_feature_mask - get_pp_feature_mask the pp_feature device node isn't working when above callback functions aren't provided. Signed-off-by:
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- 13 May, 2022 1 commit
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Jiapeng Chong authored
Eliminate the follow smatch warning: drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c:35 nbio_v7_7_get_rev_id() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c:214 nbio_v7_7_init_registers() warn: inconsistent indenting. Reported-by:
Abaci Robot <abaci@linux.alibaba.com> Signed-off-by:
Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by:
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- 10 May, 2022 19 commits
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Wan Jiabing authored
Fix following coccicheck warning: ./drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c:724:4-36: duplicated argument to & or | Remove duplicated UVD_SUVD_CGC_GATE__SRE_H264_MASK. Signed-off-by:
Wan Jiabing <wanjiabing@vivo.com> Signed-off-by:
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Alex Deucher authored
This reverts commit eaa09053. Commit ebc002e3 ("drm/amdgpu: don't use BACO for reset in S3") stops using BACO for reset during suspend, so it's no longer necessary to leave BACO enabled during suspend. This fixes resume from suspend on the navy flounder dGPU in the ASUS ROG Strix G513QY. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2008 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1982Reviewed-by:
Mario Limonciello <mario.limonciello@amd.com> Signed-off-by:
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Philip Yang authored
If page table PDEs is evicted and restored, after updating PDEs, need increase vm->tlb_seq, then amdgpu_vm_flush will flush TLB before command submission. Signed-off-by:
Philip Yang <Philip.Yang@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Aric Cyr authored
This version brings along following fixes: - Refactor LTTPR code - Fix PSR after hibernate - Fix DC build errors - Fix IRQ unregister error when unloading amdgpu - Improve DP link training - Fix stutter - Remove redundant CONFIG_DRM_AMD_DC_DCN guards - Fix 2nd connected USB-C display not lighting up Acked-by:
Stylon Wang <stylon.wang@amd.com> Signed-off-by:
Aric Cyr <aric.cyr@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
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Stylon Wang authored
This reverts commit 4b7786d8. Commit 4b7786d8 ("drm/amd/display: Fix DCN3 B0 DP Alt Mapping") is causing 2nd USB-C display not lighting up. Phy id remapping is done differently than is assumed in this patch. Signed-off-by:
Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Tested-by:
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Alex Hung authored
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN guards for #if-#else clause. Reviewed-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by:
Alex Hung <alex.hung@amd.com> Tested-by:
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James Zhu authored
Fixed warning: no previous prototype for 'vcn_dec_sw_ring_emit_fence'. v2: regenerate patch after git rebase. v3: update commit message. Signed-off-by:
James Zhu <James.Zhu@amd.com> Reported-by:
kernel test robot <lkp@intel.com> Reviewed-by:
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Danijel Slivka authored
Managing power profiles mode is not allowed in SRIOV mode for Sienna Cichlid. This patch is adjusting the "pp_power_profile_mode" and "power_dpm_force_performance_level" accordingly. Signed-off-by:
Danijel Slivka <danijel.slivka@amd.com> Reviewed-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
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Alex Hung authored
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN in amdgpu_dm directory. Reviewed-by:
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Evan Quan authored
Suppress the following compile warning: In file included from drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_0_ppt.c:39: >> drivers/gpu/drm/amd/amdgpu/../pm/inc/smu_v13_0_0_pptable.h:194:39: warning: field overdrive_table within 'struct smu_13_0_0_powerplay_table' is less aligned than 'struct smu_13_0_0_overdrive_table' and is usually due to 'struct smu_13_0_0_powerplay_table' being packed, which can lead to unaligned accesses [-Wunaligned-access] Reported-by:
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Mohammad Zafar Ziya authored
Add vcn ras poison consumption event handling V2: Removed default poison consumption handling function cb Signed-off-by:
Mohammad Zafar Ziya <Mohammadzafar.ziya@amd.com> Reviewed-by:
Tao Zhou <tao.zhou1@amd.com> Reviewed-by:
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Mohammad Zafar Ziya authored
Add jpeg ras poison event callback and consumption handling V2: Removed the default poison consumption cb handle Signed-off-by:
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Alex Hung authored
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN for enabling z10. Reviewed-by:
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Alex Hung authored
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN in irq directory. Reviewed-by:
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Tao Zhou authored
Qeury ras status before ras poison consumption handling, add more comment and log. Signed-off-by:
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Tao Zhou authored
Enable RAS IH if poison consumption handler is implemented. Signed-off-by:
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Alex Hung authored
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN in gpio directory. Reviewed-by:
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Alex Hung authored
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN in dce directory. Reviewed-by:
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Alex Hung authored
[Why & How] CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC code should be OS-agnostic. This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN in dc and dc/core directories. Reviewed-by:
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