- 09 Aug, 2018 38 commits
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Jose Abreu authored
XGMAC2 uses the same engine of timestamping as GMAC4. Let's use the same callbacks. Signed-off-by:
Jose Abreu <joabreu@synopsys.com> Cc: David S. Miller <davem@davemloft.net> Cc: Joao Pinto <jpinto@synopsys.com> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Jose Abreu authored
Add the MDIO related funcionalities for the new IP block XGMAC2. Signed-off-by:
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Jose Abreu authored
Add the descriptor related callbacks for the new IP block XGMAC2. Signed-off-by:
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Jose Abreu authored
Add the DMA related callbacks for the new IP block XGMAC2. Signed-off-by:
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Jose Abreu authored
Add the MAC related callbacks for the new IP block XGMAC2. Signed-off-by:
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Jose Abreu authored
Add a new entry to HWIF table for XGMAC 2.10. For now we fill it with empty callbacks which will be added in posterior patches. Signed-off-by:
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David S. Miller authored
Andrew Lunn says: ==================== More complete PHYLINK support for mv88e6xxx Previous patches added sufficient PHYLINK support to the mv88e6xxx that it did not break existing use cases, basically fixed-link phys. This patchset builds out the support so that SFP modules, up to 2.5Gbps can be supported, on mv88e6390X, on ports 9 and 10. It also provides a framework which can be extended to support SFPs on ports 2-8 of mv88e6390X, 10Gbps PHYs, and SFP support on the 6352 family. Russell King did much of the initial work, implementing the validate and mac_link_state calls. However, there is an important TODO in the commit message: needs to call phylink_mac_change() when the port link comes up/goes down. The remaining patches implement this, by adding more support for the SERDES interfaces, in particular, interrupt support so we get notified when the SERDES gains/looses sync. This has been tested on the ZII devel C, using a Clearfog as peer device. ==================== Signed-off-by: -
Andrew Lunn authored
When a port changes CMODE, the SERDES interface being used can change. Disable interrupts for the old SERDES interface, and enable interrupts on the new. Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
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Andrew Lunn authored
phylink wants to know when the MAC layers notices a change in the link. For the 6390 family, this is a change in the SERDES state. Add interrupt support for the SERDES interface used to implement SGMII/1000Base-X/2500Base-X. This is currently limited to ports 9 and 10. Support for the 10G SERDES and other ports will be added later, building on this basic framework. Signed-off-by:
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Andrew Lunn authored
An up coming change will register interrupts for individual switch ports, using the mv88e6xxx_port as the interrupt context information. Add members to the mv88e6xxx_port structure so we can link it back to the mv88e6xxx_chip member the port belongs to and the port number of the port. Signed-off-by:
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Andrew Lunn authored
The 6390 family has a number of SERDES interfaces per port. When the cmode changes, eg 1000Base-X to XAUI, the SERDES interface in use will also change. Power down the old SERDES interface and power up the new SERDES interface. Signed-off-by:
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Andrew Lunn authored
The ports CMODE indicates the type of link between the MAC and the PHY. It is used often in the SERDES code. Rather than read it each time, cache its value. Signed-off-by:
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Andrew Lunn authored
The 6390 has three different SERDES interface types. 2500Base-X is implemented by the SGMII/1000Base-X SERDES. So power on/off the correct SERDES. Signed-off-by:
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Andrew Lunn authored
Add a helper for accessing SERDES registers of the 6390 family. Signed-off-by:
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Andrew Lunn authored
There is a need to add more functions manipulating the SERDES interfaces. Cleanup the namespace. Signed-off-by:
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Andrew Lunn authored
The 6390 has two SERDES interfaces, used by ports 9 and 10. The 6390X has eight SERDES interfaces. These allow ports 9 and 10 to do 10G. Or if lower speeds are used, some of the SERDES interfaces can be used by ports 2-8 for 1000Base-X. Signed-off-by:
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Andrew Lunn authored
The 6390 family has 8 SERDES lanes. What ports use these lanes depends on how ports 9 and 10 are configured. If 9 and 10 does not make use of a line, one of the lower ports can use it. Add a function to return the lane a port is using, if any, and simplify the code to power up/down the lane. Signed-off-by:
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Russell King authored
Add rudimentary phylink support to mv88e6xxx. TODO: - needs to call phylink_mac_change() when the port link comes up/goes down. Signed-off-by:
Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by:
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Russell King authored
Add a helper for MAC drivers to use in their validate callback to deal with 2500BaseX vs 1000BaseX modes, where the hardware supports both but it is not possible to automatically select between them. This helper defaults to 1000BaseX, as that is the 802.3 standard, and will allow users to select 2500BaseX either by forcing the speed if AN is disabled, or by changing the advertising mask if AN is enabled. Disabling AN is not recommended as it is only the speed that we're interested in controlling, not the duplex or pause mode parameters. Signed-off-by:
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Andrew Lunn authored
The 6185 can enable/disable 802.3z pause be setting the MyPause bit in the port status register. Add an op to support this. Signed-off-by:
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David S. Miller authored
Ido Schimmel says: ==================== mlxsw: Various updates Patches 1-3 update the driver to use a new firmware version. Due to a recently discovered issue, the version (and future ones) does not support matching on VLAN ID at egress. This is enforced in the driver and reported back to the user via extack. Patch 4 adds a new selftest for the recently introduced algorithmic TCAM. Patch 5 converts the driver to use SPDX identifiers. Patches 6-7 fix a bug in ethtool stats reporting and expose counters for all 16 TCs, following recent MC-aware changes that utilize TCs 8-15. ==================== Signed-off-by: -
Petr Machata authored
Before MC-aware mode was enabled in commit 7b819530 ("mlxsw: spectrum: Configure MC-aware mode on mlxsw ports"), only 8 traffic classes were used. Under MC-aware regime, however, besides using TCs 0-7 for UC traffic, it additionally uses TCs 8-15 for BUM traffic. It is therefore desirable to show counters for these TCs as well. Update ethtool stats pool length, mlxsw_sp_port_get_strings() and mlxsw_sp_port_get_stats() to include artifacts for all 16 TCs. For consistency and simplicity, expose tc_no_buffer_discard_uc_tc for BUM TCs as well, even though it ought to stay at 0 all the time. Signed-off-by:
Petr Machata <petrm@mellanox.com> Signed-off-by:
Ido Schimmel <idosch@mellanox.com> Signed-off-by:
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Petr Machata authored
The function mlxsw_sp_port_get_sset_count() is supposed to return the total number of ethtool strings that mlxsw supports. Specifically for names of statistic counters (the only string type that mlxsw supports as of now), that number is stored in MLXSW_SP_PORT_ETHTOOL_STATS_LEN. However, when adding RFC-2891 counters, that define wasn't updated to include the new counters. As a result, ethtool snips out the counters towards the end of the list, which contains per-TC counters, and only the first three traffic classes end up being reported. Fix by adding MLXSW_SP_PORT_HW_RFC_2819_STATS_LEN as appropriate. Fixes: 1222d15a ("mlxsw: spectrum: Expose counters for various packet sizes") Signed-off-by:
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Jiri Pirko authored
Signed-off-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
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Ido Schimmel authored
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Jiri Pirko authored
Recent FW fixes a bug and allows to load newly flashed FW image after reset. So make sure the reset happens after flash. Indicate the need down to PCI layer by -EAGAIN. Signed-off-by:
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Nir Dotan authored
This new firmware contains: - Support for new types of cables - Support for flashing future firmware without reboot - Support for Router ARP BC and UC traps Signed-off-by:Nir Dotan <nird@mellanox.com> Acked-by:
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Nir Dotan authored
As recent spectrum FW imposes a limitation on using vlan_id key for egress ACL, disallow the usage of that key accordingly and return a proper extack message. Signed-off-by:
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David S. Miller authored
Saeed Mahameed says: ==================== Mellanox, mlx5 next updates 2018-08-09 This series includes mlx5 core driver updates and mostly simple cleanups. From Denis: Use max #EQs reported by firmware to request MSIX vectors. From Eli: Trivial cleanups, unused arguments/functions and reduce command polling interval when command interface is in polling mode. From Eran: Rename vport state enums, to better reflect their actual usage. ==================== Signed-off-by: -
Eli Cohen authored
Use cond_resched() instead of usleep_range() to decrease the time between polling attempts thus reducing overall driver load time. Below is a comparison before and after the change, of loading eight virtual functions. Before: real 0m8.785s user 0m0.093s sys 0m0.090s After: real 0m5.730s user 0m0.097s sys 0m0.087s Signed-off-by:
Eli Cohen <eli@mellanox.com> Reviewed-by:
Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by:
Saeed Mahameed <saeedm@mellanox.com> Signed-off-by:
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Eli Cohen authored
mlx5_query_vport_state() and mlx5_modify_vport_admin_state() are used only from within mlx5_core - unexport them. Signed-off-by:
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Eli Cohen authored
mlx5_query_vport_admin_state() is not used anywhere. Remove it. Signed-off-by:
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Eli Cohen authored
Remove unused nvports argument. Signed-off-by:
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Eran Ben Elisha authored
Modify and query vport state commands share the same admin_state and op_mod values, rename the enums to fit them both. In addition, remove the esw prefix from the admin state enum as this also applied for vnic. Signed-off-by:
Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by:
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Denis Drozdov authored
New firmware has defined new HCA capability field called "max_num_eqs", that is the number of available EQs after subtracting reserved FW EQs. Before this capability the FW reported the EQ number in "log_max_eqs", the reported value also contained FW reserved EQs, but the driver might be failing to load on 320 cpus systems due to the fact that FW reserved EQs were not available to the driver. Now the driver has to obtain max_num_eqs value from new FW to get real number of EQs available. Signed-off-by:
Denis Drozdov <denisd@mellanox.com> Reviewed-by:
Alex Vesker <valex@mellanox.com> Signed-off-by:
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Wei Yongjun authored
Add the missing unlock before return from function hwsim_add_one() in the error handling case. Fixes: f25da51f ("ieee802154: hwsim: add replacement for fakelb") Signed-off-by:
Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by:
Stefan Schmidt <stefan@datenfreihafen.org> Signed-off-by:
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Wei Yongjun authored
The return value from kzalloc() is not checked correctly. The test is done against a wrong variable. This patch fix it. Fixes: f25da51f ("ieee802154: hwsim: add replacement for fakelb") Signed-off-by:
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Alexander Aring authored
This patch adds missing rcu_assign_pointer()/rcu_dereference() to used rcu pointers. There was already a previous commit c5d99d2b ("ieee802154: hwsim: fix rcu address annotation"), but there was more which was pointed out on my side by using newest sparse version. Cc: Stefan Schmidt <stefan@datenfreihafen.org> Fixes: f25da51f ("ieee802154: hwsim: add replacement for fakelb") Signed-off-by:
Alexander Aring <aring@mojatatu.com> Signed-off-by:
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- 08 Aug, 2018 2 commits
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Zhao Chen authored
This patch fixes the problem below. The problem can be reproduced by the following steps: 1) Connecting all HiNIC interfaces 2) On server side # sudo ifconfig eth0 192.168.100.1 up #Using MLX CX4 card # iperf -s 3) On client side # sudo ifconfig eth0 192.168.100.2 up #Using our HiNIC card # iperf -c 192.168.101.1 -P 10 -t 100000 after hours of testing, we will see errors: hinic 0000:05:00.0: No MGMT msg handler, mod = 0 hinic 0000:05:00.0: No MGMT msg handler, mod = 0 hinic 0000:05:00.0: No MGMT msg handler, mod = 0 hinic 0000:05:00.0: No MGMT msg handler, mod = 0 The errors are caused by the following problem. 1) The hinic_get_wqe() checks the "wq->delta" to allocate new WQEs: if (atomic_sub_return(num_wqebbs, &wq->delta) <= 0) { atomic_add(num_wqebbs, &wq->delta); return ERR_PTR(-EBUSY); } If the WQE occupies multiple pages, the shadow WQE will be used. Then the hinic_xmit_frame() fills the WQE. 2) While in parallel with 1), the free_tx_poll() checks the "wq->delta" to free old WQEs: if ((atomic_read(&wq->delta) + num_wqebbs) > wq->q_depth) return ERR_PTR(-EBUSY); There is a probability that the shadow WQE which hinic_xmit_frame() is using will be damaged by copy_wqe_to_shadow(): if (curr_pg != end_pg) { void *shadow_addr = &wq->shadow_wqe[curr_pg * wq->max_wqe_size]; copy_wqe_to_shadow(wq, shadow_addr, num_wqebbs, *cons_idx); return shadow_addr; } This can cause WQE data error and you will see the above error messages. This patch fixes the problem. Signed-off-by:Zhao Chen <zhaochen6@huawei.com> Signed-off-by:
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zhong jiang authored
The ret is modified after initalization, so just remove it and return 0. Signed-off-by:
zhong jiang <zhongjiang@huawei.com> Signed-off-by:
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