1. 15 Mar, 2019 1 commit
  2. 26 Feb, 2019 12 commits
  3. 12 Feb, 2019 3 commits
  4. 01 Feb, 2019 20 commits
    • Russell King's avatar
      ARM: avoid Cortex-A9 livelock on tight dmb loops · 5388a5b8
      Russell King authored
      machine_crash_nonpanic_core() does this:
      
      	while (1)
      		cpu_relax();
      
      because the kernel has crashed, and we have no known safe way to deal
      with the CPU.  So, we place the CPU into an infinite loop which we
      expect it to never exit - at least not until the system as a whole is
      reset by some method.
      
      In the absence of erratum 754327, this code assembles to:
      
      	b	.
      
      In other words, an infinite loop.  When erratum 754327 is enabled,
      this becomes:
      
      1:	dmb
      	b	1b
      
      It has been observed that on some systems (eg, OMAP4) where, if a
      crash is triggered, the system tries to kexec into the panic kernel,
      but fails after taking the secondary CPU down - placing it into one
      of these loops.  This causes the system to livelock, and the most
      noticable effect is the system stops after issuing:
      
      	Loading crashdump kernel...
      
      to the system console.
      
      The tested as working solution I came up with was to add wfe() to
      these infinite loops thusly:
      
      	while (1) {
      		cpu_relax();
      		wfe();
      	}
      
      which, without 754327 builds to:
      
      1:	wfe
      	b	1b
      
      or with 754327 is enabled:
      
      1:	dmb
      	wfe
      	b	1b
      
      Adding "wfe" does two things depending on the environment we're running
      under:
      - where we're running on bare metal, and the processor implements
        "wfe", it stops us spinning endlessly in a loop where we're never
        going to do any useful work.
      - if we're running in a VM, it allows the CPU to be given back to the
        hypervisor and rescheduled for other purposes (maybe a different VM)
        rather than wasting CPU cycles inside a crashed VM.
      
      However, in light of erratum 794072, Will Deacon wanted to see 10 nops
      as well - which is reasonable to cover the case where we have erratum
      754327 enabled _and_ we have a processor that doesn't implement the
      wfe hint.
      
      So, we now end up with:
      
      1:      wfe
              b       1b
      
      when erratum 754327 is disabled, or:
      
      1:      dmb
              nop
              nop
              nop
              nop
              nop
              nop
              nop
              nop
              nop
              nop
              wfe
              b       1b
      
      when erratum 754327 is enabled.  We also get the dmb + 10 nop
      sequence elsewhere in the kernel, in terminating loops.
      
      This is reasonable - it means we get the workaround for erratum
      794072 when erratum 754327 is enabled, but still relinquish the dead
      processor - either by placing it in a lower power mode when wfe is
      implemented as such or by returning it to the hypervisior, or in the
      case where wfe is a no-op, we use the workaround specified in erratum
      794072 to avoid the problem.
      
      These as two entirely orthogonal problems - the 10 nops addresses
      erratum 794072, and the wfe is an optimisation that makes the system
      more efficient when crashed either in terms of power consumption or
      by allowing the host/other VMs to make use of the CPU.
      
      I don't see any reason not to use kexec() inside a VM - it has the
      potential to provide automated recovery from a failure of the VMs
      kernel with the opportunity for saving a crashdump of the failure.
      A panic() with a reboot timeout won't do that, and reading the
      libvirt documentation, setting on_reboot to "preserve" won't either
      (the documentation states "The preserve action for an on_reboot event
      is treated as a destroy".)  Surely it has to be a good thing to
      avoiding having CPUs spinning inside a VM that is doing no useful
      work.
      Acked-by: default avatarWill Deacon <will.deacon@arm.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      5388a5b8
    • Russell King's avatar
      ARM: smp: remove arch-provided "pen_release" · 6213f70e
      Russell King authored
      Consolidating the "pen_release" stuff amongst the various SoC
      implementations gives credence to having a CPU holding pen for
      secondary CPUs.  However, this is far from the truth.
      
      Many SoC implementations cargo-cult copied various bits of the pen
      release implementation from the initial Realview/Versatile Express
      implementation without understanding what it was or why it existed.
      The reason it existed is because these are _development_ platforms,
      and some board firmware is unable to individually control the
      startup of secondary CPUs.  Moreover, they do not have a way to
      power down or reset secondary CPUs for hot-unplug.  Hence, the
      pen_release implementation was designed for ARM Ltd's development
      platforms to provide a working implementation, even though it is
      very far from what is required.
      
      It was decided a while back to reduce the duplication by consolidating
      the "pen_release" variable, but this only made the situation worse -
      we have ended up with several implementations that read this variable
      but do not write it - again, showing the cargo-cult mentality at work,
      lack of proper review of new code, and in some cases a lack of testing.
      
      While it would be preferable to remove pen_release entirely from the
      kernel, this is not possible without help from the SoC maintainers,
      which seems to be lacking.  However, I want to remove pen_release from
      arch code to remove the credence that having it gives.
      
      This patch removes pen_release from the arch code entirely, adding
      private per-SoC definitions for it instead, and explicitly stating
      that write_pen_release() is cargo-cult copied and should not be
      copied any further.  Rename write_pen_release() in a similar fashion
      as well.
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      6213f70e
    • Russell King's avatar
      ARM: actions: remove boot_lock and pen_release · 70678554
      Russell King authored
      The actions SMP implementation has several issues:
      
      1. pen_release is only ever read and compared to -1, and is defined in
         arch/arm/kernel/smp.c to be -1.  This test will always succeed.
      
      2. we are already guaranteed to be single threaded while bringing up a
         CPU, so the spinlock makes no sense, remove it.
      
      3. owl_secondary_startup() is not referenced nor defined, the prototype
         is redundant, remove it.
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      70678554
    • Russell King's avatar
      ARM: oxnas: remove CPU hotplug implementation · 0eb03799
      Russell King authored
      The CPU hotplug implementation on this platform is cargo-culted from
      the plat-versatile implementation, and is buggy.  Once a CPU hits the
      "low power" loop, it will wait for pen_release to be set to the CPU
      number to wake up again - but nothing in this implementation does that.
      
      So, once a CPU has entered cpu_die() it will never, ever leave.
      
      Remove this useless cargo-culted implementation.
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      0eb03799
    • Russell King's avatar
      ARM: qcom: remove unnecessary boot_lock · d0e22329
      Russell King authored
      The boot_lock is something that was required for ARM development
      platforms to ensure that the delay calibration worked properly.  This
      is not necessary for modern platforms that have better bus bandwidth
      and do not need to calibrate the delay loop for secondary cores.
      Remove the boot_lock entirely.
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      d0e22329
    • Dietmar Eggemann's avatar
      ARM: 8824/1: fix a migrating irq bug when hotplug cpu · 1b5ba350
      Dietmar Eggemann authored
      Arm TC2 fails cpu hotplug stress test.
      
      This issue was tracked down to a missing copy of the new affinity
      cpumask for the vexpress-spc interrupt into struct
      irq_common_data.affinity when the interrupt is migrated in
      migrate_one_irq().
      
      Fix it by replacing the arm specific hotplug cpu migration with the
      generic irq code.
      
      This is the counterpart implementation to commit 217d453d ("arm64:
      fix a migrating irq bug when hotplug cpu").
      
      Tested with cpu hotplug stress test on Arm TC2 (multi_v7_defconfig plus
      CONFIG_ARM_BIG_LITTLE_CPUFREQ=y and CONFIG_ARM_VEXPRESS_SPC_CPUFREQ=y).
      The vexpress-spc interrupt (irq=22) on this board is affine to CPU0.
      Its affinity cpumask now changes correctly e.g. from 0 to 1-4 when
      CPU0 is hotplugged out.
      Suggested-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: default avatarDietmar Eggemann <dietmar.eggemann@arm.com>
      Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
      Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      1b5ba350
    • Vladimir Murzin's avatar
      ARM: 8832/1: NOMMU: Limit visibility for CONFIG_FLASH_{MEM_BASE,SIZE} · 49e30bd0
      Vladimir Murzin authored
      It looks like usage of CONFIG_FLASH_{MEM_BASE,SIZE} is limited with:
      
      arch/arm/mm/proc-arm740.S
      arch/arm/mm/proc-arm940.S
      arch/arm/mm/proc-arm946.S
      
      So it might look confusing to see the option for anything except these.
      Signed-off-by: default avatarVladimir Murzin <vladimir.murzin@arm.com>
      Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      49e30bd0
    • Peng Hao's avatar
      ARM: 8831/1: NOMMU: pmsa-v8: remove unneeded semicolon · 49f30235
      Peng Hao authored
      Remove unneeded semicolon.
      
      [vladimir] proper tags in subject line
      Signed-off-by: default avatarPeng Hao <peng.hao2@zte.com.cn>
      Acked-by: default avatarVladimir Murzin <vladimir.murzin@arm.com>
      Signed-off-by: default avatarVladimir Murzin <vladimir.murzin@arm.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      49f30235
    • Vladimir Murzin's avatar
      ARM: 8830/1: NOMMU: Toggle only bits in EXC_RETURN we are really care of · 72cd4064
      Vladimir Murzin authored
      ARMv8M introduces support for Security extension to M class, among
      other things it affects exception handling, especially, encoding of
      EXC_RETURN.
      
      The new bits have been added:
      
      Bit [6]	Secure or Non-secure stack
      Bit [5]	Default callee register stacking
      Bit [0]	Exception Secure
      
      which conflicts with hard-coded value of EXC_RETURN:
      
      In fact, we only care of few bits:
      
      Bit [3]	 Mode (0 - Handler, 1 - Thread)
      Bit [2]	 Stack pointer selection (0 - Main, 1 - Process)
      
      We can toggle only those bits and left other bits as they were on
      exception entry.
      
      It is basically, what patch does - saves EXC_RETURN when we do
      transition form Thread to Handler mode (it is first svc), so later
      saved value is used instead of EXC_RET_THREADMODE_PROCESSSTACK.
      Signed-off-by: default avatarVladimir Murzin <vladimir.murzin@arm.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      72cd4064
    • Stefan Agner's avatar
      ARM: 8829/1: spinlock: use unified assembler language syntax · eb7ff902
      Stefan Agner authored
      Convert the conditional infix to a postfix to make sure this inline
      assembly is unified syntax. Since gcc assumes non-unified syntax
      when emitting ARM instructions, make sure to define the syntax as
      unified.
      
      This allows to use LLVM's integrated assembler.
      Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      eb7ff902
    • Stefan Agner's avatar
      ARM: 8828/1: uaccess: use unified assembler language syntax · 32fdb046
      Stefan Agner authored
      Convert the conditional infix to a postfix to make sure this inline
      assembly is unified syntax. Since gcc assumes non-unified syntax
      when emitting ARM instructions, make sure to define the syntax as
      unified.
      
      This allows to use LLVM's integrated assembler.
      Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      32fdb046
    • Stefan Agner's avatar
      ARM: 8827/1: fix argument count to match macro definition · baf2df8e
      Stefan Agner authored
      The macro str8w takes 10 arguments, abort being the 10th. In this
      particular instantiation the abort argument is passed as 11th
      argument leading to an error when using LLVM's integrated
      assembler:
        <instantiation>:46:47: error: too many positional arguments
          str8w r0, r3, r4, r5, r6, r7, r8, r9, ip, , abort=19f
                                                      ^
        arch/arm/lib/copy_template.S:277:5: note: while in macro instantiation
        18: forward_copy_shift pull=24 push=8
            ^
      
      The argument is not used in the macro hence this does not change
      code generation.
      Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
      Reviewed-by: default avatarNicolas Pitre <nico@linaro.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      baf2df8e
    • Doug Berger's avatar
      ARM: 8826/1: mm: initialize pfn limits with find_limits() · 071d184a
      Doug Berger authored
      The max_low_pfn value must be set before sparse_init() is called to
      keep the early memblock allocations and frees balanced for kmemleak
      initialization when sparsemem is enabled.
      
      This commit accomplishes that by replacing the local variables min,
      max_low, and max_high with the global limit variables min_low_pfn,
      max_low_pfn, and max_pfn respectively in bootmem_init(). The global
      variables are initialized directly by find_limits() and used in the
      remainder of the function.
      
      Fixes: 9099daed ("mm: kmemleak: avoid using __va() on addresses that don't have a lowmem mapping")
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Acked-by: default avatarMike Rapoport <rppt@linux.ibm.com>
      Signed-off-by: default avatarDoug Berger <opendmb@gmail.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      071d184a
    • Vincent Whitchurch's avatar
      ARM: 8823/1: Implement pgprot_device() · 58ca3382
      Vincent Whitchurch authored
      This is used when mmapping the PCI resource* files in sys.  Because ARM
      currently lacks an implementation of pgprot_device(), it falls back to
      pgprot_uncached() (Strongly Ordered), but we should be able to use
      Device memory instead.
      
      Doing this speeds up large writes to the resource files by about 40% on
      one of my systems.  It also ensures that mmaps on these resources use
      the same memory type as ioremap().
      Signed-off-by: default avatarVincent Whitchurch <vincent.whitchurch@axis.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      58ca3382
    • Geert Uytterhoeven's avatar
      ARM: 8822/1: smp_twd: Remove legacy TWD registration · fec9eac6
      Geert Uytterhoeven authored
      As of commit 7484c727 ("ARM: realview: delete the RealView board
      files"), the ARM Timer and Watchdog Unit is instantiated from DT only.
      Moreover, the driver is selected from ARCH_MULTIPLATFORM platforms only,
      which implies OF, TIMER_OF, and COMMON_CLK.
      
      Hence remove all unused legacy infrastructure from the driver.
      Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
      Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      fec9eac6
    • Geert Uytterhoeven's avatar
      ARM: 8821/1: Correct meaning of SCU in HAVE_ARM_SCU help txt · 8f433ec4
      Geert Uytterhoeven authored
      According to the ARM Cortex-A5 and Cortex-A9 Technical Reference
      Manuals, SCU stands for "Snoop Control Unit".
      Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      8f433ec4
    • Geert Uytterhoeven's avatar
      ARM: 8820/1: mm: Stop printing the virtual memory layout · 1c31d4e9
      Geert Uytterhoeven authored
      Since commit ad67b74d ("printk: hash addresses printed with
      %p"), the virtual memory layout printed during boot up contains "ptrval"
      instead of actual addresses:
      
          Memory: 501296K/524288K available (6144K kernel code, 528K rwdata, 1944K rodata, 1024K init, 7584K bss, 22992K reserved, 0K cma-reserved)
          Virtual kernel memory layout:
      	vector  : 0xffff0000 - 0xffff1000   (   4 kB)
      	fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
      	vmalloc : 0xe0800000 - 0xff800000   ( 496 MB)
      	lowmem  : 0xc0000000 - 0xe0000000   ( 512 MB)
      	modules : 0xbf000000 - 0xc0000000   (  16 MB)
      	  .text : 0x(ptrval) - 0x(ptrval)   (7136 kB)
      	  .init : 0x(ptrval) - 0x(ptrval)   (1024 kB)
      	  .data : 0x(ptrval) - 0x(ptrval)   ( 529 kB)
      	   .bss : 0x(ptrval) - 0x(ptrval)   (7585 kB)
      
      Instead of changing the printing to "%px", and leaking virtual memory
      layout information again, just remove the printing completely, cfr. e.g.
      commits 071929db ("arm64: Stop printing the virtual memory
      layout") and  31833332 ("m68k/mm: Stop printing the virtual
      memory layout").
      
      All interesting information (actual section sizes) is already printed by
      mem_init_print_info() just above anyway.
      Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
      Reviewed-by: default avatarKees Cook <keescook@chromium.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      1c31d4e9
    • Nathan Chancellor's avatar
      ARM: 8819/1: Remove '-p' from LDFLAGS · 091bb549
      Nathan Chancellor authored
      This option is not supported by lld:
      
          ld.lld: error: unknown argument: -p
      
      This has been a no-op in binutils since 2004 (see commit dea514f51da1 in
      that tree). Given that the lowest officially supported of binutils for
      the kernel is 2.20, which was released in 2009, nobody needs this flag
      around so just remove it. Commit 1a381d4a ("arm64: remove no-op -p
      linker flag") did the same for arm64.
      Signed-off-by: default avatarNathan Chancellor <natechancellor@gmail.com>
      Acked-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
      Acked-by: default avatarNicolas Pitre <nico@linaro.org>
      Reviewed-by: default avatarNick Desaulniers <ndesaulniers@google.com>
      Reviewed-by: default avatarStefan Agner <stefan@agner.ch>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      091bb549
    • Wolfram Sang (Renesas)'s avatar
      ARM: 8818/1: dma-mapping: update comment about handling dma_ops when detaching from IOMMU · 4a4d68fc
      Wolfram Sang (Renesas) authored
      Update the comment because we don't set the pointer to NULL anymore.
      Also use the correct pointer name 'dma_ops' instead of 'dma_map_ops'.
      
      Fixes: 1874619a ("ARM: dma-mapping: Set proper DMA ops in arm_iommu_detach_device()")
      Signed-off-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
      Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      4a4d68fc
    • Ard Biesheuvel's avatar
      ARM: 8817/1: mm: skip cleaning of idmap page tables on LPAE capable cores · 9ec5cd0a
      Ard Biesheuvel authored
      Currently, init_static_idmap() installs some page table entries to
      cover the identity mapped part of the kernel image (which is only
      about 160 bytes in size in a multi_v7_defconfig Thumb2 build), and
      calls flush_cache_louis() to ensure that the updates are visible
      to the page table walker on the same core.
      
      When running under virtualization, flush_cache_louis() may take more
      than 10 seconds to complete:
      
      [    0.108192] Setting up static identity map for 0x40300000 - 0x403000a0
      [   13.078127] rcu: Hierarchical SRCU implementation.
      
      This is due to the fact that set/way ops are not virtualizable, and so
      KVM may trap each one, resulting in a substantial delay.
      
      Since only LPAE capable CPUs may execute under virtualization, and
      considering that LPAE capable CPUs are guaranteed to have cache
      coherent page table walkers (per the architecture), let's only
      perform this cache maintenance on non-LPAE cores.
      
      Cc: Will Deacon <will.deacon@arm.com>
      Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      9ec5cd0a
  5. 07 Jan, 2019 3 commits
    • Linus Torvalds's avatar
      Linux 5.0-rc1 · bfeffd15
      Linus Torvalds authored
      bfeffd15
    • Linus Torvalds's avatar
      Merge tag 'kbuild-v4.21-3' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild · 85e1ffbd
      Linus Torvalds authored
      Pull more Kbuild updates from Masahiro Yamada:
      
       - improve boolinit.cocci and use_after_iter.cocci semantic patches
      
       - fix alignment for kallsyms
      
       - move 'asm goto' compiler test to Kconfig and clean up jump_label
         CONFIG option
      
       - generate asm-generic wrappers automatically if arch does not
         implement mandatory UAPI headers
      
       - remove redundant generic-y defines
      
       - misc cleanups
      
      * tag 'kbuild-v4.21-3' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild:
        kconfig: rename generated .*conf-cfg to *conf-cfg
        kbuild: remove unnecessary stubs for archheader and archscripts
        kbuild: use assignment instead of define ... endef for filechk_* rules
        arch: remove redundant UAPI generic-y defines
        kbuild: generate asm-generic wrappers if mandatory headers are missing
        arch: remove stale comments "UAPI Header export list"
        riscv: remove redundant kernel-space generic-y
        kbuild: change filechk to surround the given command with { }
        kbuild: remove redundant target cleaning on failure
        kbuild: clean up rule_dtc_dt_yaml
        kbuild: remove UIMAGE_IN and UIMAGE_OUT
        jump_label: move 'asm goto' support test to Kconfig
        kallsyms: lower alignment on ARM
        scripts: coccinelle: boolinit: drop warnings on named constants
        scripts: coccinelle: check for redeclaration
        kconfig: remove unused "file" field of yylval union
        nds32: remove redundant kernel-space generic-y
        nios2: remove unneeded HAS_DMA define
      85e1ffbd
    • Linus Torvalds's avatar
      Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · ac5eed2b
      Linus Torvalds authored
      Pull perf tooling updates form Ingo Molnar:
       "A final batch of perf tooling changes: mostly fixes and small
        improvements"
      
      * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (29 commits)
        perf session: Add comment for perf_session__register_idle_thread()
        perf thread-stack: Fix thread stack processing for the idle task
        perf thread-stack: Allocate an array of thread stacks
        perf thread-stack: Factor out thread_stack__init()
        perf thread-stack: Allow for a thread stack array
        perf thread-stack: Avoid direct reference to the thread's stack
        perf thread-stack: Tidy thread_stack__bottom() usage
        perf thread-stack: Simplify some code in thread_stack__process()
        tools gpio: Allow overriding CFLAGS
        tools power turbostat: Override CFLAGS assignments and add LDFLAGS to build command
        tools thermal tmon: Allow overriding CFLAGS assignments
        tools power x86_energy_perf_policy: Override CFLAGS assignments and add LDFLAGS to build command
        perf c2c: Increase the HITM ratio limit for displayed cachelines
        perf c2c: Change the default coalesce setup
        perf trace beauty ioctl: Beautify USBDEVFS_ commands
        perf trace beauty: Export function to get the files for a thread
        perf trace: Wire up ioctl's USBDEBFS_ cmd table generator
        perf beauty ioctl: Add generator for USBDEVFS_ ioctl commands
        tools headers uapi: Grab a copy of usbdevice_fs.h
        perf trace: Store the major number for a file when storing its pathname
        ...
      ac5eed2b
  6. 06 Jan, 2019 1 commit
    • Linus Torvalds's avatar
      Change mincore() to count "mapped" pages rather than "cached" pages · 574823bf
      Linus Torvalds authored
      The semantics of what "in core" means for the mincore() system call are
      somewhat unclear, but Linux has always (since 2.3.52, which is when
      mincore() was initially done) treated it as "page is available in page
      cache" rather than "page is mapped in the mapping".
      
      The problem with that traditional semantic is that it exposes a lot of
      system cache state that it really probably shouldn't, and that users
      shouldn't really even care about.
      
      So let's try to avoid that information leak by simply changing the
      semantics to be that mincore() counts actual mapped pages, not pages
      that might be cheaply mapped if they were faulted (note the "might be"
      part of the old semantics: being in the cache doesn't actually guarantee
      that you can access them without IO anyway, since things like network
      filesystems may have to revalidate the cache before use).
      
      In many ways the old semantics were somewhat insane even aside from the
      information leak issue.  From the very beginning (and that beginning is
      a long time ago: 2.3.52 was released in March 2000, I think), the code
      had a comment saying
      
        Later we can get more picky about what "in core" means precisely.
      
      and this is that "later".  Admittedly it is much later than is really
      comfortable.
      
      NOTE! This is a real semantic change, and it is for example known to
      change the output of "fincore", since that program literally does a
      mmmap without populating it, and then doing "mincore()" on that mapping
      that doesn't actually have any pages in it.
      
      I'm hoping that nobody actually has any workflow that cares, and the
      info leak is real.
      
      We may have to do something different if it turns out that people have
      valid reasons to want the old semantics, and if we can limit the
      information leak sanely.
      
      Cc: Kevin Easton <kevin@guarana.org>
      Cc: Jiri Kosina <jikos@kernel.org>
      Cc: Masatake YAMATO <yamato@redhat.com>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Greg KH <gregkh@linuxfoundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Michal Hocko <mhocko@suse.com>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      574823bf