- 30 Mar, 2017 40 commits
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Christian König authored
Not the best solution, but good enough for now. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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Christian König authored
Update all levels of the page directory. V2: a. sub level pdes always are written to incorrect place. b. sub levels need to update regardless of parent updates. Signed-off-by: Christian König <christian.koenig@amd.com> (V1) Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (V1) Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> (V2) Acked-by: Alex Deucher <alexander.deucher@amd.com> (V2) Signed-off-by: -
Christian König authored
Move all levels to the end after command submission. Signed-off-by:
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Christian König authored
All page directory levels should be in place after this. Signed-off-by:
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Christian König authored
Allows us to get the size for all levels as well. v2: agd: fix warning Signed-off-by:
Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by:
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Christian König authored
No functional change, but the base for multi level page tables. Signed-off-by:
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Christian König authored
Needs to be filled with handling. Signed-off-by:
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Christian König authored
This way we save passing it through the different functions. Signed-off-by:
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Christian König authored
Decribes better what this is used for. Signed-off-by:
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Rex Zhu authored
for power readings. Signed-off-by:
Rex Zhu <Rex.Zhu@amd.com> Reviewed-by:
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Huang Rui authored
Signed-off-by:
Huang Rui <ray.huang@amd.com> Reviewed-by:
Edward O'Callaghan <funfunctor@folklore1984.net> Signed-off-by:
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Huang Rui authored
Signed-off-by:
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Huang Rui authored
v2: squash register typo fix from Ray v3: fix spelling Signed-off-by:
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Huang Rui authored
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Huang Rui authored
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Alex Deucher authored
The ring structure already has what we need. Reviewed-by:
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Alex Deucher authored
Avoids passing around additional parameters during setup. Reviewed-by:
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Alex Deucher authored
Everything we need is in the ring structure. No need to pass all the bits explicitly. Reviewed-by:
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Alex Deucher authored
It's required. Reviewed-by:
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Alex Deucher authored
It's required. Reviewed-by:
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Alex Deucher authored
To better match where they are used. Called from sw_init and sw_fini. Reviewed-by:
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Alex Deucher authored
Reviewed-by:
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Harry Wentland authored
Signed-off-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
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Xiangliang Yu authored
For MM sriov, need use MMSCH to init engine and the init procedures are all saved in mm table. Signed-off-by:
Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by:
Monk Liu <Monk.Liu@amd.com> Reviewed-by:
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Xiangliang Yu authored
For MM SRIOV, need to prepare MM table send send it to MMSCH to initial UVD & VCE engine. Create new header file for the structures. Signed-off-by:
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Xiangliang Yu authored
In order to not break SRIOV gfx development, will revert this patch after vce proved working. Signed-off-by:
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Xiangliang Yu authored
Allocate MM table for sriov device. Signed-off-by:
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Xiangliang Yu authored
Add new structure for MM table for multi media scheduler of sriov. Signed-off-by:
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Xiangliang Yu authored
disable uvd for sriov temporarily. Signed-off-by:
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Xiangliang Yu authored
VCE SRIOV need use doorbell and only works on VCN0 ring now Signed-off-by:
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Xiangliang Yu authored
For SRIOV, MM don't need to care about PG & CG, skip it. Signed-off-by:
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Monk Liu authored
Signed-off-by:
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Alex Deucher authored
Enable virtual displays if the user has enabled them via the kernel command line. Useful in virtual or headless environments. Reviewed-by:
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Xiangliang Yu authored
VF need virtual dce, enable it if device is vf. Signed-off-by:
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Xiangliang Yu authored
If gpu device is vf, set virt ops so that guest can talk with GPU hypervisor. Signed-off-by:
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Xiangliang Yu authored
Implement mailbox protocol for AI so that guest vf can communicate with GPU hypervisor. Signed-off-by:
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Xiangliang Yu authored
If enable DPM for VF, always get lot of warn_slow_patch_null in dmesg and vf doesn't support DPM. Signed-off-by:
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Xiangliang Yu authored
two reasons: 1. there is a spinlock around; 2. vm register is pf/vf copy, vf can access via mmio safely. Signed-off-by:
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Xiangliang Yu authored
Bypass PSP block for VF device. Signed-off-by:
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Monk Liu authored
Rework sdma init to support SR-IOV. Signed-off-by:
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