1. 02 Mar, 2017 1 commit
  2. 01 Mar, 2017 5 commits
  3. 24 Feb, 2017 4 commits
  4. 23 Feb, 2017 13 commits
  5. 17 Feb, 2017 3 commits
    • Zhao, Xinda's avatar
      drm/i915/gvt: handle fence reg access during GPU reset · d1be371d
      Zhao, Xinda authored
      Lots of reduntant log info will be printed out during GPU reset,
      including accessing untracked mmio register and fence register,
      variable disable_warn_untrack is added previously to handle the
      situation, but the accessing of fence register is ignored in the
      previously patch, so add it back.
      
      Besides, set the variable disable_warn_untrack to the defalut value
      after GPU reset is finished.
      Signed-off-by: default avatarZhao, Xinda <xinda.zhao@intel.com>
      Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
      d1be371d
    • Min He's avatar
      drm/i915/gvt: introduced failsafe mode into vgpu · fd64be63
      Min He authored
      New failsafe mode is introduced, when we detect guest not supporting
      GVT-g.
      In failsafe mode, we will ignore all the MMIO and cfg space read/write
      from guest.
      
      This patch can fix the issue that when guest kernel or graphics driver
      version is too low, there will be a lot of kernel traces in host.
      
      V5: rebased onto latest gvt-staging
      V4: changed coding style by Zhenyu and Ping's advice
      V3: modified coding style and error messages according to Zhenyu's comment
      V2: 1) implemented MMIO/GTT/WP pages read/write logic; 2) used a unified
      function to enter failsafe mode
      Signed-off-by: default avatarMin He <min.he@intel.com>
      Signed-off-by: default avatarPei Zhang <pei.zhang@intel.com>
      Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
      fd64be63
    • Zhenyu Wang's avatar
      drm/i915/gvt: Fix check error on opregion.c · f655e67a
      Zhenyu Wang authored
      As we switched to memremap for opregion, shouldn't use any __iomem
      for that, and move to use memcpy instead.
      
      This fixed static check errors for:
      
        CHECK   drivers/gpu/drm/i915//gvt/opregion.c
        drivers/gpu/drm/i915//gvt/opregion.c:142:31: warning: incorrect type in argument 1 (different address spaces)
        drivers/gpu/drm/i915//gvt/opregion.c:142:31:    expected void *addr
        drivers/gpu/drm/i915//gvt/opregion.c:142:31:    got void [noderef] <asn:2>*opregion_va
        drivers/gpu/drm/i915//gvt/opregion.c:160:35: warning: incorrect type in assignment (different address spaces)
        drivers/gpu/drm/i915//gvt/opregion.c:160:35:    expected void [noderef] <asn:2>*opregion_va
        drivers/gpu/drm/i915//gvt/opregion.c:160:35:    got void *
      Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
      f655e67a
  6. 14 Feb, 2017 6 commits
  7. 10 Feb, 2017 1 commit
    • Changbin Du's avatar
      drm/i915/gvt: fix crash at function release_shadow_wa_ctx · 7e5f3d30
      Changbin Du authored
      In function dispatch_workload(), if it fail before calling
      intel_gvt_scan_and_shadow_wa_ctx(), the indirect ctx will
      not be shadowed so no cleaup need. wa_ctx->indirect_ctx.obj
      indicate whether indirect_ctx is shadowed. The obj is null
      if it is unshadowed.
      
      BUG: unable to handle kernel NULL pointer dereference at
      00000000000001a0
      IP: complete_execlist_workload+0x2c9/0x3e0 [i915]
      Oops: 0002 [#1] SMP
      task: ffff939546d2d880 task.stack: ffffbd9b82ac4000
      RIP: 0010:complete_execlist_workload+0x2c9/0x3e0 [i915]
      RSP: 0018:ffffbd9b82ac7dd8 EFLAGS: 00010202
      RAX: 0000000000000000 RBX: ffff9393c725b540 RCX: 0000000000000006
      RDX: 0000000000000007 RSI: 0000000000000202 RDI: ffff939559c8dd00
      RBP: ffffbd9b82ac7e18 R08: 0000000000000001 R09: 000000000120dd8f
      R10: 0000000000000000 R11: 000000000120dd8f R12: ffff9393c725b540
      R13: ffff9393c725b618 R14: ffffbd9b81f0d000 R15: ffff939520e0e000
      FS:  0000000000000000(0000) GS:ffff939559c80000(0000)
      knlGS:0000000000000000
      CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      CR2: 00000000000001a0 CR3: 000000043d664000 CR4: 00000000003426e0
      DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
      DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
      Call Trace:
       workload_thread+0x312/0xd70 [i915]
       ? __wake_up_sync+0x20/0x20
       ? wake_atomic_t_function+0x60/0x60
       kthread+0x101/0x140
      Signed-off-by: default avatarChangbin Du <changbin.du@intel.com>
      Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
      7e5f3d30
  8. 09 Feb, 2017 6 commits
  9. 08 Feb, 2017 1 commit