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  1. 21 Apr, 2020 1 commit
  2. 20 Mar, 2020 1 commit
    • Lucas Stach's avatar
      drm/etnaviv: request pages from DMA32 zone when needed · b72af445
      Lucas Stach authored
      Some Vivante GPUs are found in systems that have interconnects restricted
      to 32 address bits, but may have system memory mapped above the 4GB mark.
      As this region isn't accessible to the GPU via DMA any GPU memory allocated
      in the upper part needs to go through SWIOTLB bounce buffering. This kills
      performance if it happens too often, as well as overrunning the available
      bounce buffer space, as the GPU buffer may stay mapped for a long time.
      
      Avoid bounce buffering by checking the addressing restrictions. If the
      GPU is unable to access memory above the 4GB mark, request our SHM buffers
      to be located in the DMA32 zone.
      Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
      b72af445
  3. 28 Jan, 2020 1 commit
  4. 18 Dec, 2019 3 commits
    • Nirmoy Das's avatar
      drm/scheduler: rework entity creation · b3ac1766
      Nirmoy Das authored
      Entity currently keeps a copy of run_queue list and modify it in
      drm_sched_entity_set_priority(). Entities shouldn't modify run_queue
      list. Use drm_gpu_scheduler list instead of drm_sched_rq list
      in drm_sched_entity struct. In this way we can select a runqueue based
      on entity/ctx's priority for a  drm scheduler.
      Signed-off-by: default avatarNirmoy Das <nirmoy.das@amd.com>
      Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
      Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
      b3ac1766
    • Arnd Bergmann's avatar
      drm/etnaviv: avoid deprecated timespec · 38c4a4cf
      Arnd Bergmann authored
      struct timespec is being removed from the kernel because it often leads
      to code that is not y2038-safe.
      
      In the etnaviv driver, monotonic timestamps are used, which do not suffer
      from overflow, but the usage of timespec here gets in the way of removing
      the interface completely.
      
      Pass down the user-supplied 64-bit value here rather than converting
      it to an intermediate timespec to avoid the conversion.
      
      The conversion is transparent for all regular CLOCK_MONOTONIC values,
      but is a small change in behavior for excessively large values: the
      existing code would treat e.g. tv_sec=0x100000000 the same as tv_sec=0
      and not block, while the new code it would block for up to 2^31
      seconds. The new behavior is more logical here, but if it causes problems,
      the truncation can be put back.
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      38c4a4cf
    • Arnd Bergmann's avatar
      drm/etnaviv: reject timeouts with tv_nsec >= NSEC_PER_SEC · 245595e8
      Arnd Bergmann authored
      Most kernel interfaces that take a timespec require normalized
      representation with tv_nsec between 0 and NSEC_PER_SEC.
      
      Passing values larger than 0x100000000ull further behaves differently
      on 32-bit and 64-bit kernels, and can cause the latter to spend a long
      time counting seconds in timespec64_sub()/set_normalized_timespec64().
      
      Reject those large values at the user interface to enforce sane and
      portable behavior.
      Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      245595e8
  5. 15 Aug, 2019 4 commits
    • Lucas Stach's avatar
      drm/etnaviv: implement softpin · 088880dd
      Lucas Stach authored
      With softpin we allow the userspace to take control over the GPU virtual
      address space. The new capability is relected by a bump of the minor DRM
      version. There are a few restrictions for userspace to take into
      account:
      
      1. The kernel reserves a bit of the address space to implement zero page
      faulting and mapping of the kernel internal ring buffer. Userspace can
      query the kernel for the first usable GPU VM address via
      ETNAVIV_PARAM_SOFTPIN_START_ADDR.
      
      2. We only allow softpin on GPUs, which implement proper process
      separation via PPAS. If softpin is not available the softpin start
      address will be set to ~0.
      
      3. Softpin is all or nothing. A submit using softpin must not use any
      address fixups via relocs.
      Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
      Reviewed-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
      Reviewed-by: default avatarGuido Günther <agx@sigxcpu.org>
      088880dd
    • Lucas Stach's avatar
      drm/etnaviv: implement per-process address spaces on MMUv2 · 17e4660a
      Lucas Stach authored
      This builds on top of the MMU contexts introduced earlier. Instead of having
      one context per GPU core, each GPU client receives its own context.
      
      On MMUv1 this still means a single shared pagetable set is used by all
      clients, but on MMUv2 there is now a distinct set of pagetables for each
      client. As the command fetch is also translated via the MMU on MMUv2 the
      kernel command ringbuffer is mapped into each of the client pagetables.
      
      As the MMU context switch is a bit of a heavy operation, due to the needed
      cache and TLB flushing, this patch implements a lazy way of switching the
      MMU context. The kernel does not have its own MMU context, but reuses the
      last client context for all of its operations. This has some visible impact,
      as the GPU can now only be started once a client has submitted some work and
      we got the client MMU context assigned. Also the MMU context has a different
      lifetime than the general client context, as the GPU might still execute the
      kernel command buffer in the context of a client even after the client has
      completed all GPU work and has been terminated. Only when the GPU is runtime
      suspended or switches to another clients MMU context is the old context
      freed up.
      Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
      Reviewed-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
      Reviewed-by: default avatarGuido Günther <agx@sigxcpu.org>
      17e4660a
    • Lucas Stach's avatar
      drm/etnaviv: rework MMU handling · 27b67278
      Lucas Stach authored
      This reworks the MMU handling to make it possible to have multiple MMU contexts.
      A context is basically one instance of GPU page tables. Currently we have one
      set of page tables per GPU, which isn't all that clever, as it has the
      following two consequences:
      
      1. All GPU clients (aka processes) are sharing the same pagetables, which means
      there is no isolation between clients, but only between GPU assigned memory
      spaces and the rest of the system. Better than nothing, but also not great.
      
      2. Clients operating on the same set of buffers with different etnaviv GPU
      cores, e.g. a workload using both the 2D and 3D GPU, need to map the used
      buffers into the pagetable sets of each used GPU.
      
      This patch reworks all the MMU handling to introduce the abstraction of the
      MMU context. A context can be shared across different GPU cores, as long as
      they have compatible MMU implementations, which is the case for all systems
      with Vivante GPUs seen in the wild.
      
      As MMUv1 is not able to change pagetables on the fly, without a
      "stop the world" operation, which stops GPU, changes pagetables via CPU
      interaction, restarts GPU, the implementation introduces a shared context on
      MMUv1, which is returned whenever there is a request for a new context.
      
      This patch assigns a MMU context to each GPU, so on MMUv2 systems there is
      still one set of pagetables per GPU, but due to the shared context MMUv1
      systems see a change in behavior as now a single pagetable set is used
      across all GPU cores.
      Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
      Reviewed-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
      Reviewed-by: default avatarGuido Günther <agx@sigxcpu.org>
      27b67278
    • Lucas Stach's avatar
      drm/etnaviv: share a single cmdbuf suballoc region across all GPUs · bffe5db8
      Lucas Stach authored
      There is no need for each GPU to have it's own cmdbuf suballocation
      region. Only allocate a single one for the the etnaviv virtual device
      and share it across all GPUs.
      
      As the suballoc space is now potentially shared by more hardware jobs
      running in parallel, double its size to 512KB to avoid contention.
      Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
      Reviewed-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
      Reviewed-by: default avatarGuido Günther <agx@sigxcpu.org>
      bffe5db8
  6. 02 Aug, 2019 2 commits
  7. 26 Jun, 2019 1 commit
  8. 21 Jun, 2019 2 commits
  9. 17 Apr, 2019 1 commit
    • Russell King's avatar
      drm: etnaviv: avoid DMA API warning when importing buffers · 1262cc88
      Russell King authored
      During boot, I get this kernel warning:
      
      WARNING: CPU: 0 PID: 19001 at kernel/dma/debug.c:1301 debug_dma_map_sg+0x284/0x3dc
      etnaviv etnaviv: DMA-API: mapping sg segment longer than device claims to support [len=3145728] [max=65536]
      Modules linked in: ip6t_REJECT nf_reject_ipv6 ip6t_rpfilter xt_tcpudp ipt_REJECT nf_reject_ipv4 xt_conntrack ip_set nfnetlink ebtable_broute ebtable_nat ip6table_raw ip6table_nat nf_nat_ipv6 ip6table_mangle iptable_raw iptable_nat nf_nat_ipv4 nf_nat nf_conntrack nf_defrag_ipv4 nf_defrag_ipv6 libcrc32c iptable_mangle ebtable_filter ebtables ip6table_filter ip6_tables iptable_filter caam_jr error snd_soc_imx_spdif imx_thermal snd_soc_imx_audmux nvmem_imx_ocotp snd_soc_sgtl5000
      caam imx_sdma virt_dma coda rc_cec v4l2_mem2mem snd_soc_fsl_ssi snd_soc_fsl_spdif imx_vdoa imx_pcm_dma videobuf2_dma_contig etnaviv dw_hdmi_cec gpu_sched dw_hdmi_ahb_audio imx6q_cpufreq nfsd sch_fq_codel ip_tables x_tables
      CPU: 0 PID: 19001 Comm: Xorg Not tainted 4.20.0+ #307
      Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
      [<c0019658>] (unwind_backtrace) from [<c001489c>] (show_stack+0x10/0x14)
      [<c001489c>] (show_stack) from [<c07fb420>] (dump_stack+0x9c/0xd4)
      [<c07fb420>] (dump_stack) from [<c00312dc>] (__warn+0xf8/0x124)
      [<c00312dc>] (__warn) from [<c00313d0>] (warn_slowpath_fmt+0x38/0x48)
      [<c00313d0>] (warn_slowpath_fmt) from [<c00b14e8>] (debug_dma_map_sg+0x284/0x3dc)
      [<c00b14e8>] (debug_dma_map_sg) from [<c046eb40>] (drm_gem_map_dma_buf+0xc4/0x13c)
      [<c046eb40>] (drm_gem_map_dma_buf) from [<c04c3314>] (dma_buf_map_attachment+0x38/0x5c)
      [<c04c3314>] (dma_buf_map_attachment) from [<c046e728>] (drm_gem_prime_import_dev+0x74/0x104)
      [<c046e728>] (drm_gem_prime_import_dev) from [<c046e5bc>] (drm_gem_prime_fd_to_handle+0x84/0x17c)
      [<c046e5bc>] (drm_gem_prime_fd_to_handle) from [<c046edd0>] (drm_prime_fd_to_handle_ioctl+0x38/0x4c)
      [<c046edd0>] (drm_prime_fd_to_handle_ioctl) from [<c0460efc>] (drm_ioctl_kernel+0x90/0xc8)
      [<c0460efc>] (drm_ioctl_kernel) from [<c0461114>] (drm_ioctl+0x1e0/0x3b0)
      [<c0461114>] (drm_ioctl) from [<c01cae20>] (do_vfs_ioctl+0x90/0xa48)
      [<c01cae20>] (do_vfs_ioctl) from [<c01cb80c>] (ksys_ioctl+0x34/0x60)
      [<c01cb80c>] (ksys_ioctl) from [<c0009000>] (ret_fast_syscall+0x0/0x28)
      Exception stack(0xd81a9fa8 to 0xd81a9ff0)
      9fa0:                   b6c69c88 bec613f8 00000009 c00c642e bec613f8 b86c4600
      9fc0: b6c69c88 bec613f8 c00c642e 00000036 012762e0 01276348 00000300 012d91f8
      9fe0: b6989f18 bec613dc b697185c b667be5c
      irq event stamp: 47905
      hardirqs last  enabled at (47913): [<c0098824>] console_unlock+0x46c/0x680
      hardirqs last disabled at (47922): [<c0098470>] console_unlock+0xb8/0x680
      softirqs last  enabled at (47754): [<c000a484>] __do_softirq+0x344/0x540
      softirqs last disabled at (47701): [<c0038700>] irq_exit+0x124/0x144
      ---[ end trace af477747acbcc642 ]---
      
      The reason is the contiguous buffer exceeds the default maximum segment
      size of 64K as specified by dma_get_max_seg_size() in
      linux/dma-mapping.h.  Fix this by providing our own segment size, which
      is set to 2GiB to cover the window found in MMUv1 GPUs.
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
      1262cc88
  10. 19 Feb, 2019 1 commit
  11. 04 Jan, 2019 1 commit
    • Linus Torvalds's avatar
      Remove 'type' argument from access_ok() function · 96d4f267
      Linus Torvalds authored
      Nobody has actually used the type (VERIFY_READ vs VERIFY_WRITE) argument
      of the user address range verification function since we got rid of the
      old racy i386-only code to walk page tables by hand.
      
      It existed because the original 80386 would not honor the write protect
      bit when in kernel mode, so you had to do COW by hand before doing any
      user access.  But we haven't supported that in a long time, and these
      days the 'type' argument is a purely historical artifact.
      
      A discussion about extending 'user_access_begin()' to do the range
      checking resulted this patch, because there is no way we're going to
      move the old VERIFY_xyz interface to that model.  And it's best done at
      the end of the merge window when I've done most of my merges, so let's
      just get this done once and for all.
      
      This patch was mostly done with a sed-script, with manual fix-ups for
      the cases that weren't of the trivial 'access_ok(VERIFY_xyz' form.
      
      There were a couple of notable cases:
      
       - csky still had the old "verify_area()" name as an alias.
      
       - the iter_iov code had magical hardcoded knowledge of the actual
         values of VERIFY_{READ,WRITE} (not that they mattered, since nothing
         really used it)
      
       - microblaze used the type argument for a debug printout
      
      but other than those oddities this should be a total no-op patch.
      
      I tried to fix up all architectures, did fairly extensive grepping for
      access_ok() uses, and the changes are trivial, but I may have missed
      something.  Any missed conversion should be trivially fixable, though.
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      96d4f267
  12. 18 Dec, 2018 1 commit
  13. 24 Nov, 2018 1 commit
  14. 07 Nov, 2018 1 commit
  15. 14 Sep, 2018 1 commit
    • Lucas Stach's avatar
      drm/etnaviv: add DMA configuration for etnaviv platform device · 1a866306
      Lucas Stach authored
      The etnaviv device is a virtual device backing the DRM device, which may
      drive multiple hardware GPU core devices. As most of the dma-mapping handling
      is done through the virtual device, we need to make sure that a proper DMA
      setup is in place. The easiest way to get a reasonable configuration is
      to let the virtual device share the DMA configuration with one of the GPU
      devices, so call of_dma_configure() with the right parameters manually.
      
      This assumes that all etnaviv driven GPU devices in the system share the
      same DMA configuration. If we ever encounter a SoC where the GPUs are on
      busses with different offsets or behind different IOMMUs that will require
      much deeper changes to the driver, as we would need to implement etnaviv
      specific versions of most of the DRM helper functions.
      
      For now we should be fine with this solution.
      Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
      Tested-by: default avatarGuido Günther <agx@sigxcpu.org>
      Tested-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
      1a866306
  16. 25 Jul, 2018 1 commit
  17. 13 Jul, 2018 1 commit
  18. 05 Jul, 2018 1 commit
  19. 27 Jun, 2018 2 commits
    • Fabio Estevam's avatar
      drm/etnaviv: Fix driver unregistering · bf6ba3ae
      Fabio Estevam authored
      Russell King reported:
      
      "When removing and reloading the etnaviv module, the following splat
      occurs:
      
      sysfs: cannot create duplicate filename '/devices/platform/etnaviv'
      CPU: 0 PID: 1471 Comm: modprobe Not tainted 4.17.0+ #1608
      Hardware name: Marvell Dove (Cubox)
      Backtrace:
      [<c00157d4>] (dump_backtrace) from [<c0015b8c>] (show_stack+0x18/0x1c)
       r6:ef033e38 r5:ee07b340 r4:edb9d000 r3:00000000
      [<c0015b74>] (show_stack) from [<c0620784>] (dump_stack+0x20/0x28)
      [<c0620764>] (dump_stack) from [<c01bcd24>] (sysfs_warn_dup+0x5c/0x70)
      [<c01bccc8>] (sysfs_warn_dup) from [<c01bce14>] (sysfs_create_dir_ns+0x90/0x98)
      ..."
      
      Commit 246774d1 ("drm/etnaviv: remove the need for a gpu-subsystem
      DT node") introduced DRM registration via
      platform_device_register_simple(), but missed to call
      platform_device_unregister() inside etnaviv_exit().
      
      Fix the problem by calling platform_device_unregister() inside
      etnaviv_exit(). While at it, also rearrange the function calls
      in the exit path to make them happen in the opposite order of
      registration.
      
      Tested on a imx6-sabresd board.
      
      Cc: <stable@vger.kernel.org>
      Fixes: 246774d1 ("drm/etnaviv: remove the need for a gpu-subsystem DT node")
      Reported-by: default avatarRussell King <linux@armlinux.org.uk>
      Signed-off-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
      Reviewed-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
      Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
      bf6ba3ae
    • Fabio Estevam's avatar
      drm/etnaviv: Check for platform_device_register_simple() failure · 45a0faab
      Fabio Estevam authored
      platform_device_register_simple() may fail, so we should better
      check its return value and propagate it in the case of error.
      
      Cc: <stable@vger.kernel.org>
      Fixes: 246774d1 ("drm/etnaviv: remove the need for a gpu-subsystem DT node")
      Signed-off-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
      Reviewed-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
      Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
      45a0faab
  20. 18 May, 2018 2 commits
  21. 15 May, 2018 1 commit
  22. 12 Feb, 2018 2 commits
  23. 02 Jan, 2018 3 commits
  24. 22 Oct, 2017 2 commits
  25. 10 Oct, 2017 2 commits
  26. 08 Aug, 2017 1 commit