1. 08 Feb, 2022 4 commits
  2. 03 Feb, 2022 1 commit
  3. 02 Feb, 2022 3 commits
  4. 01 Feb, 2022 12 commits
  5. 31 Jan, 2022 5 commits
  6. 28 Jan, 2022 1 commit
  7. 26 Jan, 2022 1 commit
  8. 25 Jan, 2022 4 commits
    • Li-hao Kuo's avatar
      spi: Add Sunplus SP7021 schema · a708078e
      Li-hao Kuo authored
      Add bindings for Sunplus SP7021 spi driver
      Signed-off-by: default avatarLi-hao Kuo <lhjeff911@gmail.com>
      Signed-off-by: default avatarMark Brown <broonie@kernel.org>
      a708078e
    • Li-hao Kuo's avatar
    • Mark Brown's avatar
      Update the Icicle Kit device tree · f9a8f627
      Mark Brown authored
      Merge series from conor.dooley@microchip.com <conor.dooley@microchip.com>
      Conor Dooley <conor.dooley@microchip.com>:
      
      From: Conor Dooley <conor.dooley@microchip.com>
      
      This series updates the Microchip Icicle Kit device tree by adding a
      host of peripherals, and some updates to the memory map. In addition,
      the device tree has been split into a third part, which contains "soft"
      peripherals that are in the fpga fabric.
      
      Several of the entries are for peripherals that have not get had their
      drivers upstreamed, so in those cases the dt bindings are included where
      appropriate in order to avoid the many "DT compatible string <x> appears
      un-documented" errors.
      
      Depends on mpfs clock driver series [1] to provide:
      dt-bindings/clock/microchip,mpfs-clock.h
      and on the other changes to the icicle/mpfs device tree from geert
      that are already in linux/riscv/for-next.
      
      Additionally, the interrupt-extended warnings on the plic/clint are
      cleared by [2] & [3].
      
      [1] https://lore.kernel.org/linux-clk/20211216140022.16146-1-conor.dooley@microchip.com/T/
      [2] https://lore.kernel.org/linux-riscv/cover.1639744468.git.geert@linux-m68k.org/
      [3] https://lore.kernel.org/linux-riscv/cover.1639744106.git.geert@linux-m68k.org/
      
      Changes from v3:
      - drop "mailbox: change mailbox-mpfs compatible string", already upstream:
        commit f10b1fc0
      - fix copy paste error in microchip,mpfs-mailbox dt-binding
      - remove whitespace in syscontroller dt entry
      
      Changes from v2:
      - dropped plic int header & corresponding defines in dts{,i}
      - use $ref to drmode in mpfs-musb binding
      - split changes to dts{,i} again: functional changes to existing
        elements now are in a new patch
      - drop num-cs property in mpfs-spi binding
      - dont make the system controller a simple-mfd
      - move the separate bindings for rng/generic system services into the
        system controller binding
      - added an instance corei2c as i2c2 in the fabric dtsi
      - add version numbering to corepwm and corei2c compat string (-rtl-vN)
      
      Conor Dooley (14):
        dt-bindings: soc/microchip: update syscontroller compatibles
        dt-bindings: soc/microchip: add services as children of sys ctrlr
        dt-bindings: i2c: add bindings for microchip mpfs i2c
        dt-bindings: rtc: add bindings for microchip mpfs rtc
        dt-bindings: gpio: add bindings for microchip mpfs gpio
        dt-bindings: spi: add bindings for microchip mpfs spi
        dt-bindings: usb: add bindings for microchip mpfs musb
        dt-bindings: pwm: add microchip corepwm binding
        riscv: dts: microchip: use clk defines for icicle kit
        riscv: dts: microchip: add fpga fabric section to icicle kit
        riscv: dts: microchip: refactor icicle kit device tree
        riscv: dts: microchip: update peripherals in icicle kit device tree
        riscv: dts: microchip: add new peripherals to icicle kit device tree
        MAINTAINERS: update riscv/microchip entry
      
       .../bindings/gpio/microchip,mpfs-gpio.yaml    |  80 ++++++
       .../bindings/i2c/microchip,mpfs-i2c.yaml      |  55 ++++
       ...ilbox.yaml => microchip,mpfs-mailbox.yaml} |   6 +-
       .../bindings/pwm/microchip,corepwm.yaml       |  75 +++++
       .../bindings/rtc/microchip,mfps-rtc.yaml      |  63 +++++
       .../microchip,mpfs-sys-controller.yaml        |  73 +++++
       ...icrochip,polarfire-soc-sys-controller.yaml |  35 ---
       .../bindings/spi/microchip,mpfs-spi.yaml      |  52 ++++
       .../bindings/usb/microchip,mpfs-musb.yaml     |  59 ++++
       MAINTAINERS                                   |   2 +
       .../dts/microchip/microchip-mpfs-fabric.dtsi  |  25 ++
       .../microchip/microchip-mpfs-icicle-kit.dts   | 115 ++++++--
       .../boot/dts/microchip/microchip-mpfs.dtsi    | 262 +++++++++++++++---
       arch/riscv/configs/icicle_kit_defconfig       | 134 +++++++++
       14 files changed, 932 insertions(+), 104 deletions(-)
       create mode 100644 Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml
       create mode 100644 Documentation/devicetree/bindings/i2c/microchip,mpfs-i2c.yaml
       rename Documentation/devicetree/bindings/mailbox/{microchip,polarfire-soc-mailbox.yaml => microchip,mpfs-mailbox.yaml} (82%)
       create mode 100644 Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml
       create mode 100644 Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml
       create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml
       delete mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml
       create mode 100644 Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
       create mode 100644 Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml
       create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi
       create mode 100644 arch/riscv/configs/icicle_kit_defconfig
      
      --
      2.32.0
      f9a8f627
    • Mark Brown's avatar
      spi: add new SoC mt8186 support for spi-mtk-nor · 5566ccc5
      Mark Brown authored
      Merge series from guochun.mao@mediatek.com <guochun.mao@mediatek.com>:
      
      These patches is mainly for adding mt8186 support.
      The spi nor controller of mt8186 has some differences,
      it needs one more clk, axi_s, for dma feature.
      And also needs one extra dummy bit when read flash registers.
      5566ccc5
  9. 24 Jan, 2022 9 commits