- 05 Jul, 2018 40 commits
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Mikita Lipski authored
Set the powerplay debug flag to false for both Windows and Linux to allow the calls to pplib. So we can retrieve the clock values from powerplay instead of using default hardcoded values. Signed-off-by:
Mikita Lipski <mikita.lipski@amd.com> Reviewed-by:
Charlene Liu <Charlene.Liu@amd.com> Acked-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Roman Li authored
- Fixing integer overflow bug in wait_for_fbc_state_changed() - Correct the max value of retries for the corresponding warning Signed-off-by:
Roman Li <Roman.Li@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
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Tony Cheng authored
Signed-off-by:
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Dmytro Laktyushkin authored
Signed-off-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by:
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Tony Cheng authored
Signed-off-by:
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David Francis authored
As part of hardware certification, read-write access to the link rate, lane count, voltage swing, pre-emphasis, and PHY test pattern of DP connectors is required. This commit adds debugfs files that will correspond to these values. The file operations are not yet implemented: currently writing or reading them does nothing. Signed-off-by:
David Francis <David.Francis@amd.com> Reviewed-by:
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Tony Cheng authored
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Wesley Chalmers authored
DML does not calculate chroma values for RQ when surface is not YUV, but DC will unconditionally use the uninitialized values for HW programming. This does not cause visual corruption since HW will ignore garbage chroma values when surface is not YUV, but causes presubmission tests to fail golden value comparison. Signed-off-by:
Wesley Chalmers <Wesley.Chalmers@amd.com> Signed-off-by:
Eryk Brol <eryk.brol@amd.com> Reviewed-by:
Wenjing Liu <Wenjing.Liu@amd.com> Acked-by:
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Zheng, XueLai(Eric) authored
Signed-off-by:
XueLai(Eric), Zheng <XueLai.Zheng@amd.com> Reviewed-by:
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Dmytro Laktyushkin authored
This will prevent watermarks from lowering when unsafe to do so. Signed-off-by:
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Dmytro Laktyushkin authored
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Dmytro Laktyushkin authored
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Dmytro Laktyushkin authored
This fixes incorrect clock caching and by extension fixes the clock reporting. Signed-off-by:
Eric Yang <eric.yang2@amd.com> Acked-by:
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Dmytro Laktyushkin authored
Signed-off-by:
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Charlene Liu authored
Also cleanup command_table2.c. No need for a lot of forward declarations. Signed-off-by:
Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by:
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Wesley Chalmers authored
To ensure tests continue to pass Signed-off-by:
Shahin Khayyer <Shahin.Khayyer@amd.com> Acked-by:
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Dmytro Laktyushkin authored
Signed-off-by:
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Dmytro Laktyushkin authored
This removes redundant set_bandwidth calls as well as fixes a bug in post_set_address_update where dcn1 would never get to lower clocks. Signed-off-by:
Nikola Cornij <Nikola.Cornij@amd.com> Acked-by:
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Dmytro Laktyushkin authored
No functional change. Signed-off-by:
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Dmytro Laktyushkin authored
No functional change. Signed-off-by:
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Dmytro Laktyushkin authored
No functional change. Signed-off-by:
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Dmytro Laktyushkin authored
Cleans up dcn_bw_output to only contain calculated info, actual programmed values will now be stored in respective blocks. Signed-off-by:
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Mikita Lipski authored
Add DCF and FCLK clock case statements for changing raven's clocks for voltage request. Also maintain DCEF clock for DCE120 calls. Signed-off-by:
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Mikita Lipski authored
Change struct pointers to creating structs on a stack. Thats fixing a mistake in a previous patch introducing dm_pplib functions Signed-off-by:
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Yongqiang Sun authored
In case of tg count not equal to FE pipe count, if use pipe count to iterate the tgs, it will cause BSOD. Signed-off-by:
Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by:
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Dmytro Laktyushkin authored
Signed-off-by:
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Mikita Lipski authored
DM powerplay calls for DCN10 allowing to bypass PPLib and call directly to the SMU functions. Signed-off-by:
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Tony Cheng authored
Signed-off-by:
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Mikita Lipski authored
Adding a call to powerplay to get system clocks and translate to dm structure Signed-off-by:
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Mikita Lipski authored
Translate dm_pp tructure to pp type Call PP lib to apply clock voltage request for display Signed-off-by:
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Mikita Lipski authored
Function to get clock levels by voltage from PPLib Signed-off-by:
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Dmytro Laktyushkin authored
This change moves dcn clock programming(with exception of dispclk) into dccg. This should have no functional effect. Signed-off-by:
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Dmytro Laktyushkin authored
Signed-off-by:
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Dmytro Laktyushkin authored
The goal of this change is to move clock programming and voltage requests to a single function. As of this change only dce is affected. Signed-off-by:
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Dmytro Laktyushkin authored
This will avoid structs with duplicate information. Also removes pixel clock voltage request. This has no effect since pixel clock does not affect dcn voltage and this function only matters for dcn. Signed-off-by:
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Alex Deucher authored
This reverts commit 8f4805a2. This change was mistakenly committed and should have been dropped with the rest of the series. Signed-off-by:
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Andrey Grodzovsky authored
Access to SQ_EDC_INFO requires selecting register instance and hence mutex lock when accessing GRBM_GFX_INDEX for which a work is schedueled from IH. But SQ interrupt can be raised on many instances at once which means queuing work will usually succeed for the first one but fail for the rest since the work takes time to process. To avoid losing info about other interrupt instances call the parsing function directly from high IRQ when current work hasn't finished and avoid accessing SQ_EDC_INFO in that case. v2: Simplify high IRQ and BH handlers synchronization using work_pending. Remove {READ,WRITE}_ONCE notations since smp_{r,w}mb are implicit compiler barriers. v3: Remove exlicit memory barriers as scedule_work has r/w barriers. Signed-off-by:Andrey Grodzovsky <andrey.grodzovsky@amd.com> Acked-by:
Christian König <christian.koenig@amd.com> Acked-by:
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Andrey Grodzovsky authored
Switch to using reg fields defines istead of magic values. Add SH_ID and PRIV fields reading for instr. and err cases. Signed-off-by:
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Tom St Denis authored
This adds what should be a stable interface to read GPU load from userspace. (v2): Fix comments and name of file per recommendations. (v3): Add chapter to amdgpu.rst as well. Signed-off-by:
Tom St Denis <tom.stdenis@amd.com> Acked-by:
Slava Abramov <slava.abramov@amd.com> Reviewed-by:
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Christian König authored
Always validating the VM PTs takes to much time. Only always validate the per VM BOs for now. Signed-off-by:
Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by:
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