- 05 Nov, 2020 2 commits
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Kent Russell authored
Arcturus doesn't have a fan. The assumption of "if the manual fan control bit isn't set, it's on automatic mode" does not hold true if the fan is missing, and results in exposing an invalid value for fan speed. The SMU metrics table accurately reflects the lack of fan and will return 0 for the fan speed. Trying to use the smu_v11_0_get_fan_speed_rpm function will return invalid data, so just stick with the SMU metrics for Arcturus Signed-off-by:
Kent Russell <kent.russell@amd.com> Acked-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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Kevin Wang authored
add missing clock gating informations in amdgpu_pm_info 1. AMD_CG_SUPPORT_VCN_MGCG 2. AMD_CG_SUPPORT_HDP_DS 3. AMD_CG_SUPPORT_HDP_SD 4. AMD_CG_SUPPORT_IH_CG 5. AMD_CG_SUPPORT_JPEG_MGCG Signed-off-by:
Kevin Wang <kevin1.wang@amd.com> Reviewed-by:
Kenneth Feng <kenneth.feng@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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- 04 Nov, 2020 16 commits
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Alex Deucher authored
Add proper FP_START/END handling and adjust Makefiles per previous asics. v2: fix up harder. v3: fix clkmgr Makefile for dcn30 v4: fix old gcc handling is only required for x86 Build-tested-by:
Nathan Chancellor <natechancellor@gmail.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> (v1) Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> (v1) Signed-off-by:
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Alex Deucher authored
Avoids confusion in configurations. v2: fix build when CONFIG_DRM_AMD_DC_DCN is disabled v3: rebase on latest code Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> (v1) Signed-off-by: -
Ramesh Errabolu authored
drm/amd/amdgpu: Enable arcturus devices to access the method kgd_gfx_v9_get_cu_occupancy that is already defined [Why] Allow user to know number of compute units (CU) that are in use at any given moment. [How] Remove the keyword static for the method kgd_gfx_v9_get_cu_occupancy Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Ramesh Errabolu <Ramesh.Errabolu@amd.com> Signed-off-by:
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Roman Li authored
[Why] The change for correct asic type check caused a psr regression due to incorrect chip family id for Raven. [How] Use correct family id. Signed-off-by:
Roman Li <roman.li@amd.com> Reviewed-by:
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Kevin Wang authored
Signed-off-by:
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Kenneth Feng authored
switch to vcn power profile mode when a video is playing. this can optimize the power/performance when the workload is on the vcn. Signed-off-by:
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Kevin Wang authored
the vega20 isn't supported swsmu. Signed-off-by:
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Deepak R Varma authored
Initializing global variable to 0 or NULL is not necessary and should be avoided. Issue reported by checkpatch script as: ERROR: do not initialise globals to 0 (or NULL). Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Deepak R Varma <mh12gx2825@gmail.com> Signed-off-by:
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Marek Olšák authored
v2: squash in build fix Acked-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
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Gang Ba authored
Determine FRAMEBUFFER_PUBLIC/PRIVATE only based host-accessibility, not peer-accesssibility Signed-off-by:
Gang Ba <gaba@amd.com> Reviewed-by:
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Christian König authored
The value is inclusive, not exclusive. Signed-off-by:
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Tao Zhou authored
GFXOFF has been supported by PMFW, enable it directly in driver for dimgrey_cavefish. Signed-off-by:
Tao Zhou <tao.zhou1@amd.com> Reviewed-by:
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John Clements authored
updated fw header v2 parser to set asd fw memory Reviewed-by:
John Clements <john.clements@amd.com> Signed-off-by:
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Jinzhou.Su authored
Add flags AMD_CG_SUPPORT_GFX_FGCG for Vangogh Signed-off-by:
Jinzhou.Su <Jinzhou.Su@amd.com> Reviewed-by:
Huang Rui <ray.huang@amd.com> Signed-off-by:
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Jinzhou.Su authored
1. Add FGCG for gfx10 2. Get FGCG status for pm info debugfs Signed-off-by:
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Jinzhou.Su authored
Add AMD_CG_SUPPORT_GFX_FGCG for FGCG Signed-off-by:
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- 02 Nov, 2020 22 commits
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Deepak R Varma authored
When declaring pointer data, the "*" symbol should be used adjacent to the data name as per the coding standards. This resolves following issues reported by checkpatch script: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" Signed-off-by:
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Deepak R Varma authored
When declaring pointer data, the "*" symbol should be used adjacent to the data name as per the coding standards. This resolves following issues reported by checkpatch script: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" Signed-off-by:
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Deepak R Varma authored
When declaring pointer data, the "*" symbol should be used adjacent to the data name as per the coding standards. This resolves following issues reported by checkpatch script: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" Signed-off-by:
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Deepak R Varma authored
When declaring pointer data, the "*" symbol should be used adjacent to the data name as per the coding standards. This resolves following issues reported by checkpatch script: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" Signed-off-by:
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Deepak R Varma authored
When declaring pointer data, the "*" symbol should be used adjacent to the data name as per the coding standards. This resolves following issues reported by checkpatch script: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" Signed-off-by:
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Deepak R Varma authored
When declaring pointer data, the "*" symbol should be used adjacent to the data name as per the coding style standards. This resolves following issues reported by checkpatch script: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" Signed-off-by:
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Alex Deucher authored
Properly protect the relevant code with CONFIG_DRM_AMD_DC_DCN. Fixes: 0b08c54b ("drm/amd/display: Fix the display corruption issue on Navi10") Reviewed-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by:
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Deepak R Varma authored
General code indentation and alignment changes such as replace spaces by tabs or align function arguments as per the coding style guidelines. The patch covers various .c files for this driver. Issue reported by checkpatch script. Signed-off-by:
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Deepak R Varma authored
General code indentation and alignment changes such as replace spaces by tabs or align function arguments as per the coding style guidelines. The patch corrects issues for various amdgpu_*.c files for this driver. Issue reported by checkpatch script. Signed-off-by:
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Deepak R Varma authored
General code indentation and alignment changes such as replace spaces by tabs or align function arguments as per the coding style guidelines. Issue reported by checkpatch script. Signed-off-by:
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Deepak R Varma authored
General code indentation and alignment changes such as replace spaces by tabs or align function arguments as per the coding style guidelines. Issue reported by checkpatch script. Signed-off-by:
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Deepak R Varma authored
General code indentation and alignment changes such as replace spaces by tabs or align function arguments as per the coding style guidelines. Issue reported by checkpatch script. Signed-off-by:
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Deepak R Varma authored
General code indentation and alignment changes such as replace spaces by tabs or align function arguments as per the coding style guidelines. Issue reported by checkpatch script. Signed-off-by:
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Colin Ian King authored
There is a spelling mistake in a deb_dbg message. Fix it. Reviewed-by:
Madhav Chauhan <madhav.chauhan@amd.com> Signed-off-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
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Bernard Zhao authored
Fix typoes. Acked-by:
Bernard Zhao <bernard@vivo.com> Signed-off-by:
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Alex Deucher authored
Uses the same pathes as navi. Reviewed-by:
Aaron Liu <aaron.liu@amd.com> Reviewed-by:
Luben Tuikov <luben.tuikov@amd.com> Signed-off-by:
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Kent Russell authored
If we can't kvmalloc the pcrat_image, then we shouldn't memcpy Signed-off-by:
kernel test robot <lkp@intel.com> Reviewed-by:
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Huang Rui authored
This patch is to fix the NULL pointer that missed set_disp_pattern_generator callback on DCN301 [ 505.054167] BUG: kernel NULL pointer dereference, address: 0000000000000000 [ 505.054176] #PF: supervisor instruction fetch in kernel mode [ 505.054181] #PF: error_code(0x0010) - not-present page [ 505.054185] PGD 0 P4D 0 [ 505.054199] Oops: 0010 [#1] SMP NOPTI [ 505.054211] CPU: 6 PID: 1306 Comm: modprobe Tainted: G W OE 5.9.0-rc5-custom #1 [ 505.054216] Hardware name: AMD Chachani-VN/Chachani-VN, BIOS WCH0A29N_RAPV16.FD 10/29/2020 [ 505.054225] RIP: 0010:0x0 [ 505.054234] Code: Bad RIP value. [ 505.054239] RSP: 0018:ffffb88541c66f60 EFLAGS: 00010206 [ 505.054245] RAX: 0000000000000000 RBX: ffff912836070000 RCX: 0000000000000003 [ 505.054248] RDX: 000000000000000c RSI: ffff9128365001e8 RDI: ffff912836070000 [ 505.054252] RBP: ffffb88541c66fd8 R08: 0000000000000002 R09: ffffb88541c66fa2 [ 505.054265] R10: 0000000000009580 R11: 0000000000000008 R12: ffff9128365001e8 [ 505.054272] R13: 000000000000000c R14: 0000000000000438 R15: ffff9128a48bd000 [ 505.054279] FS: 00007f09f999f540(0000) GS:ffff9128b3f80000(0000) knlGS:0000000000000000 [ 505.054284] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 505.054288] CR2: ffffffffffffffd6 CR3: 00000002db98c000 CR4: 0000000000350ee0 [ 505.054291] Call Trace: [ 505.055024] dcn20_blank_pixel_data+0x148/0x260 [amdgpu] [ 505.055730] dcn20_enable_stream_timing+0x381/0x47c [amdgpu] [ 505.056641] dce110_apply_ctx_to_hw+0x337/0x577 [amdgpu] [ 505.056667] ? put_object+0x2f/0x40 [ 505.057329] dc_commit_state+0x4b3/0x9d0 [amdgpu] [ 505.058030] amdgpu_dm_atomic_commit_tail+0x405/0x1ec6 [amdgpu] [ 505.058053] ? update_stack_state+0x103/0x170 [ 505.058071] ? __module_text_address+0x12/0x60 Signed-off-by:
Changfeng <Changfeng.Zhu@amd.com> Signed-off-by:
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Alex Sierra authored
[Why] Vega20 and Arcturus asics use oss 5.0 version. [How] Replace ih ip block by navi10 for vega20 and arcturus. Signed-off-by:
Alex Sierra <alex.sierra@amd.com> Reviewed-by:
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Evan Quan authored
Will expand it to other ASICs after verified. Signed-off-by:
Evan Quan <evan.quan@amd.com> Acked-and-tested-by:
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Likun Gao authored
Update golden setting for sienna_cichlid. Signed-off-by:
Likun Gao <Likun.Gao@amd.com> Reviewed-by:
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Jinzhou.Su authored
Add AMD_CG_SUPPORT_MC_MGCG and AMD_CG_SUPPORT_MC_LS Signed-off-by:
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