- 09 Apr, 2010 2 commits
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Adam Jackson authored
... and not the global list. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Adam Jackson authored
Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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- 06 Apr, 2010 14 commits
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Adam Jackson authored
Height in frame size, not field size, and trailed with an 'i'. Matches the X server behaviour. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Adam Jackson authored
Before CVT-R, some monitors would advertise support for an alternative GTF formula with lower blanking intervals. Correctly identify such monitors, and use the alternative formula when generating modes for them. Note that we only do this for "standard" timing descriptors (tuples of hsize in characters / aspect ratio / vertical refresh). Range-based mode lists still only refer to the primary GTF curve. It would be possible to do better for the latter case, but monitors are required to support the primary curve over the entire advertised range, so all it would win you is a lower pixel clock and therefore possibly better image quality on analog links. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Adam Jackson authored
If you have 1920x1200 in both detailed (probably RB) and standard variants, you probably only want the RB version. But we have no way of guessing that from standard mode parse. So, if a mode already exists for a given w/h/r, skip adding it. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Adam Jackson authored
Standard timings don't let you say 1366. Both 1360 and 1368 have been seen in the wild. So invent a CVT timing for it. CVT will round 1366 up to 1368; we'll then manually underscan it. Split this into two parts, since we need to do something sneaky between them in the future. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Adam Jackson authored
1.4 adds better pixel clock precision, explicit reduced blanking awareness, and extended sync ranges. It's almost like a real spec. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Adam Jackson authored
The generic block walk callback looks like overkill, but we'll need it for other detailed block walks in the future. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Adam Jackson authored
In 1.4, the first detailed mode is always the preferred mode. The bit that used to mean that, now means "this mode is the physical size in pixels". Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Adam Jackson authored
Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Adam Jackson authored
Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Adam Jackson authored
Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Adam Jackson authored
Also, document what the spec says to do. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Adam Jackson authored
Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Adam Jackson authored
Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Adam Jackson authored
This makes fetching the second EDID block on HDMI monitors actually work. DDC can't transfer more than 128 bytes at a time. Also, rearrange the code so the pure DDC bits are separate from block parse. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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- 05 Apr, 2010 2 commits
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Alex Deucher authored
The GPIO_I2C_INFO table does not always have ATOM_MAX_SUPPORTED_DEVICE entries. Limit the number of indices to the size of the table. Should fix Novell bug 589022. v2: fix typo Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Cc: Stable <stable@kernel.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Michel Dänzer authored
Gleaned from the Mesa code. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=27355 . Signed-off-by: Michel Dänzer <daenzer@vmware.com> Cc: stable@kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
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- 01 Apr, 2010 4 commits
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Dave Airlie authored
Some GPUs have an APM/ACPI PM mode selection switch and some BIOSes set this to APM. We really want this in ACPI mode for Linux. Signed-off-by: Dave Airlie <airlied@redhat.com>
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Dave Airlie authored
These GPUs should be setting these registers up also. Signed-off-by: Dave Airlie <airlied@redhat.com>
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Dave Airlie authored
If we resume in a bad way, we'll get 0xffffffff in wptr, and then oops with no console. This just adds a sanity check so that we can avoid the oops and hopefully get more details out of people's systems. Signed-off-by: Dave Airlie <airlied@redhat.com>
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Alex Deucher authored
Need to enable the VID stream after link training Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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- 31 Mar, 2010 18 commits
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Alex Deucher authored
Turn off hw i2c by default except for mm i2c which is hw only until we sort out the remaining prescale issues on older chips. hw i2c can be enabled with hw_i2c=1. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Alex Deucher authored
This allows us to remove the internal bit algo bus used by the radeon i2c algo. We now register a radeon algo adapter if the gpio line is hw capable and the hw inplementation is available, otherwise we register a bit algo adapter. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Dave Airlie authored
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Alex Deucher authored
Doesn't seem to work reliably and the pci quirks don't always work. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Alex Deucher authored
- Add module option to force the display priority 0 = auto, 1 = normal, 2 = high - Default to high on r3xx/r4xx/rv515 chips Fixes flickering problems during heavy acceleration due to underflow to the display controllers - Fill in minimal support for RS600 v2 - update display priority when bandwidth is updated so the user can change the parameter at runtime and it will take affect on the next modeset. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Alex Deucher authored
Seems to have gotten lost in the evergreen merge. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Alex Deucher authored
Some systems have LCD* rather than DFP* device tags in the bios for eDP connectors; notably the new apple iMac. This fixes things up so eDP connectors with either tag will work. v2: fix typo Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Alex Deucher authored
Looks like a copy/paste typo from when evergreen support was added. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Alex Deucher authored
- 8 lane links are not valid for DP - remove unused num var Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Michel Dänzer authored
This prevented radeon.test=1 from testing transfers from/to GTT beyond the visible VRAM size. Signed-off-by: Michel Dänzer <daenzer@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Randy Dunlap authored
Fix build error when CONFIG_MAGIC_SYSRQ is not enabled: drivers/gpu/drm/drm_fb_helper.c:915: error: 'sysrq_drm_fb_helper_restore_op' undeclared (first use in this function) drivers/gpu/drm/drm_fb_helper.c:929: error: 'sysrq_drm_fb_helper_restore_op' undeclared (first use in this function) Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Alex Deucher authored
- remove a few more drm only regs - remove sampler, alu, bool, loop constant regs. They are set via separate packet3's already Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Alex Deucher authored
- Drop some more safe regs taht userspace shouldn't hit - Constant base regs need relocs. This allows us to use constant buffers rather than the constant register file. Also we don't want userspace to be able to set arbitrary mc base values for the const caches. - Track SQ_CONFIG so we know whether userspace is using the cfile or constant buffers. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Alex Deucher authored
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Alex Deucher authored
Only the drm should be touching them. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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