1. 08 Feb, 2015 8 commits
    • David Cohen's avatar
      mmc: sdhci-pci: add broken HS200 quirk for Intel Merrifield · 568d963f
      David Cohen authored
      commit 390145f9 upstream.
      
      Due to unknown hw issue so far, Merrifield is unable to enable HS200
      support. This patch adds quirk to avoid SDHCI to initialize with error
      below:
      
      [   53.850132] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W
      3.12.0-rc6-00037-g3d7c8d9-dirty #36
      [   53.850150] Hardware name: Intel Corporation Merrifield/SALT BAY,
      BIOS 397 2013.09.12:11.51.40
      [   53.850167]  00000000 00000000 ee409e48 c18816d2 00000000 ee409e78
      c123e254 c1acc9b0
      [   53.850227]  00000000 00000000 c1b14148 000003de c16c03bf c16c03bf
      ee75b480 ed97c54c
      [   53.850282]  ee75b480 ee409e88 c123e292 00000009 00000000 ee409ef8
      c16c03bf c1207fac
      [   53.850339] Call Trace:
      [   53.850376]  [<c18816d2>] dump_stack+0x4b/0x79
      [   53.850408]  [<c123e254>] warn_slowpath_common+0x84/0xa0
      [   53.850436]  [<c16c03bf>] ? sdhci_send_command+0xb4f/0xc50
      [   53.850462]  [<c16c03bf>] ? sdhci_send_command+0xb4f/0xc50
      [   53.850490]  [<c123e292>] warn_slowpath_null+0x22/0x30
      [   53.850516]  [<c16c03bf>] sdhci_send_command+0xb4f/0xc50
      [   53.850545]  [<c1207fac>] ? native_sched_clock+0x2c/0xb0
      [   53.850575]  [<c14c1f93>] ? delay_tsc+0x73/0xb0
      [   53.850601]  [<c14c1ebe>] ? __const_udelay+0x1e/0x20
      [   53.850626]  [<c16bdeb3>] ? sdhci_reset+0x93/0x190
      [   53.850654]  [<c16c05b0>] sdhci_finish_data+0xf0/0x2e0
      [   53.850683]  [<c16c130f>] sdhci_irq+0x31f/0x930
      [   53.850713]  [<c12cb080>] ? __buffer_unlock_commit+0x10/0x20
      [   53.850740]  [<c12cbcd7>] ? trace_buffer_unlock_commit+0x37/0x50
      [   53.850773]  [<c1288f3c>] handle_irq_event_percpu+0x5c/0x220
      [   53.850800]  [<c128bc96>] ? handle_fasteoi_irq+0x16/0xd0
      [   53.850827]  [<c128913a>] handle_irq_event+0x3a/0x60
      [   53.850852]  [<c128bc80>] ? unmask_irq+0x30/0x30
      [   53.850878]  [<c128bcce>] handle_fasteoi_irq+0x4e/0xd0
      [   53.850895]  <IRQ>  [<c1890b52>] ? do_IRQ+0x42/0xb0
      [   53.850943]  [<c1890a31>] ? common_interrupt+0x31/0x38
      [   53.850973]  [<c12b00d8>] ? cgroup_mkdir+0x4e8/0x580
      [   53.851001]  [<c1208d32>] ? default_idle+0x22/0xf0
      [   53.851029]  [<c1209576>] ? arch_cpu_idle+0x26/0x30
      [   53.851054]  [<c1288505>] ? cpu_startup_entry+0x65/0x240
      [   53.851082]  [<c18793d5>] ? rest_init+0xb5/0xc0
      [   53.851108]  [<c1879320>] ? __read_lock_failed+0x18/0x18
      [   53.851138]  [<c1bf6a15>] ? start_kernel+0x31b/0x321
      [   53.851164]  [<c1bf652f>] ? repair_env_string+0x51/0x51
      [   53.851190]  [<c1bf6363>] ? i386_start_kernel+0x139/0x13c
      [   53.851209] ---[ end trace 92777f5fe48d33f2 ]---
      [   53.853449] mmcblk0: error -84 transferring data, sector 11142162, nr
      304, cmd response 0x0, card status 0x0
      [   53.853476] mmcblk0: retrying using single block read
      [   55.937863] sdhci: Timeout waiting for Buffer Read Ready interrupt
      during tuning procedure, falling back to fixed sampling clock
      [   56.207951] sdhci: Timeout waiting for Buffer Read Ready interrupt
      during tuning procedure, falling back to fixed sampling clock
      [   66.228785] mmc0: Timeout waiting for hardware interrupt.
      [   66.230855] ------------[ cut here ]------------
      Signed-off-by: default avatarDavid Cohen <david.a.cohen@linux.intel.com>
      Reviewed-by: default avatarChuanxiao Dong <chuanxiao.dong@intel.com>
      Acked-by: default avatarDong Aisheng <b29396@freescale.com>
      Cc: stable <stable@vger.kernel.org> # [3.13]
      Signed-off-by: default avatarChris Ball <chris@printf.net>
      Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
      568d963f
    • Adrian Hunter's avatar
      mmc: sdhci-acpi: Add ACPI HID INT344D · a27ad256
      Adrian Hunter authored
      commit d0ed8e6b upstream.
      
      Add ACPI HID INT344D for an Intel SDIO host controller.
      Signed-off-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
      a27ad256
    • Adrian Hunter's avatar
      mmc: sdhci-acpi: Add a HID and UID for a SD Card host controller · 43a93a13
      Adrian Hunter authored
      commit 7147eaf3 upstream.
      
      Add a HID (INT33BB) and UID (3) for a SD Card host controller.
      Signed-off-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
      43a93a13
    • Maurice Petallo's avatar
      mmc: sdhci: Preset value not supported in Baytrail eMMC · 536f9653
      Maurice Petallo authored
      commit d61b5946 upstream.
      
      "SDHCI_QUIRK2_PRESET_VALUE_BROKEN" quirk is added to prohibit
      preset value enabling for Baytrail eMMC controller.
      Signed-off-by: default avatarMaurice Petallo <mauricex.r.petallo@intel.com>
      Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
      536f9653
    • Adrian Hunter's avatar
      mmc: sdhci-acpi: Intel SDIO has broken card detect · 6f55614e
      Adrian Hunter authored
      commit c6748017 upstream.
      
      Intel SDIO has broken card detect so add a quirk to reflect that.
      Signed-off-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
      Acked-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      Signed-off-by: default avatarChris Ball <chris@printf.net>
      Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
      6f55614e
    • Adrian Hunter's avatar
      mmc: sdhci-acpi: Add device id 80860F16 · d40b840d
      Adrian Hunter authored
      commit aad95dc4 upstream.
      
      Add ACPI HID 80860F16 as a host controller for a SD card.
      Signed-off-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
      Signed-off-by: default avatarChris Ball <chris@printf.net>
      Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
      d40b840d
    • Mika Westerberg's avatar
      mmc: sdhci-acpi: add new ACPI ID · bb5f4154
      Mika Westerberg authored
      commit 07c001c1 upstream.
      
      Newer Intel PCHs with LPSS have the same SDHCI controller than Haswell but
      ACPI ID is different. Add this ID to the driver list.
      Signed-off-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
      Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
      Signed-off-by: default avatarChris Ball <cjb@laptop.org>
      Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
      bb5f4154
    • Mark Rutland's avatar
      arm64: Fix up /proc/cpuinfo · 9606e430
      Mark Rutland authored
      commit 44b82b77 upstream.
      
      [backport to 3.12.x: fold in missing MIDR_EL1 recording]
      
      Commit d7a49086 (arm64: cpuinfo: print info for all CPUs)
      attempted to clean up /proc/cpuinfo, but due to concerns regarding
      further changes was reverted in commit 5e39977e (Revert "arm64:
      cpuinfo: print info for all CPUs").
      
      There are two major issues with the arm64 /proc/cpuinfo format
      currently:
      
      * The "Features" line describes (only) the 64-bit hwcaps, which is
        problematic for some 32-bit applications which attempt to parse it. As
        the same names are used for analogous ISA features (e.g. aes) despite
        these generally being architecturally unrelated, it is not possible to
        simply append the 64-bit and 32-bit hwcaps in a manner that might not
        be misleading to some applications.
      
        Various potential solutions have appeared in vendor kernels. Typically
        the format of the Features line varies depending on whether the task
        is 32-bit.
      
      * Information is only printed regarding a single CPU. This does not
        match the ARM format, and does not provide sufficient information in
        big.LITTLE systems where CPUs are heterogeneous. The CPU information
        printed is queried from the current CPU's registers, which is racy
        w.r.t. cross-cpu migration.
      
      This patch attempts to solve these issues. The following changes are
      made:
      
      * When a task with a LINUX32 personality attempts to read /proc/cpuinfo,
        the "Features" line contains the decoded 32-bit hwcaps, as with the
        arm port. Otherwise, the decoded 64-bit hwcaps are shown. This aligns
        with the behaviour of COMPAT_UTS_MACHINE and COMPAT_ELF_PLATFORM. In
        the absense of compat support, the Features line is empty.
      
        The set of hwcaps injected into a task's auxval are unaffected.
      
      * Properties are printed per-cpu, as with the ARM port. The per-cpu
        information is queried from pre-recorded cpu information (as used by
        the sanity checks).
      
      * As with the previous attempt at fixing up /proc/cpuinfo, the hardware
        field is removed. The only users so far are 32-bit applications tied
        to particular boards, so no portable applications should be affected,
        and this should prevent future tying to particular boards.
      
      The following differences remain:
      
      * No model_name is printed, as this cannot be queried from the hardware
        and cannot be provided in a stable fashion. Use of the CPU
        {implementor,variant,part,revision} fields is sufficient to identify a
        CPU and is portable across arm and arm64.
      
      * The following system-wide properties are not provided, as they are not
        possible to provide generally. Programs relying on these are already
        tied to particular (32-bit only) boards:
        - Hardware
        - Revision
        - Serial
      
      No software has yet been identified for which these remaining
      differences are problematic.
      
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: stable@vger.kernel.org # 3.12.x
      Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
      [Mark: backport to v3.12.x]
      Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
      9606e430
  2. 02 Feb, 2015 4 commits
  3. 30 Jan, 2015 9 commits
  4. 29 Jan, 2015 19 commits