- 02 Feb, 2023 2 commits
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Linus Walleij authored
If we enable the memory stick block layer, use Kconfig to imply the BFQ I/O scheduler. As all memstick devices are single-queue, this is the scheduler that users want so let's be helpful and make sure it gets default-selected into a manual kernel configuration. It will still need to be enabled at runtime (usually with udev scripts). Cc: linux-block@vger.kernel.org Cc: Paolo Valente <paolo.valente@linaro.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230131085220.1038241-1-linus.walleij@linaro.orgSigned-off-by:
Ulf Hansson <ulf.hansson@linaro.org>
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Linus Walleij authored
If we enable the MMC/SD block layer, use Kconfig to imply the BFQ I/O scheduler. As all MMC/SD devices are single-queue, this is the scheduler that users want so let's be helpful and make sure it gets default-selected into a manual kernel configuration. It will still need to be enabled at runtime (usually with udev scripts). Cc: linux-block@vger.kernel.org Cc: Paolo Valente <paolo.valente@linaro.org> Signed-off-by:
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- 27 Jan, 2023 6 commits
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Kunihiko Hayashi authored
SD interface logic has the register to switch UHS speed. The default is up to SDR25 and to support SDR50 or faster, add uniphier_sd_speed_switch() function to switch the speed mode. Signed-off-by:
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/20230125010201.28246-4-hayashi.kunihiko@socionext.comSigned-off-by:
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Kunihiko Hayashi authored
Transition of UHS mode needs to control the register in SD interface logic. Add access to the register in the logic using the regmap from "socionext,syscon-uhs-mode" property. Define the start_signal_voltage_switch function only if UHS mode is available. Signed-off-by:
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Kunihiko Hayashi authored
UHS mode control is included in the interface logic represented by syscon. To refer this, add new property "socionext,syscon-uhs-mode". Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230125010201.28246-2-hayashi.kunihiko@socionext.comSigned-off-by:
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Tobias Schramm authored
This commit fixes a race between completion of stop command and start of a new command. Previously the command ready interrupt was enabled before stop command was written to the command register. This caused the command ready interrupt to fire immediately since the CMDRDY flag is asserted constantly while there is no command in progress. Consequently the command state machine will immediately advance to the next state when the tasklet function is executed again, no matter actual completion state of the stop command. Thus a new command can then be dispatched immediately, interrupting and corrupting the stop command on the CMD line. Fix that by dropping the command ready interrupt enable before calling atmci_send_stop_cmd. atmci_send_stop_cmd does already enable the command ready interrupt, no further writes to ATMCI_IER are necessary. Signed-off-by:
Tobias Schramm <t.schramm@manjaro.org> Acked-by:
Ludovic Desroches <ludovic.desroches@microchip.com> Link: https://lore.kernel.org/r/20221230194315.809903-2-t.schramm@manjaro.orgSigned-off-by:
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Kathiravan T authored
The IPQ5332 supports eMMC with an SDHCI controller. Add the appropriate compatible to the documentation. Signed-off-by:
Kathiravan T <quic_kathirav@quicinc.com> Acked-by:
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devi priya authored
Document the compatible for SDHCI on IPQ9574. Signed-off-by:
devi priya <quic_devipriy@quicinc.com> Reviewed-by:
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- 24 Jan, 2023 11 commits
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Neil Armstrong authored
Convert the Amlogic SD / eMMC controller for S905/GXBB family SoCs to dt-schema. Take in account the used variant with amlogic,meson-gx-mmc. Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by:
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Krzysztof Kozlowski authored
Node names should be generic and should not contain underscores. Signed-off-by:
Rob Herring <robh@kernel.org> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20230120085722.171965-2-krzysztof.kozlowski@linaro.orgSigned-off-by:
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Krzysztof Kozlowski authored
Cleanup by removing unneeded quotes from refs and redundant blank lines. No functional impact except adjusting to preferred coding style. Signed-off-by:
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Doug Brown authored
Add a compatible for the pxav1 controller in the PXA168, along with optional pinctrl properties to use for an errata workaround. Signed-off-by:
Doug Brown <doug@schmorgal.com> Reviewed-by:
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Doug Brown authored
The PXA168 errata recommends that the CMD signal should be detached from the SD bus while performing the dummy CMD0 to restart the clock. Implement this using pinctrl states. Signed-off-by:
Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20230116194401.20372-8-doug@schmorgal.comSigned-off-by:
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Doug Brown authored
The PXA168 has a documented silicon bug that causes SDIO card IRQs to be missed. Implement the first half of the suggested workaround, which involves resetting the data port logic and issuing a dummy CMD0 to restart the clock. Signed-off-by:
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Doug Brown authored
Add ability to have an optional core clock just like the pxav3 driver. The PXA168 needs this because its SDHC controllers have separate core and io clocks that both need to be enabled. This also correctly matches the documented devicetree bindings for this driver. Reported-by:
kernel test robot <lkp@intel.com> Reported-by:
Dan Carpenter <error27@gmail.com> Signed-off-by:
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Doug Brown authored
The devicetree bindings for this driver specify that the two allowed clock names are io and core. Change this driver to look for io, but allow any name if it fails for backwards compatibility. Follow the same pattern used in sdhci-pxav3, but add support for EPROBE_DEFER. Get rid of an unnecessary pdev->dev while we're at it. Signed-off-by:
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Doug Brown authored
The PXA168 has a documented silicon bug that results in a data abort exception when accessing the SDHCI_HOST_VERSION register on SDH2 and SDH4 through a 16-bit read. Implement the workaround described in the errata, which performs a 32-bit read from a lower address instead. This is safe to use on all four SDH peripherals. Signed-off-by:
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Doug Brown authored
Enable CONFIG_MMC_SDHCI_IO_ACCESSORS for the pxav2 driver. The read_w callback is needed for a silicon bug workaround in the PXA168. Signed-off-by:
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Doug Brown authored
Add a new compatible string for the version 1 controller used in the PXA168, along with necessary quirks. Use a separate ops struct in preparation for a silicon bug workaround only necessary on V1. Signed-off-by:
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- 23 Jan, 2023 17 commits
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Lukas Wunner authored
pwrseq_sd8787 is forced to be built as a module if its dependencies are. That's unnecessary, it's perfectly fine for it to be built-in even though the wireless drivers that need it are modules. Relax the depends definition in Kconfig accordingly. Signed-off-by:
Lukas Wunner <lukas@wunner.de> Cc: Matt Ranostay <matt@ranostay.consulting> Cc: Lubomir Rintel <lkundrak@v3.sk> Cc: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/8bb3d7c3a36985e030ba40e853c57578de8fb303.1673866725.git.lukas@wunner.deSigned-off-by:
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Andreas Kemnade authored
Currently make dtbs_check shows lots of errors because imx*.dtsi does not use single compatibles but combinations of them. Add fallbacks for imx6sll/ull which are useful for U-Boot. This will significantly reduce noise on make dtbs_check. Signed-off-by:
Andreas Kemnade <andreas@kemnade.info> Reviewed-by:
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Geert Uytterhoeven authored
The SD Card/MMC interface on the Renesas RZ/V2M SoC uses 4 clocks, like on RZ/G2L SoCs. The current description specifies 3 clocks, like on R-Car Gen3, which will lead to "make dtbs_check" failures: arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dtb: mmc@85000000: clocks: [[3, 1, 18], [3, 1, 20], [3, 1, 19], [3, 1, 17]] is too long From schema: Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml Fixes: c8dbdf2a1044951b ("dt-bindings: mmc: renesas,sdhi: Document RZ/V2M support") Signed-off-by:Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by:
Fabrizio Castro <fabrizio.castro.jz@renesas.com> Acked-by:
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Liming Sun authored
This commit enables SDHCI Host V4 support on Bluefield-3 SoC to be consistent with the default setting in firmware(UEFI). Reviewed-by:
David Woods <davwoods@nvidia.com> Signed-off-by:
Liming Sun <limings@nvidia.com> Acked-by:
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Adrian Hunter authored
Now that it is no longer used, remove SDHCI_QUIRK_MISSING_CAPS. Note, from now on, __sdhci_read_caps() should be used to provide missing capability flags. Signed-off-by:
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Adrian Hunter authored
SDHCI_QUIRK_MISSING_CAPS is not needed because __sdhci_read_caps() can be called instead. In preparation to get rid of SDHCI_QUIRK_MISSING_CAPS, replace SDHCI_QUIRK_MISSING_CAPS with __sdhci_read_caps(). __sdhci_read_caps() is also called from sdhci_setup_host() via sdhci_read_caps(), however only the first call to __sdhci_read_caps() does anything because after that host->read_caps has been set to true. Note, __sdhci_read_caps() does more than just set host->caps, such as do a reset, so calling __sdhci_read_caps() earlier could have unforeseen side-effects. However the code flow has been reviewed with that in mind. Signed-off-by:
Scott Branden <scott.branden@broadcom.com> Link: https://lore.kernel.org/r/20230113110011.129835-6-adrian.hunter@intel.comSigned-off-by:
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Adrian Hunter authored
SDHCI_QUIRK_MISSING_CAPS is not needed because sdhci_read_caps() can be called instead. In preparation to get rid of SDHCI_QUIRK_MISSING_CAPS, replace SDHCI_QUIRK_MISSING_CAPS with sdhci_read_caps(). __sdhci_read_caps() is also called from sdhci_setup_host() via sdhci_read_caps(), however only the first call to __sdhci_read_caps() does anything because after that host->read_caps has been set to true. Note, __sdhci_read_caps() does more than just set host->caps, such as do a reset, so calling __sdhci_read_caps() earlier could have unforeseen side-effects. However the code flow has been reviewed with that in mind. Signed-off-by:
Jisheng Zhang <jszhang@kernel.org> Link: https://lore.kernel.org/r/20230113110011.129835-5-adrian.hunter@intel.comSigned-off-by:
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Adrian Hunter authored
SDHCI_QUIRK_MISSING_CAPS is not needed because sdhci_read_caps() can be called instead. In preparation to get rid of SDHCI_QUIRK_MISSING_CAPS, replace SDHCI_QUIRK_MISSING_CAPS with sdhci_read_caps(). __sdhci_read_caps() is also called from sdhci_setup_host() via sdhci_read_caps(), however only the first call to __sdhci_read_caps() does anything because after that host->read_caps has been set to true. Note, __sdhci_read_caps() does more than just set host->caps, such as do a reset, so calling __sdhci_read_caps() earlier could have unforeseen side-effects. However the code flow has been reviewed with that in mind. Signed-off-by:
Chunyan Zhang <zhang.lyra@gmail.com> Link: https://lore.kernel.org/r/20230113110011.129835-4-adrian.hunter@intel.comSigned-off-by:
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Adrian Hunter authored
SDHCI_QUIRK_MISSING_CAPS is not needed because sdhci_read_caps() can be called instead. In preparation to get rid of SDHCI_QUIRK_MISSING_CAPS, replace SDHCI_QUIRK_MISSING_CAPS with sdhci_read_caps(). __sdhci_read_caps() is also called from sdhci_setup_host() via sdhci_read_caps(), however only the first call to __sdhci_read_caps() does anything because after that host->read_caps has been set to true. Note, __sdhci_read_caps() does more than just set host->caps, such as do a reset, so calling __sdhci_read_caps() earlier could have unforeseen side-effects. However the code flow has been reviewed with that in mind. Signed-off-by:
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Adrian Hunter authored
SDHCI_QUIRK_MISSING_CAPS is not needed because __sdhci_read_caps() can be called instead. In preparation to get rid of SDHCI_QUIRK_MISSING_CAPS, replace SDHCI_QUIRK_MISSING_CAPS with __sdhci_read_caps() for Ricoh SDHCI controller. __sdhci_read_caps() is also called from sdhci_setup_host() via sdhci_read_caps(), however only the first call to __sdhci_read_caps() does anything because after that host->read_caps has been set to true. Note, __sdhci_read_caps() does more than just set host->caps, such as do a reset, so calling __sdhci_read_caps() earlier could have unforeseen side-effects. However the code flow has been reviewed with that in mind. Signed-off-by:
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Geert Uytterhoeven authored
Fix a misspelling of "complement". Signed-off-by:
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Tom Fitzhenry authored
This adds a reason to /sys/kernel/debug/devices_deferred, which makes it easier to debug deferred probes such as [0]. 0. https://lore.kernel.org/all/20221228140708.26431-1-tom@tom-fitzhenry.me.uk/Signed-off-by:
Tom Fitzhenry <tom@tom-fitzhenry.me.uk> Link: https://lore.kernel.org/r/20221228142354.28454-1-tom@tom-fitzhenry.me.ukSigned-off-by:
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Peng Fan authored
i.MX50 eSDHC is compatible with i.MX53. i.MX7D uSDHC is compatible with i.MX6SL. So update for them. Signed-off-by:
Peng Fan <peng.fan@nxp.com> Acked-by:
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Haibo Chen authored
USDHC IP has one limitation: the tuning circuit can't handle the async sdio device interrupt correctly. When sdio device use 4 data lines, async sdio interrupt will use the shared DAT[1], if enable auto tuning circuit to check these 4 data lines, include the DAT[1], this circuit will detect this interrupt, take this as data on DAT[1], and adjust the delay cell wrongly, finally will cause the DATA/CMD CRC error. So for SDIO device, only enable DAT[0] and CMD line for auto tuning. To distinguish the card type during card init, involve init_card(). Signed-off-by:
Haibo Chen <haibo.chen@nxp.com> Acked-by:
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Haibo Chen authored
Clear auto tuning bit when reset tuning, and enable auto tuning only after tuning done successfully for both standard tuning and manual tuning. Signed-off-by:
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Fabrizio Castro authored
The SDHI/eMMC IPs found with the RZ/V2M (a.k.a. r9a09g011), are very similar to the ones found in R-Car Gen3, but they are not exactly the same, and as a result need an SoC specific compatible string for fine tuning driver support. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20221213230129.549968-4-fabrizio.castro.jz@renesas.comSigned-off-by:
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Fabrizio Castro authored
Document support for the SD Card/MMC interface on the Renesas RZ/V2M (a.k.a. r9a09g011) SoC. Signed-off-by:
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- 22 Jan, 2023 2 commits
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Linus Torvalds authored
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git://git.kernel.dk/linuxLinus Torvalds authored
Pull another io_uring fix from Jens Axboe: "Just a single fix for a regression that happened in this release due to a poll change. Normally I would've just deferred it to next week, but since the original fix got picked up by stable, I think it's better to just send this one off separately. The issue is around the poll race fix, and how it mistakenly also got applied to multishot polling. Those don't need the race fix, and we should not be doing any reissues for that case. Exhaustive test cases were written and committed to the liburing regression suite for the reported issue, and additions for similar issues" * tag 'io_uring-6.2-2023-01-21' of git://git.kernel.dk/linux: io_uring/poll: don't reissue in case of poll race on multishot request
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- 21 Jan, 2023 2 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-miscLinus Torvalds authored
Pull char/misc driver fixes from Greg KH: "Here are some small char/misc and other subsystem driver fixes for 6.2-rc5 to resolve a few reported issues. They include: - long time pending fastrpc fixes (should have gone into 6.1, my fault) - mei driver/bus fixes and new device ids - interconnect driver fixes for reported problems - vmci bugfix - w1 driver bugfixes for reported problems Almost all of these have been in linux-next with no reported problems, the rest have all passed 0-day bot testing in my tree and on the mailing lists where they have sat too long due to me taking a long time to catch up on my pending patch queue" * tag 'char-misc-6.2-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: VMCI: Use threaded irqs instead of tasklets misc: fastrpc: Pass bitfield into qcom_scm_assign_mem gsmi: fix null-deref in gsmi_get_variable misc: fastrpc: Fix use-after-free race condition for maps misc: fastrpc: Don't remove map on creater_process and device_release misc: fastrpc: Fix use-after-free and race in fastrpc_map_find misc: fastrpc: fix error code in fastrpc_req_mmap() mei: me: add meteor lake point M DID mei: bus: fix unlink on bus in error path w1: fix WARNING after calling w1_process() w1: fix deadloop in __w1_remove_master_device() comedi: adv_pci1760: Fix PWM instruction handling interconnect: qcom: rpm: Use _optional func for provider clocks interconnect: qcom: msm8996: Fix regmap max_register values interconnect: qcom: msm8996: Provide UFS clocks to A2NoC dt-bindings: interconnect: Add UFS clocks to MSM8996 A2NoC -
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-coreLinus Torvalds authored
Pull driver core fixes from Greg KH: "Here are three small driver and kernel core fixes for 6.2-rc5. They include: - potential gadget fixup in do_prlimit - device property refcount leak fix - test_async_probe bugfix for reported problem" * tag 'driver-core-6.2-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: prlimit: do_prlimit needs to have a speculation check driver core: Fix test_async_probe_init saves device in wrong array device property: fix of node refcount leak in fwnode_graph_get_next_endpoint()
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