- 11 Apr, 2013 1 commit
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Olof Johansson authored
Merging in dependencies for the omap/dt branch. * omap/fixes-non-critical: ARM: OMAP2+: fix typo "CONFIG_BRIDGE_DVFS" ARM: OMAP1: remove "config MACH_OMAP_HTCWIZARD" ARM: OMAP: dpll: enable bypass clock only when attempting dpll bypass ARM: OMAP2+: powerdomain: avoid testing whether an unsigned char is less than 0 ARM: OMAP2+: hwmod: Remove unused _HWMOD_WAKEUP_ENABLED flag ARM: OMAP2+: am335x: Change the wdt1 func clk src to per_32k clk ARM: OMAP2+: AM33xx: hwmod: Add missing sysc definition to wdt1 entry ARM: OMAP: fix typo "CONFIG_SMC91x_MODULE" ARM: OMAP5: clock: No Freqsel on OMAP5 devices too ARM: OMAP5: Make errata i688 workaround available ARM: OMAP5: Update SAR memory layout for WakeupGen ARM: OMAP5: Update SAR RAM base address ARM: OMAP5: Reuse prm read_inst/write_inst ARM: OMAP5: prm: Allow prm init to succeed ARM: OMAP5: timer: Update the clocksource name as per clock data ARM: OMAP5: Update SOC id detection code for ES2 Signed-off-by: Olof Johansson <olof@lixom.net>
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- 09 Apr, 2013 4 commits
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Arnd Bergmann authored
Merge tag 'tegra-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt2 From Stephen Warren <swarren@wwwdotorg.org>: ARM: tegra: device tree changes This branch contains the majority of the device tree changes for Tegra. Highlights include: * Many changes for Tegra114, and the Dalmore board, to enable pinctrl, SDHCI/MMC, PWM, DMA, I2C, KBC, SPI, battery, regulators. * Adding or enabling suspend wakeup sources on many boards, and adding suspend timing parameters, to support the system suspend patches. * Adding clocks to the audio-related nodes, so that in 3.11, the audio driver can pull these clocks from device tree rather than hard-coding clock names. * Some small DT fixes/cleanup. This branch is based on the previous clk pull request. * tag 'tegra-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (25 commits) clk: tegra: Fix cdev1 and cdev2 IDs ARM: dts: tegra: add the PM configurations of PMC ARM: tegra: add non-removable and keep-power-in-suspend property for MMC ARM: tegra: whistler: add wakeup source for KBC ARM: tegra: add power gpio keys to DT ARM: tegra: keep power on to SD slot on Dalmore ARM: tegra: add clocks property to AC'97 sound nodes ARM: tegra: add clocks property to sound nodes ARM: tegra: dalmore: add fixed regulator node ARM: tegra: dalmore: add TPS65090 node ARM: tegra: dalmore: add cpu regulator node ARM: tegra: Add sbs-battery node to Dalmore ARM: tegra: add DT binding for i2c-tegra ARM: tegra: add SPI nodes to Tegra114 DT ARM: tegra: add KBC nodes to Tegra114 DT ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114 ARM: tegra: add I2C nodes to Tegra114 DT ARM: tegra: add APB DMA nodes to Tegra114 DT ARM: tegra: add PWM nodes to Tegra114 DT ARM: tegra: fix the status of PWM DT nodes ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
This is a dependency for the tegra/dt branch. Conflicts: drivers/clocksource/tegra20_timer.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.linaro.org/people/shawnguo/linux-2.6Arnd Bergmann authored
From Shawn Guo <shawn.guo@linaro.org>: The mxs device tree changes for 3.10: * Move enet_out clk into device tree and have fec driver handle it. * Convert mxsfb driver to generic display timings bindings, and remove the mxsfb auxdata from platform code. * Add generic DMA device tree binding for mxs-dma, and convert the most of client device drivers to it. * Change mxsfb driver to use regulator for controlling power of panel. * A few device tree source updates * tag 'mxs-dt-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: (23 commits) video: mxsfb: Introduce regulator support ARM: dts: cfa10036: Add touchscreen support to the CFA-10049 ARM: dts: imx23-olinuxino: mark sdcard cd as broken serial: mxs-auart: move to use generic DMA helper mtd: gpmi: move to use generic DMA helper i2c: i2c-mxs: move to use generic DMA helper spi: mxs-spi: move to use generic DMA helper mmc: mxs-mmc: move to use generic DMA helper dma: mxs-dma: move to generic device tree binding dma: mxs-dma: use devm_* managed functions ARM: dts: add generic DMA device tree binding for mxs-dma pinctrl: pinctrl-mxs: document the missing pull-ups ARM: cfa10036: add one wire bitbanging to the cfa10049 video: mxsfb: remove mxsfb_platform_data ARM: mxs: move display timing configurations into device tree video: mxsfb: get display timings from device tree video: mxsfb: remove dotclk_delay from platform_data video: mxsfb: remove fb_phys/fb_size from platform_data video: mxsfb: use devm_* managed functions ARM: mxs: remove unneeded enet_out clk initialization ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
This is a dependency for mxs/dt Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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- 08 Apr, 2013 1 commit
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Fabio Estevam authored
Instead of using a custom binding for retrieving the GPIO that activates the LCD from devicetree, use a standard regulator. This approach has the advantage to be more generic. For example: in the case of a board that has a PMIC supplying the LCD voltage, the current approach would not work, as it only searches for a GPIO pin. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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- 07 Apr, 2013 2 commits
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Alexandre Belloni authored
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Alexandre Pereira da Silva authored
The imx23-olinuxino sdcard doesn't have card detect. Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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- 04 Apr, 2013 32 commits
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Prashant Gaikwad authored
Correct IDs for cdev1 and cdev2 are 94 and 93 respectively. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: split into separate driver and device-tree patches] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Joseph Lo authored
Adding the PM configuration of PMC when the platform support suspend function. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Joseph Lo authored
This patch adds "non-removable" property of MMC host where the eMMC device is for Tegra platform. And the "keep-power-in-suspend" property was used for the SDIO device that need this to go into suspend mode (e.g. BRCM43xx series). Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Joseph Lo authored
Adding KBC as a wakeup source for Whistler board. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Joseph Lo authored
This adds the power gpio key to DT and enable the wakeup of the gpio key for the device. The Seaboard and paz00 already had the power gpio key binding and the power key of Whistler was on KBC. So these boards' device tree didn't include in this patch. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Stephen Warren authored
Set "regulator-always-on" for the SD slot on Dalmore, so that SD cards work. This used to work, since this regulator is on by default, but was broken by commit "ARM: tegra: dalmore: add TPS65090 node", since that didn't specify always-on for this regulator. In the long run, the regulators should all be hooked up to the SDHCI device nodes. However, we haven't done that for any of the Tegra boards yet, so to be consistent, this patch simply forces the regulator on, rather than hooking it up and making it work differently to other boards. Reported-by: Rhyland Klein <rklein@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Stephen Warren authored
Audio-related clocks need to be represented in the device tree. Update bindings to describe which clocks are needed, and DT files to include those clocks. Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Stephen Warren authored
Audio-related clocks need to be represented in the device tree. Update bindings to describe which clocks are needed, and DT files to include those clocks. Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Laxman Dewangan authored
NVIDIA's Tegra114 reference platform Dalmore has voltage switch regulators which are controlled by the Tegra GPIOs. Add DT node for fixed regulators. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Laxman Dewangan authored
NVIDIA's Tegra114 reference platform, Dalmore, uses the TPS65090 as secondary PMICs which is mainly act as voltage switch regulator controlled by i2c communication. Add DT node for TPS65090. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: remove unit-address from node name since it's unique already] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Laxman Dewangan authored
Dalmore uses the TPS51632 as CPU regulator. The device is connected on I2C5. Add DT node for TPS51632. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Rhyland Klein authored
This patch adds the node for the bq20z45 I2C gas gauge which is compatible with the sbs-battery power supply driver. Signed-off-by: Rhyland Klein <rklein@nvidia.com> [swarren: remove unit-address from node name since it's unique already] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Laxman Dewangan authored
Add documentation for device tree binding of NVIDIA's Tegra I2C controller driver. Describing all compatible values used for different Tegra SoCs in details in this documentation. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed a couple typos, trimmed examples] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Laxman Dewangan authored
NVIDIA's Tegra114 has 6 SPI controllers. These controllers are redesign on T114 with different register interface. Add DT entry for spi controllers and make it compatible with "nvidia,tegra114-spi", since they are a new incompatible design. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed reg property for 3rd SPI controller] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Laxman Dewangan authored
NVIDIA's Tegra114 SoCs have the matrix keyboard controller which supports 11x8 type of matrix. The number of rows and columns are configurable. Add DT entry for KBC controller with compatibility as "nvidia,tegra114-kbc". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Laxman Dewangan authored
Add APB DMA requestor and serial aliases for serial controller. There are two serial drivers i.e. 8250 based simple serial driver and APB DMA based serial driver for higher baudrate and performace. The simple serial driver is selected by compatible value "nvidia,tegra114-uart", "nvidia,tegra20-uart", and the APB DMA based driver is selected by compatible value "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Laxman Dewangan authored
NVIDIA's Tegra114 has 5 I2C controllers. These controllers have the following changes which makes incompatible with previous hardware: - Single clock source to I2C controller. - Interrupt support for per packet transfer. Add DT entry for I2C controllers and make it compatible with "nvidia,tegra114-i2c". Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed location of status property for consistency] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Laxman Dewangan authored
NVIDIA's Tegra114 has 32 channels APB DMA controller. Add DT entry for APB DMA controllers and make it compatible with "nvidia,tegra114-apbdma". Tegra114 DMA controller is not compatible with Tegra30/Tegra20 DMA controller driver as in Tegra114, the global pause also clock gate the DMA register and hence it iw not possible to write the DMA register with global pause. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren: fixed DT node order] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Andrew Chew authored
This patch adds a device tree node for the four PWM controllers present on Tegra114. Signed-off-by: Andrew Chew <achew@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Andrew Chew authored
We should be defining the PWM nodes with status as "disabled" in the chip-specific dtsi file, since we don't know whether specific boards will use the PWM or not. This patch fixes the PWM node status for Tegra20 and Tegra30. Also fixed the one user of PWM, which is the Tegra20 medcom-wide board, so that PWM is set to "okay" in the board-specific dts file. Signed-off-by: Andrew Chew <achew@nvidia.com> [swarren: in medcom-wide: fixed node sort order, removed duplicate pwm: label, fixed syntax error] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Rhyland Klein authored
Dalmore has a built-in eMMC device and a user-accessible SD card slot. Add device tree nodes to enable these. Based on changes by: Pritesh Raithatha <praithatha@nvidia.com> Signed-off-by: Rhyland Klein <rklein@nvidia.com> [swarren: added commit description, fixed DT node sort order] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Pritesh Raithatha authored
This patch adds in the SDHCI nodes for the busses supported on Tegra114 boards. Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> [Rhyland added clk refs to & reordered sdhci nodes and removed spaces] Signed-off-by: Rhyland Klein <rklein@nvidia.com> [swarren: fixed DT node sort order] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Pritesh Raithatha authored
This change adds the default pinctrl nodes for the Dalmore Tegra114 platform. Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> [Rhyland added patch description] Signed-off-by: Rhyland Klein <rklein@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> [swarren: fixed DT node sort order] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Stephen Warren authored
The USB PHY nodes are all grouped together rather than being sorted based on reg address like all other nodes fix this. I apologize for the churn; I should have noticed this during review of the patches that caused this. Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Stephen Warren authored
Remove white-space from empty line; triggers checkpatch. Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Stephen Warren authored
A gap exists in the binding's clock ID definitions. Fix the clock driver to be consistent. This allows pclk to be looked up through device tree and prevents: ERROR: could not get clock /pmc:pclk(0) Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Peter De Schrijver authored
The UART driver enables the console uart clock, so we don't need to do that anymore in this file. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Peter De Schrijver authored
Add references to tegra_car clocks for the basic device nodes. Also remove the clock-frequency property of the serial node as the UART driver can now use the clock framework to obtain the frequency. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Peter De Schrijver authored
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Peter De Schrijver authored
Implement clocks for Tegra114. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Peter De Schrijver authored
The device tree binding models Tegra114 CAR (Clock And Reset) as a single monolithic clock provider. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Peter De Schrijver authored
Workaround a hardware bug in MSENC during clock enable. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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