- 19 Nov, 2019 40 commits
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Anthony Koo authored
[Why] Unused register in the code [How] Remove unused register Signed-off-by:
Anthony Koo <Anthony.Koo@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Nikola Cornij authored
[why] In SST mode no idle pattern will be generated after link training if DIG FE is not connected to DIG BE. Signed-off-by:
Nikola Cornij <nikola.cornij@amd.com> Reviewed-by:
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Mikita Lipski authored
[why] We were missing debugfs files on MST connectors as the files weren't initialized. [how] Move connector debugfs initialization into connoctor's init helper function so it will be called by both SST and MST connectors. Also move connector registration so it will be registered before we create the entries. Signed-off-by:
Mikita Lipski <mikita.lipski@amd.com> Reviewed-by:
Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by:
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Nicholas Kazlauskas authored
[Why] By default we shouldn't be trying to write secure registers during DMUB hardware init. [How] Add a parameter to control whether we put the DMCUB into secure reset and attempt to load CW0/CW1. Signed-off-by:
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Nicholas Kazlauskas authored
[Why] We want to avoid reprogramming the cache window when possible. We don't need to worry about it for S3 but we *do* need to worry about it for S4 resume. DM can check whether hardware should be reinitialized or store software state when going to S4 to know whether we need to reprogram hardware. [How] Add helpers to the DMUB service to check hardware initialization state. DM will hook it up later. Signed-off-by:
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Alvin Lee authored
Changes in dc to allow for different cases where full update is required. Signed-off-by:
Alvin Lee <alvin.lee2@amd.com> Reviewed-by:
Jun Lei <Jun.Lei@amd.com> Acked-by:
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Samson Tam authored
[Why] When sending DCC with Stereo, DCC gets enabled but the meta addresses are 0. This happens momentarily before the meta addresses are populated with a valid address. [How] Add call validate_dcc_with_meta_address() in copy_surface_update_to_plane() to check for surface address and DCC change. When DCC has changed, check if DCC enable is true but meta address is 0. If so, we turn DCC enable to false. When surface address has changed, we check if DCC enable is false but meta address is not 0. If so, we turn DCC enable back to true. This will restore DCC enable to the proper setting once the meta address is valid. Signed-off-by:
Samson Tam <Samson.Tam@amd.com> Reviewed-by:
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Aric Cyr authored
Signed-off-by:
Aric Cyr <aric.cyr@amd.com> Reviewed-by:
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Stylon Wang authored
[Why] HDMI 2.0 HF-VSDB in EDID defines supported color depths in YCBCR420 modes. But we did not honor these bit masks when choosing pixel encoding. HDMI 2.0 compliance tests with deep color and YCBCR420 failed as a result. [How] Cap color depth based on y420_dc_modes from EDID. Signed-off-by:
Stylon Wang <stylon.wang@amd.com> Reviewed-by:
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Hugo Hu authored
[Why] Background color only takes effect in bottommost mpcc. [How] Update background color in bottommost mpcc. Signed-off-by:
Hugo Hu <hugo.hu@amd.com> Reviewed-by:
Yongqiang Sun <yongqiang.sun@amd.com> Acked-by:
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Leo (Hanghong) Ma authored
[Why] For debug purpose, we need to check HUBP_CLOCK_ENABLE in DTN log debugfs on Navi. [How] Add related register read in dcn20_hubp.c. Signed-off-by:
Leo (Hanghong) Ma <hanghong.ma@amd.com> Reviewed-by:
Harry Wentland <Harry.Wentland@amd.com> Acked-by:
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Joseph Gravenor authored
[why] Before we were reading registers specific to luma size, which caused a black line to appear on the screen from time to time, as although the luma row height is generally the same as the chroma row height for the video case, it will sometimes be one more [how] Read the register specific for the chroma size Signed-off-by:
Joseph Gravenor <joseph.gravenor@amd.com> Reviewed-by:
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Joseph Gravenor authored
[why] we want to increase the pte row plus 1 line if chroma viewport height is integer multiple of the pte row height [how] instead of ceiling viewport height, we floor it. this allows us to accommodate both cases: those where the chroma viewport height is integer multiple of the pte row height and those where it is not Signed-off-by:
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abdoulaye berthe authored
Signed-off-by:
abdoulaye berthe <abdoulaye.berthe@amd.com> Reviewed-by:
Wenjing Liu <Wenjing.Liu@amd.com> Acked-by:
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Chris Wilson authored
An old display with no audio may not have an EDID with a CEA block, or it may simply be too old to support audio. This is not a driver error, so don't flag it as such. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112140 References: ae2a3495 ("drm/amd: be quiet when no SAD block is found") Signed-off-by:
Chris Wilson <chris@chris-wilson.co.uk> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Jean Delvare <jdelvare@suse.de> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by:
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zhengbin authored
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/display/modules/color/color_gamma.c: In function build_freesync_hdr: drivers/gpu/drm/amd/display/modules/color/color_gamma.c:830:20: warning: variable min_content set but not used [-Wunused-but-set-variable] It is not used since commit 50575eb5 ("drm/amd/display: Only use EETF when maxCL > max display") Reviewed-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
zhengbin <zhengbin13@huawei.com> Signed-off-by:
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zhengbin authored
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/display/dc/bios/bios_parser.c: In function bios_get_board_layout_info: drivers/gpu/drm/amd/display/dc/bios/bios_parser.c:2743:22: warning: variable bp set but not used [-Wunused-but-set-variable] It is introduced by commit 1eeedbcc ("drm/amd/display: get board layout for edid emulation"), but never used, so remove it. Reviewed-by:
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zhengbin authored
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c: In function bios_get_board_layout_info: drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c:1826:22: warning: variable bp set but not used [-Wunused-but-set-variable] It is introduced by commit 1eeedbcc ("drm/amd/display: get board layout for edid emulation"), but never used, so remove it. Reviewed-by:
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zhengbin authored
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c: In function dm_determine_update_type_for_commit: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:6516:36: warning: variable old_plane_crtc set but not used [-Wunused-but-set-variable] It is introduced by commit a87fa993 ("drm/amd/display: Build stream update and plane updates in dm"), but never used, so remove it. Reviewed-by:
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Alex Deucher authored
Needed as a fallback if the vbios can't be fetched by other means. Reviewed-by:
Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by:
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Alex Deucher authored
Move reset_method next to reset callback to match the struct layout and the other definition in this file. Reviewed-by:
Yong Zhao <Yong.Zhao@amd.com> Signed-off-by:
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Yintian Tao authored
There is one regression from 042f3d7b745cd76aa To put flush_delayed_work after adev->shutdown = true which will make amdgpu_ih_process not response the irq At last, all ib ring tests will be failed just like below [drm] amdgpu: finishing device. [drm] Fence fallback timer expired on ring gfx [drm] Fence fallback timer expired on ring comp_1.0.0 [drm] Fence fallback timer expired on ring comp_1.1.0 [drm] Fence fallback timer expired on ring comp_1.2.0 [drm] Fence fallback timer expired on ring comp_1.3.0 [drm] Fence fallback timer expired on ring comp_1.0.1 amdgpu 0000:00:07.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on comp_1.1.1 (-110). amdgpu 0000:00:07.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on comp_1.2.1 (-110). amdgpu 0000:00:07.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on comp_1.3.1 (-110). amdgpu 0000:00:07.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on sdma0 (-110). amdgpu 0000:00:07.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on sdma1 (-110). amdgpu 0000:00:07.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on uvd_enc_0.0 (-110). amdgpu 0000:00:07.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on vce0 (-110). [drm:amdgpu_device_delayed_init_work_handler [amdgpu]] *ERROR* ib ring test failed (-110). v2: replace cancel_delayed_work_sync() with flush_delayed_work() Signed-off-by:
Yintian Tao <yttao@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Leo Liu authored
Signed-off-by:
Leo Liu <leo.liu@amd.com> Reviewed-by:
James Zhu <James.Zhu@amd.com> Signed-off-by:
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zhengbin authored
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/amdkfd/kfd_iommu.c: In function kfd_iommu_device_init: drivers/gpu/drm/amd/amdkfd/kfd_iommu.c:65:30: warning: variable top_dev set but not used [-Wunused-but-set-variable] Reported-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Evan Quan authored
For fine grained dpm, there is only two levels supported. However to reflect correctly the current clock frequency, there is an intermediate level faked. Thus on forcing level setting, we need to treat level 2 correctly as level 1. Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Kevin Wang <kevin1.wang@amd.com> Signed-off-by:
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Evan Quan authored
Otherwise, the error message prompted will confuse user. Signed-off-by:
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Evan Quan authored
RunBTC is added for Navi ASIC on hardware setup. Signed-off-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
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Evan Quan authored
Otherwise, without RLC reinitialization, the DPM reenablement will fail. That affects the custom pptable uploading. V2: setting/clearing uploading_custom_pp_table in smu_sys_set_pp_table() Reported-by:Matt Coffin <mcoffin13@gmail.com> Signed-off-by:
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Leo Liu authored
It also doen't care about FW loading type, so enabling it directly. Signed-off-by:
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Leo Liu authored
Arcturus VCN and JPEG only got CG support, and no PG support Signed-off-by:
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Leo Liu authored
And clean up the duplicated stuff Signed-off-by:
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Leo Liu authored
By adding JPEG IP block to the family Signed-off-by:
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Leo Liu authored
By using JPEG IP block type Signed-off-by:
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Leo Liu authored
By using its own enabling function Signed-off-by:
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Leo Liu authored
By using its own IP block type. Signed-off-by:
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Leo Liu authored
By using its own JPEG PowerUp and PowerDown messages v2: add argument to PowerDownJpeg message Signed-off-by:
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Leo Liu authored
Similar to SDMA, VCN etc. v2: add argument to both PowerUpJpeg and PowerDownJpeg messages Signed-off-by:
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Leo Liu authored
By separating the JPEG power feature, and using its own PowerUp and PowerDown messages v2: remove PowerUpJpeg message argument Signed-off-by:
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Leo Liu authored
It will be used for different SMU specific to HW Signed-off-by:
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Leo Liu authored
And enable them for Navi1x and Renoir Signed-off-by:
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