- 19 Jul, 2018 4 commits
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Christian König authored
Not sure what that was every used for, but now it is completely unused. Reviewed-by:
Leo Liu <leo.liu@amd.com> Signed-off-by:
Christian König <christian.koenig@amd.com> Acked-by:
Chunming Zhou <david1.zhou@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Michel Dänzer authored
Allowing CONFIG_DRM_AMD_DC_DCN1_0 to be disabled on X86 was an opportunity for display with Raven Ridge accidentally not working. Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
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Evan Quan authored
The 'result' is not initialized correctly. It causes the API return an error code even on success. Signed-off-by:
Evan Quan <evan.quan@amd.com> Acked-by:
Huang Rui <ray.huang@amd.com> Signed-off-by:
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Alex Deucher authored
Use the newly added irq source defines rather than magic numbers for smu7 thermal interrupts. Rewiewed-by:
Rex Zhu <rezhu@amd.com> Signed-off-by:
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- 18 Jul, 2018 6 commits
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Kees Cook authored
In the quest to remove all stack VLA usage from the kernel[1], this uses the maximum sane buffer size and removes copy/paste code. [1] https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qPXydAacU1RqZWA@mail.gmail.comReviewed-by:
Kees Cook <keescook@chromium.org> Signed-off-by:
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Huang Rui authored
BO ptr already be initialized at definition, we needn't use the complicated reference. v2: fix typo at subject line Signed-off-by:
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Sonny Jiang authored
Remove internal/unused kernel module parameters Signed-off-by:
Sonny Jiang <sonny.jiang@amd.com> Reviewed-by:
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Christian König authored
Pushing a job can change the ring assignment of an entity. v2: squash in: "drm/amdgpu: fix job priority handling" (Christian) Signed-off-by:
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Christian König authored
Allow to call amdgpu_ring_priority_get() after pushing the ring to the scheduler. Signed-off-by:
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Feifei Xu authored
Add some UTCL registers' golden settings. Signed-off-by:
Feifei Xu <Feifei.Xu@amd.com> Tested-by:
Kevin Wang <Kevin1.Wang@amd.com> Signed-off-by:
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- 17 Jul, 2018 2 commits
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Christian König authored
Remove superflous NULL check, fix coding style a bit, shorten error messages. Signed-off-by:
Junwei Zhang <Jerry.Zhang@amd.com> Acked-by:
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Christian König authored
We can get that from the ring. v2: squash in "drm/amdgpu: always initialize job->base.sched" (Alex) Signed-off-by:
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- 16 Jul, 2018 20 commits
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Christian König authored
Make sure that we properly initialize at least the sched member. Signed-off-by:
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Christian König authored
We can easily get that from the scheduler. Signed-off-by:
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Christian König authored
We know the ring through the entity anyway. Signed-off-by:
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Christian König authored
Can be obtained directly from the fence as well. Signed-off-by:
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Christian König authored
Move job related defines, structure and function declarations to amdgpu_job.h Signed-off-by:
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Harry Wentland authored
[Why] Any Linux kernel code should pass checkpatch.pl with no errors and little, if any, warning. [How] Fixing some spacing errors and warnings. Signed-off-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
Leo Li <sunpeng.li@amd.com> Signed-off-by:
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Krunoslav Kovac authored
[Why&How] Cursor boosting can only be done on DCN+ Check for nullptr since DCE doesn't implement it. Signed-off-by:
Krunoslav Kovac <Krunoslav.Kovac@amd.com> Reviewed-by:
Sivapiriyan Kumarasamy <Sivapiriyan.Kumarasamy@amd.com> Acked-by:
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Harry Wentland authored
Signed-off-by:
Steven Chiu <Steven.Chiu@amd.com> Acked-by:
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Jun Lei authored
[why] Some DTN tests still failing @ 2% Need to reduce. [how] add instrumentation code to driver so we can get more information from failed runs. Signed-off-by:
Jun Lei <Jun.Lei@amd.com> Reviewed-by:
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Tony Cheng authored
[Why] We sometime require remapping of FB address space to UMA [How] Move address tracking up a layer before we apply address translation Signed-off-by:
Charlene Liu <Charlene.Liu@amd.com> Acked-by:
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Nikola Cornij authored
This allows DM to do any necessary updates before MST discovery starts. Signed-off-by:
Nikola Cornij <nikola.cornij@amd.com> Reviewed-by:
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Gloria Li authored
[Why] Testing team wants a way to tell if HDR is on or not [How] Program the overscan color to visually indicate the HDR state of the top-most plane Signed-off-by:
Gloria Li <geling.li@amd.com> Reviewed-by:
Aric Cyr <Aric.Cyr@amd.com> Acked-by:
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Krunoslav Kovac authored
[Why] Cursor boosting is done via CNVC_CUR register which is DPP, not HUBP Previous commit was implementing it in HUBP functions, and also breaking diags tests. [How] 1. Undo original commit as well as Eric's diags test fix, almost completely 2. Move programming to DPP and call via new dc_stream function 3. Also removing cur_rom_en from dpp_cursor_attributes and programming as part of normal cursor attributes as it depends on cursor color format Signed-off-by:
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Vitaly Prosyak authored
Hard-coded luts are needed since complex algorithms are used for color and tone mapping. Add the headers for future use. Signed-off-by:
Vitaly Prosyak <vitaly.prosyak@amd.com> Reviewed-by:
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Junwei Zhang authored
To check rq pointer before adding entity into it. That avoids NULL pointer access in some case. v2: move the check to caller Suggested-by:
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Andrey Grodzovsky authored
This change is to support MESA performace optimization. Modify CS IOCTL to allow its input as command buffer and an array of buffer handles to create a temporay bo list and then destroy it when IOCTL completes. This saves on calling for BO_LIST create and destry IOCTLs in MESA and by this improves performance. v2: Avoid inserting the temp list into idr struct. v3: Remove idr alloation from amdgpu_bo_list_create. Remove useless argument from amdgpu_cs_parser_fini Minor cosmetic stuff. v4: Revert amdgpu_bo_list_destroy back to static Signed-off-by:
Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by:
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Eric Huang authored
This reverts commit b87079ec. SMU FW team ask to remove this version specific code. Signed-off-by:
Eric Huang <JinHuiEric.Huang@amd.com> Acked-by:
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Alex Deucher authored
return a uint32_t rather than an int to properly reflect what the function does. Reviewed-by:
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Alex Deucher authored
Split out the shared smumgr code for vega10 and 12 so we don't have duplicate code for both. Reviewed-by:
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Alex Deucher authored
Commented out. Reviewed-by:
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- 13 Jul, 2018 8 commits
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Alex Deucher authored
Rather than calculating it everytime we rebuild the toc buffer, calculate it once initially and then just copy the cached results to the vram buffer. Acked-by:
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Alex Deucher authored
use the structure member directly. Acked-by:
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Alex Deucher authored
use kaddr directly rather than secondary variable. Acked-by:
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Alex Deucher authored
Rather than using the index variable stored in vram. If the device fails to come back online after a resume cycle, reads from vram will return all 1s which will cause a segfault. Based on a patch from Thomas Martitz <kugel@rockbox.org>. This avoids the segfault, but we still need to sort out why the GPU does not come back online after a resume. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=105760Acked-by:
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Alex Deucher authored
Use the PP_STATE_SUPPORT_* rather than AMD_CG_SUPPORT_* when communicating with the SMU. Reviewed-by:
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Dmytro Laktyushkin authored
[why] Currently we do not turn off autocal when scaling is in bypass. In case vbios enalbes auto scale and our first mode set is a non-scaled mode we have autocal on causing screen corruption. [how] moves turning autocal off to be first thing done during scaler setup Signed-off-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by:
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Hugo Hu authored
[Why] Prevent unexpected color shows if DalMpVisualConfirm enable. [How] Zero out color configuration data for DalMpVisualConfirm when initiating. Signed-off-by:
Hugo Hu <hugo.hu@amd.com> Reviewed-by:
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Tony Cheng authored
Signed-off-by:
Anthony Koo <Anthony.Koo@amd.com> Acked-by:
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