- 17 Oct, 2022 39 commits
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Krzysztof Kozlowski authored
Convert Qualcomm SDM630 and SDM660 pin controller bindings to DT schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, their children with '-pins'). Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221011190231.76784-4-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Convert Qualcomm SDM845 pin controller bindings to DT schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, their children with '-pins'). Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930200529.331223-3-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Neil Armstrong authored
Convert the MDM9515 pinctrl bindings to dt-schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, optional children with '-pins'). Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20221005-mdm9615-pinctrl-yaml-v2-1-639fe67a04be@linaro.org [krzk: drop function from required] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Previous adjustment missefd one spot. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-35-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-34-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-33-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-32-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-31-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-30-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. qcom-sdx55-telit-fn980-tlb.dtb: pinctrl@f100000: 'pcie_ep_clkreq_default', 'pcie_ep_perst_default', 'pcie_ep_wake_default' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+' This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-29-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-28-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-27-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-26-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Certain pins, like SDcard related, do not have functions and such should not be required. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-25-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-24-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-23-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-22-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-21-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Certain pins, like SDcard related, do not have functions and such should not be required. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-20-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-19-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-18-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The MSM8226 pinctrl driver supports input-enable, blsp_i2c4, blsp_uart4 and sdc3 functions and DTS already uses it: qcom-msm8226-samsung-s3ve3g.dtb: pinctrl@fd510000: 'blsp1-i2c1', 'blsp1-i2c2', 'blsp1-i2c3', 'blsp1-i2c4', 'blsp1-i2c5' ... qcom-apq8026-lg-lenok.dtb: pinctrl@fd510000: touch-state: 'oneOf' conditional failed, one must be fixed: 'input-enable' does not match any of the regexes: 'pinctrl-[0-9]+' Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-17-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-16-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-15-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-14-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-13-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-12-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
One pinxmux node can have more than 4 pins to configure: ['gpio1', 'gpio3', 'gpio4', 'gpio5', 'gpio6', 'gpio7', 'gpio8', 'gpio10', 'gpio11', 'gpio12', 'gpio13', 'gpio14', 'gpio15', 'gpio17'] is too long Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-11-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The pin controller driver has BLSP functions from 0 to 5, not 1 to 6. Add missing blsp0_i2c, blsp0_spi (already used in ipq6018-cp01-c1) and blsp0_uart. Drop blsp6_i2c and blsp6_spi. This fixes dtbs_check warning: ipq6018-cp01-c1.dtb: pinctrl@1000000: spi-0-state: 'oneOf' conditional failed, one must be fixed: 'bias-pull-down', 'drive-strength', 'function', 'pins' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+' 'blsp0_spi' is not one of ['adsp_ext', 'alsp_int', ..... Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-10-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The IPQ6018 pinctrl driver supports qpic_pad and DTS already uses it: 'qpic_pad' is not one of ['adsp_ext', 'alsp_int', 'atest_bbrx0', ... Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-9-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Certain pins, like SDcard related, do not have functions and such should not be required. Add a check for this in common Qualcomm TLMM pin controller schema. Reviewed-by: Bjorn Andersson <andersson@kernel.org> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016170035.35014-8-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The existing SC7280 LPASS pin controller nodes use bias-bus-hold and input-enable, so allow them. Squash also blank lines for readability. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220927153429.55365-13-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The existing SC7280 LPASS pin controller nodes use bias-bus-hold, so allow it. Squash also blank lines for readability. Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220927153429.55365-12-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The LPASS pin controller follows generic pin-controller bindings, so just like TLMM, should have subnodes with '-state' and '-pins'. Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220927153429.55365-11-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The LPASS pin controller follows generic pin-controller bindings, so just like TLMM, should have subnodes with '-state' and '-pins'. qcom/qrb5165-rb5.dtb: pinctrl@33c0000: wsa-swr-active-pins: 'pins' is a required property Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220927153429.55365-10-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The LPASS pin controller follows generic pin-controller bindings, so just like TLMM, should have subnodes with '-state' and '-pins'. Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220927153429.55365-9-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The LPASS pin controller follows generic pin-controller bindings, so just like TLMM, should have subnodes with '-state' and '-pins'. Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220927153429.55365-8-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Fix double ']' in GPIO pattern to properly match "pins" property. Otherwise schema for pins state fails. Fixes: 4faa4e73 ("dt-bindings: pinctrl: qcom: Add sm8450 lpass lpi pinctrl bindings") Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220927153429.55365-7-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Fix double ']' in GPIO pattern to properly match "pins" property. Otherwise schema for pins state fails. Fixes: 958bb025 ("dt-bindings: pinctrl: qcom: Add sc8280xp lpass lpi pinctrl bindings") Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220927153429.55365-6-krzysztof.kozlowski@linaro.orgSigned-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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- 16 Oct, 2022 1 commit
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Linus Torvalds authored
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