1. 25 Apr, 2019 7 commits
    • Ajay Gupta's avatar
      usb: typec: ucsi: ccg: add firmware flashing support · 5c9ae5a8
      Ajay Gupta authored
      CCGx has two copies of the firmware in addition to the bootloader.
      If the device is running FW1, FW2 can be updated with the new version.
      Dual firmware mode allows the CCG device to stay in a PD contract and
      support USB PD and Type-C functionality while a firmware update is in
      progress.
      
      First we read the currently flashed firmware version of both
      primary and secondary firmware and then compare it with
      version of firmware file to determine if flashing is required.
      
      Command framework is added to support sending commands to CCGx
      controller. We wait for response after sending the command and then
      read the response from RAB_RESPONSE register.
      
      Below commands are supported,
      	- ENTER_FLASHING
      	- RESET
      	- PDPORT_ENABLE
      	- JUMP_TO_BOOT
      	- FLASH_ROW_RW
      	- VALIDATE_FW
      
      Command specific mutex lock is also added to sync between driver
      and user threads.
      
      PD port number information is added which is required while sending
      PD_PORT_ENABLE command
      Signed-off-by: default avatarAjay Gupta <ajayg@nvidia.com>
      [ heikki: Added ABI documentation. ]
      Signed-off-by: default avatarHeikki Krogerus <heikki.krogerus@linux.intel.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      5c9ae5a8
    • Ajay Gupta's avatar
      i2c: nvidia-gpu: Supply CCGx driver the fw build info · 5fd958a4
      Ajay Gupta authored
      Adding device property "ccgx,firmware-build" for the CCGx
      device, so the CCGx driver knows which firmware binary to
      use for a specific vendor.
      Suggested-by: default avatarHeikki Krogerus <heikki.krogerus@linux.intel.com>
      Signed-off-by: default avatarAjay Gupta <ajayg@nvidia.com>
      Signed-off-by: default avatarHeikki Krogerus <heikki.krogerus@linux.intel.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      5fd958a4
    • Ajay Gupta's avatar
      usb: typec: ucsi: ccg: add get_fw_info function · 5d438e20
      Ajay Gupta authored
      Function is to get the details of ccg firmware and device version.
      It will be useful in debugging and also during firmware update.
      Signed-off-by: default avatarAjay Gupta <ajayg@nvidia.com>
      Signed-off-by: default avatarHeikki Krogerus <heikki.krogerus@linux.intel.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      5d438e20
    • Serge Semin's avatar
      usb: usb251xb: Lock i2c-bus segment the hub resides · 6e3c8beb
      Serge Semin authored
      SMBus slave configuration is activated by CFG_SEL[1:0]=0x1 pins
      state. This is the mode the hub is supposed to be to let this driver
      work correctly. But a race condition might happen right after reset
      is cleared due to CFG_SEL[0] pin being multiplexed with SMBus SCL
      function. In case if the reset pin is handled by a i2c GPIO expander,
      which is also placed at the same i2c-bus segment as the usb251x
      SMB-interface connected to, then the hub reset clearance might
      cause the CFG_SEL[0] being latched in unpredictable state. So
      sometimes the hub configuration mode might be 0x1 (as expected),
      but sometimes being 0x0, which doesn't imply to have the hub SMBus-slave
      interface activated and consequently causes this driver failure.
      
      In order to fix the problem we must make sure the GPIO-reset chip doesn't
      reside the same i2c-bus segment as the SMBus-interface of the hub. If
      it doesn't, we can safely block the segment for the time the reset is
      cleared to prevent anyone generating a traffic at the i2c-bus SCL lane
      connected to the CFG_SEL[0] pin. But if it does, nothing we can do, so
      just return an error. If we locked the i2c-bus segment and tried to
      communicate with the GPIO-expander, it would cause a deadlock. If we didn't
      lock the i2c-bus segment, it would randomly cause the CFG_SEL[0] bit flip.
      Signed-off-by: default avatarSerge Semin <fancer.lancer@gmail.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      6e3c8beb
    • Marc Gonzalez's avatar
      usb: dwc3: Allow building USB_DWC3_QCOM without EXTCON · 77a49465
      Marc Gonzalez authored
      Keep EXTCON support optional, as some platforms do not need it.
      
      Do the same for USB_DWC3_OMAP while we're at it.
      
      Fixes: 3def4031 ("usb: dwc3: add EXTCON dependency for qcom")
      Signed-off-by: default avatarMarc Gonzalez <marc.w.gonzalez@free.fr>
      Cc: stable <stable@vger.kernel.org>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      77a49465
    • Dan Carpenter's avatar
      usbip: stub_rx: tidy the indenting in is_clear_halt_cmd() · 409fba22
      Dan Carpenter authored
      There is an extra space character before the return statement.
      Signed-off-by: default avatarDan Carpenter <dan.carpenter@oracle.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      409fba22
    • Greg Kroah-Hartman's avatar
      Merge tag 'phy-for-5.2' of... · d30e413f
      Greg Kroah-Hartman authored
      Merge tag 'phy-for-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next
      
      Kishon writes:
      
      phy: for 5.2
      
        *) Add a new *release* phy_ops invoked when the consumer relinquishes PHY
           that can be used to undo the operation performed in xlate
        *) Add new driver to support USB2 PHY and shared USB3 + PCIE PHY in Amlogic
           G12A SoC Family.
        *) Add new driver to support for Broadcom's Stingray USB PHY (Type 1 has
           one super speed PHY and one high speed PHY, Type 2 has one high speed PHY)
        *) Add new driver to support USB PHY in hi3660 SoC of Hisilicon
        *) Add new driver to support UFS M-PHY in MediaTek SoC
        *) Add new driver to support XUSB pad controller in Tegra186 SoCs
        *) Add new driver to support SERDES in TI's AM654 platform
        *) Add support for generation 2 USB2 PHY and gneration 3 USB2 PHY in r8a77470
           to phy-rcar-gen2.c and phy-rcar-gen3-usb2.c respectively
        *) Add support for PCIe QMP PHY support in msm8998 to phy-qcom-qmp.c
        *) Add support for SERDES6G in phy-ocelot-serdes.c
        *) Add support to set drive impedance from device tree in phy-rockchip-emmc.c
        *) Add support to power up/down the VBUS voltage rail in phy-fsl-imx8mq-usb.c
        *) Add support to shut off regulators that power UFS during system suspend
        *) Re-design phy-rcar-gen3-usb2.c to create separate PHY instances for each
           channel which helps to enable/disable interrupts for each instance
           independently
        *) Fix PCIe power up sequence to follow the TRM in order to ensure the DPLL &
           PHY operates correctly over the entire temperature range.
        *) Use devm_clk_get_optional to get optional clocks instead of adding
           custom error checks
      Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
      
      * tag 'phy-for-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (51 commits)
        dt-bindings: phy-qcom-qmp: Tweak qcom,msm8998-qmp-ufs-phy
        dt-bindings: phy-qcom-qmp: Add qcom,msm8998-qmp-pcie-phy
        phy: Add usb phy support for hi3660 Soc of Hisilicon
        dt-bindings: phy: Add support for HiSilicon's hi3660 USB PHY
        scsi: phy: mediatek: fix typo in author's email address
        phy: ocelot-serdes: Add support for SERDES6G muxing
        phy: fsl-imx8mq-usb: add support for VBUS power control
        dt-bindings: phy-imx8mq-usb: add optional vbus supply regulator
        phy: qcom-qmp: Add msm8998 PCIe QMP PHY support
        phy: ti: am654-serdes: Support all clksel values
        phy: ti: Add a new SERDES driver for TI's AM654x SoC
        dt-bindings: phy: ti: Add dt binding documentation for SERDES in AM654x SoC
        phy: core: Invoke pm_runtime_get_*/pm_runtime_put_* before invoking reset callback
        phy: core: Add *release* phy_ops invoked when the consumer relinquishes PHY
        phy: phy-meson-gxl-usb2: get optional clock by devm_clk_get_optional()
        phy: socionext: get optional clock by devm_clk_get_optional()
        phy: qcom-qusb2: get optional clock by devm_clk_get_optional()
        phy: phy-mtk-tphy: get optional clock by devm_clk_get_optional()
        phy: renesas: rcar-gen3-usb2: enable/disable independent irqs
        phy: renesas: rcar-gen3-usb2: Use pdev's device pointer on dev_vdbg()
        ...
      d30e413f
  2. 22 Apr, 2019 1 commit
  3. 19 Apr, 2019 10 commits
  4. 18 Apr, 2019 7 commits
  5. 17 Apr, 2019 15 commits