- 11 Dec, 2020 6 commits
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Amelie Delaunay authored
When dma_channel_release is called, it means that the channel won't be used anymore with the configuration it had. To ensure a future client can safely use the channel after it has been released, clean the configuration done when channel was requested. Signed-off-by:
Amelie Delaunay <amelie.delaunay@st.com> Link: https://lore.kernel.org/r/20201120143320.30367-3-amelie.delaunay@st.comSigned-off-by:
Vinod Koul <vkoul@kernel.org>
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Amelie Delaunay authored
To better understand error that can be detected by the DMA controller, manage the error flags before the transfer flags. This way, it is possible to know if the FIFO error flag is set for an over/underrun condition or a FIFO level error. When a FIFO over/underrun condition occurs, the data is not lost because peripheral request is not acknowledged by the stream until the over/ underrun condition is cleared. If this acknowledge takes too much time, the peripheral itself may detect an over/underrun condition of its internal buffer and data might be lost. That's why in case the FIFO error flag is set, we check if the channel is disabled or not, and if a Transfer Complete flag is set, which means that the channel is disabled because of the end of transfer. Because channel is disabled by hardware either by a FIFO level error, or by an end of transfer. Signed-off-by:
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Parth Y Shah authored
While performing suspend/resume, we were getting below kernel crash. [ 54.541672] [FTS][Info]gesture suspend... [ 54.605256] [FTS][Error][GESTURE]Enter into gesture(suspend) failed! [ 54.605256] [ 58.345850] irq event 10: bogus return value fffffff3 ...... [ 58.345966] [<ffff0000080830f0>] el1_irq+0xb0/0x124 [ 58.345971] [<ffff000008085360>] arch_cpu_idle+0x10/0x18 [ 58.345975] [<ffff0000081077f4>] do_idle+0x1ac/0x1e0 [ 58.345979] [<ffff0000081079c8>] cpu_startup_entry+0x20/0x28 [ 58.345983] [<ffff000008a80ed0>] rest_init+0xd0/0xdc [ 58.345988] [<ffff0000091c0b48>] start_kernel+0x390/0x3a4 [ 58.345990] handlers: [ 58.345994] [<ffff0000085120d0>] bam_dma_irq The reason for the crash we found is, bam_dma_irq() was returning negative value when the device resumes in some conditions. In addition, the irq handler should have one of the below return values. IRQ_NONE interrupt was not from this device or was not handled IRQ_HANDLED interrupt was handled by this device IRQ_WAKE_THREAD handler requests to wake the handler thread Therefore, to resolve this crash, we have changed the return value to IRQ_NONE. Signed-off-by:
Parth Y Shah <sparth1292@gmail.com> Link: https://lore.kernel.org/r/1607322820-7450-1-git-send-email-sparth1292@gmail.comSigned-off-by:
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Dave Jiang authored
Add support to allow configuration of Intel Analytics Accelerator (IAX) in addition to the Intel Data Streaming Accelerator (DSA). The IAX hardware has the same configuration interface as DSA. The main difference is the type of operations it performs. We can support the DSA and IAX devices on the same driver with some tweaks. IAX has a 64B completion record that needs to be 64B aligned, as opposed to a 32B completion record that is 32B aligned for DSA. IAX also does not support token management. Signed-off-by:
Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/160564555488.1834439.4261958859935360473.stgit@djiang5-desk3.ch.intel.comSigned-off-by:
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Fabien Parent authored
Add bindings to APDMA for MT8516 SoC. MT8516 is compatible with MT6577. Signed-off-by:
Fabien Parent <fparent@baylibre.com> Reviewed-by:
Matthias Brugger <matthias.bgg@gmail.com> Acked-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20201209114736.70625-1-fparent@baylibre.comSigned-off-by:
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Jonathan McDowell authored
Update the kerneldoc function headers to fix build warnings: drivers/dma/qcom/qcom_adm.c:180: warning: Function parameter or member 'chan' not described in 'adm_free_chan' drivers/dma/qcom/qcom_adm.c:190: warning: Function parameter or member 'burst' not described in 'adm_get_blksize' drivers/dma/qcom/qcom_adm.c:466: warning: Function parameter or member 'chan' not described in 'adm_terminate_all' drivers/dma/qcom/qcom_adm.c:466: warning: Excess function parameter 'achan' description in 'adm_terminate_all' drivers/dma/qcom/qcom_adm.c:503: warning: Function parameter or member 'achan' not described in 'adm_start_dma' Signed-off-by:
Jonathan McDowell <noodles@earth.li> Link: https://lore.kernel.org/r/20201126184602.GA1008@earth.liSigned-off-by:
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- 10 Dec, 2020 1 commit
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Dave Jiang authored
With the DSA spec 1.1 update, a knob to disable ATS for individually is introduced. Add enabling code to allow a system admin to make the configuration through sysfs. Signed-off-by:
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- 24 Nov, 2020 13 commits
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Krzysztof Kozlowski authored
The driver can match only via the DT table so the main table should be always used and the of_match_ptr does not have any sense (this also allows ACPI matching via PRP0001, even though it is not relevant here). The secondary match of_device_id tables (passed to of_match_node) should be marked as maybe unused to fix compile testing (!CONFIG_OF on x86_64) warnings: drivers/dma/ti/dma-crossbar.c:125:34: warning: ‘ti_am335x_master_match’ defined but not used [-Wunused-const-variable=] drivers/dma/ti/dma-crossbar.c:22:34: warning: ‘ti_dma_xbar_match’ defined but not used [-Wunused-const-variable=] Signed-off-by:Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20201120162303.482126-6-krzk@kernel.orgSigned-off-by:
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Krzysztof Kozlowski authored
The driver uses a second of_device_id table in the probe() function by passing it to of_match_node(). This code will be a no-op for compile testing (!CONFIG_OF on x86_64): drivers/dma/stm32-dmamux.c:171:34: warning: ‘stm32_stm32dma_master_match’ defined but not used [-Wunused-const-variable=] Signed-off-by: -
Krzysztof Kozlowski authored
The driver can match only via the DT table so the table should be always used and the of_match_ptr does not have any sense (this also allows ACPI matching via PRP0001, even though it is not relevant here). This fixes compile warning (!CONFIG_OF on x86_64): drivers/dma/sf-pdma/sf-pdma.c:576:34: warning: ‘sf_pdma_dt_ids’ defined but not used [-Wunused-const-variable=] Signed-off-by: -
Krzysztof Kozlowski authored
The driver can match only via the DT table so the table should be always used and the of_match_ptr does not have any sense (this also allows ACPI matching via PRP0001, even though it is not relevant here). This fixes compile warning (!CONFIG_OF on x86_64): drivers/dma/mv_xor.c:1281:34: warning: ‘mv_xor_dt_ids’ defined but not used [-Wunused-const-variable=] Signed-off-by: -
Krzysztof Kozlowski authored
The driver can match only via the DT table so the table should be always used and the of_match_ptr does not have any sense (this also allows ACPI matching via PRP0001, even though it is not relevant here). This fixes compile warning (!CONFIG_OF on x86_64): drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c:984:34: warning: ‘dw_dma_of_id_table’ defined but not used [-Wunused-const-variable=] Signed-off-by: -
Krzysztof Kozlowski authored
The driver can match only via the DT table so the table should be always used and the of_match_ptr does not have any sense (this also allows ACPI matching via PRP0001, even though it is not relevant here). This fixes compile warning (!CONFIG_OF on x86_64): drivers/dma/dma-jz4780.c:1031:34: warning: ‘jz4780_dma_dt_match’ defined but not used [-Wunused-const-variable=] Signed-off-by: -
Fabio Estevam authored
The mxs-dma driver is only used by DT platforms and the .id_table is unused. Get rid of it to simplify the code. Signed-off-by:
Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20201123193051.17285-1-festevam@gmail.comSigned-off-by:
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Zhihao Cheng authored
Return the corresponding error code when first_msi_entry() returns NULL in mv_xor_v2_probe(). Fixes: 19a340b1 ("dmaengine: mv_xor_v2: new driver") Reported-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
Zhihao Cheng <chengzhihao1@huawei.com> Link: https://lore.kernel.org/r/20201124010813.1939095-1-chengzhihao1@huawei.comSigned-off-by:
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Fabio Estevam authored
Since 5.10-rc1 i.MX is a devicetree-only platform, so simplify the code by removing the unused non-DT support. Signed-off-by:
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Vinod Koul authored
This controller provides DMAengine capabilities for a variety of peripheral buses such as I2C, UART, and SPI. By using GPI dmaengine driver, bus drivers can use a standardize interface that is protocol independent to transfer data between memory and peripheral. Link: https://lore.kernel.org/r/20201109085450.24843-4-vkoul@kernel.orgSigned-off-by:
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Vinod Koul authored
Some complex dmaengine controllers have capability to program the peripheral device, so pass on the peripheral configuration as part of dma_slave_config Link: https://lore.kernel.org/r/20201109085450.24843-3-vkoul@kernel.orgSigned-off-by:
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Vinod Koul authored
Add devicetree binding documentation for GPI DMA controller implemented on Qualcomm SoCs Reviewed-by:
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Jonathan McDowell authored
Add the DMA engine driver for the QCOM Application Data Mover (ADM) DMA controller found in the MSM8x60 and IPQ/APQ8064 platforms. The ADM supports both memory to memory transactions and memory to/from peripheral device transactions. The controller also provides flow control capabilities for transactions to/from peripheral devices. The initial release of this driver supports slave transfers to/from peripherals and also incorporates CRCI (client rate control interface) flow control. The hardware only supports a 32 bit physical address, so specifying !PHYS_ADDR_T_64BIT gives maximum COMPILE_TEST coverage without having to spend effort on kludging things in the code that will never actually be needed on real hardware. Signed-off-by:
Andy Gross <agross@codeaurora.org> Signed-off-by:
Thomas Pedersen <twp@codeaurora.org> Signed-off-by:
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- 18 Nov, 2020 5 commits
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Fabio Estevam authored
Since 5.10-rc1 i.MX is a devicetree-only platform and the existing .id_table support in this driver was only useful for old non-devicetree platforms. Signed-off-by:
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Yangtao Li authored
The dma of a100 is similar to h6, with some minor changes to support greater addressing capabilities. Add support for it. Signed-off-by:
Yangtao Li <frank@allwinnertech.com> Link: https://lore.kernel.org/r/719852c6a9a597bd2e82d01a268ca02b9dee826c.1604988979.git.frank@allwinnertech.comSigned-off-by:
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Yangtao Li authored
Add a binding for A100's dma controller. Signed-off-by:
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周琰杰 (Zhou Yanjie) authored
Add the dmaengine bindings for the X2000 SoC from Ingenic. Signed-off-by:
周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by:
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周琰杰 (Zhou Yanjie) authored
Add the dmaengine bindings for the JZ4775 SoC from Ingenic. Signed-off-by:
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- 09 Nov, 2020 15 commits
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Barry Song authored
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by:
Barry Song <song.bao.hua@hisilicon.com> Acked-by:
Robert Jarzmik <robert.jarzmik@free.fr> Cc: Daniel Mack <daniel@zonque.org> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Link: https://lore.kernel.org/r/20201027215252.25820-11-song.bao.hua@hisilicon.comSigned-off-by:
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Barry Song authored
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20201027215252.25820-10-song.bao.hua@hisilicon.comSigned-off-by:
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Barry Song authored
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by:
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Barry Song authored
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by:
Zhou Wang <wangzhou1@hisilicon.com> Link: https://lore.kernel.org/r/20201027215252.25820-8-song.bao.hua@hisilicon.comSigned-off-by:
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Barry Song authored
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by:
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Barry Song authored
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by:
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Barry Song authored
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by:
Jon Hunter <jonathanh@nvidia.com> Cc: Laxman Dewangan <ldewangan@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Link: https://lore.kernel.org/r/20201027215252.25820-5-song.bao.hua@hisilicon.comSigned-off-by:
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Barry Song authored
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by:
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Barry Song authored
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20201027215252.25820-3-song.bao.hua@hisilicon.comSigned-off-by:
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Barry Song authored
Running in hardIRQ, disabling IRQ is redundant since hardIRQ has disabled IRQ. This patch removes the irqsave and irqstore to save some instruction cycles. Signed-off-by:
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Grygorii Strashko authored
The NAVSS UDMA will stuck if target IP module is disabled by PM while PSI-L threads are paired UDMA<->IP and no further transfers is possible. This could be the case for IPs J721E Main CPSW (cpsw9g). Hence, to avoid such situation do PSI-L threads pairing only when UDMA channel is going to be enabled as at this time DMA consumer module expected to be active already. Signed-off-by:
Grygorii Strashko <grygorii.strashko@ti.com> Acked-by:
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Andy Shevchenko authored
ifdeffery is prone to errors and makes code harder to read. Switch to use __maybe_unused instead of ifdeffery. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20201104103131.89907-1-andriy.shevchenko@linux.intel.comSigned-off-by:
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Andy Shevchenko authored
When consumer requests channel power on the DMA controller device and otherwise on the freeing channel resources. Note, in some cases consumer acquires channel at the ->probe() stage and releases it at the ->remove() stage. It will mean that DMA controller device will be powered during all this time if there is no assist from hardware to idle it. The above mentioned cases should be investigated separately and individually. Signed-off-by:
Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20201103183938.64752-1-andriy.shevchenko@linux.intel.comSigned-off-by:
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Dave Jiang authored
Convert table offset multiplier magic number to a define. Signed-off-by:
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Dave Jiang authored
Create helper macros to make group offset calculation more readable. Signed-off-by:
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