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  1. 08 Jun, 2013 3 commits
  2. 29 May, 2013 8 commits
    • Grant Likely's avatar
      genirq: irqchip: Add mask to block out invalid irqs · e8bd834f
      Grant Likely authored
      Some controllers have irqs that aren't wired up and must never be used.
      For the generic chip attached to an irq_domain this provides a mask that
      can be used to block out particular irqs so that they never get mapped.
      Signed-off-by: default avatarGrant Likely <grant.likely@linaro.org>
      Link: http://lkml.kernel.org/r/1369793454-19197-2-git-send-email-grant.likely@linaro.orgSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      e8bd834f
    • Thomas Gleixner's avatar
      genirq: Generic chip: Add linear irq domain support · 088f40b7
      Thomas Gleixner authored
      Provide infrastructure for irq chip implementations which work on
      linear irq domains.
      
      - Interface to allocate multiple generic chips which are associated to
        the irq domain.
      
      - Interface to get the generic chip pointer for a particular hardware
        interrupt in the domain.
      
      - irq domain mapping function to install the chip for a particular
        interrupt.
      
      Note: This lacks a removal function for now.
      
      [ Sebastian Hesselbarth: Mask cache and pointer math fixups ]
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Russell King - ARM Linux <linux@arm.linux.org.uk>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Jean-Francois Moine <moinejf@free.fr>
      Cc: devicetree-discuss@lists.ozlabs.org
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
      Cc: Gregory Clement <gregory.clement@free-electrons.com>
      Cc: Gerlando Falauto <gerlando.falauto@keymile.com>
      Cc: Rob Landley <rob@landley.net>
      Acked-by: default avatarGrant Likely <grant.likely@linaro.org>
      Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
      Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
      Link: http://lkml.kernel.org/r/20130506142539.450634298@linutronix.deSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      088f40b7
    • Thomas Gleixner's avatar
      genirq: Generic chip: Split out code into separate functions · 3528d82b
      Thomas Gleixner authored
      Preparatory patch for linear interrupt domains.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Russell King - ARM Linux <linux@arm.linux.org.uk>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Jean-Francois Moine <moinejf@free.fr>
      Cc: devicetree-discuss@lists.ozlabs.org
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
      Cc: Gregory Clement <gregory.clement@free-electrons.com>
      Cc: Gerlando Falauto <gerlando.falauto@keymile.com>
      Cc: Rob Landley <rob@landley.net>
      Acked-by: default avatarGrant Likely <grant.likely@linaro.org>
      Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
      Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
      Link: http://lkml.kernel.org/r/20130506142539.377017672@linutronix.deSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      3528d82b
    • Thomas Gleixner's avatar
      genirq: irqchip: Add a mask calculation function · d0051816
      Thomas Gleixner authored
      Some chips have weird bit mask access patterns instead of the linear
      you expect. Allow them to calculate the cached mask themself.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Russell King - ARM Linux <linux@arm.linux.org.uk>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Jean-Francois Moine <moinejf@free.fr>
      Cc: devicetree-discuss@lists.ozlabs.org
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
      Cc: Gregory Clement <gregory.clement@free-electrons.com>
      Cc: Gerlando Falauto <gerlando.falauto@keymile.com>
      Cc: Rob Landley <rob@landley.net>
      Acked-by: default avatarGrant Likely <grant.likely@linaro.org>
      Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
      Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
      Link: http://lkml.kernel.org/r/20130506142539.302898834@linutronix.deSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      d0051816
    • Thomas Gleixner's avatar
      genirq: Generic chip: Cache per irq bit mask · 966dc736
      Thomas Gleixner authored
      Cache the per irq bit mask instead of recalculating it over and over.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Russell King - ARM Linux <linux@arm.linux.org.uk>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Jean-Francois Moine <moinejf@free.fr>
      Cc: devicetree-discuss@lists.ozlabs.org
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
      Cc: Gregory Clement <gregory.clement@free-electrons.com>
      Cc: Gerlando Falauto <gerlando.falauto@keymile.com>
      Cc: Rob Landley <rob@landley.net>
      Acked-by: default avatarGrant Likely <grant.likely@linaro.org>
      Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
      Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
      Link: http://lkml.kernel.org/r/20130506142539.227119865@linutronix.deSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      966dc736
    • Gerlando Falauto's avatar
      genirq: Generic chip: Handle separate mask registers · af80b0fe
      Gerlando Falauto authored
      There are cases where all irq_chip_type instances have separate mask
      registers, making a shared mask register cache unsuitable for the
      purpose.
      
      Introduce a new flag IRQ_GC_MASK_CACHE_PER_TYPE. If set, point the per
      chip mask pointer to the per chip private mask cache instead.
      
      [ tglx: Simplified code, renamed flag and massaged changelog ]
      Signed-off-by: default avatarGerlando Falauto <gerlando.falauto@keymile.com>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Joey Oravec <joravec@drewtech.com>
      Cc: Lennert Buytenhek <kernel@wantstofly.org>
      Cc: Russell King - ARM Linux <linux@arm.linux.org.uk>
      Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
      Cc: Holger Brunck <Holger.Brunck@keymile.com>
      Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
      Acked-by: default avatarGrant Likely <grant.likely@linaro.org>
      Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: devicetree-discuss@lists.ozlabs.org
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Ben Dooks <ben-linux@fluff.org>
      Cc: Gregory Clement <gregory.clement@free-electrons.com>
      Cc: Simon Guinot <simon@sequanux.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Cc: Jean-Francois Moine <moinejf@free.fr>
      Cc: Nicolas Pitre <nico@fluxnic.net>
      Cc: Rob Landley <rob@landley.net>
      Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
      Link: http://lkml.kernel.org/r/20130506142539.152569748@linutronix.deSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      af80b0fe
    • Gerlando Falauto's avatar
      genirq: Generic chip: Add support for per chip type mask cache · 899f0e66
      Gerlando Falauto authored
      Today the same interrupt mask cache (stored within struct irq_chip_generic)
      is shared between all the irq_chip_type instances. As there are instances
      where each irq_chip_type uses a distinct mask register (as it is the case
      for Orion SoCs), sharing a single mask cache may be incorrect.
      So add a distinct pointer for each irq_chip_type, which for now
      points to the original mask register within irq_chip_generic.
      So no functional changes here.
      
      [ tglx: Minor cosmetic tweaks ]
      Reported-by: default avatarJoey Oravec <joravec@drewtech.com>
      Signed-off-by: default avatarSimon Guinot <sguinot@lacie.com>
      Signed-off-by: default avatarHolger Brunck <holger.brunck@keymile.com>
      Signed-off-by: default avatarGerlando Falauto <gerlando.falauto@keymile.com>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Lennert Buytenhek <kernel@wantstofly.org>
      Cc: Russell King - ARM Linux <linux@arm.linux.org.uk>
      Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
      Cc: Holger Brunck <Holger.Brunck@keymile.com>
      Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
      Acked-by: default avatarGrant Likely <grant.likely@linaro.org>
      Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: devicetree-discuss@lists.ozlabs.org
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Ben Dooks <ben-linux@fluff.org>
      Cc: Gregory Clement <gregory.clement@free-electrons.com>
      Cc: Simon Guinot <simon@sequanux.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Cc: Jean-Francois Moine <moinejf@free.fr>
      Cc: Nicolas Pitre <nico@fluxnic.net>
      Cc: Rob Landley <rob@landley.net>
      Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
      Link: http://lkml.kernel.org/r/20130506142539.082226607@linutronix.deSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      899f0e66
    • Gerlando Falauto's avatar
      genirq: Generic chip: Remove the local cur_regs() function · cfeaa93f
      Gerlando Falauto authored
      Since we already have an irq_data_get_chip_type() function which returns
      a pointer to irq_chip_type, use that instead of cur_regs().
      Signed-off-by: default avatarGerlando Falauto <gerlando.falauto@keymile.com>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Joey Oravec <joravec@drewtech.com>
      Cc: Lennert Buytenhek <kernel@wantstofly.org>
      Cc: Russell King - ARM Linux <linux@arm.linux.org.uk>
      Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
      Cc: Holger Brunck <Holger.Brunck@keymile.com>
      Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
      Acked-by: default avatarGrant Likely <grant.likely@linaro.org>
      Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: devicetree-discuss@lists.ozlabs.org
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Ben Dooks <ben-linux@fluff.org>
      Cc: Gregory Clement <gregory.clement@free-electrons.com>
      Cc: Simon Guinot <simon@sequanux.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Cc: Jean-Francois Moine <moinejf@free.fr>
      Cc: Nicolas Pitre <nico@fluxnic.net>
      Cc: Rob Landley <rob@landley.net>
      Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
      Link: http://lkml.kernel.org/r/20130506142539.010164766@linutronix.deSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      cfeaa93f
  3. 06 May, 2013 1 commit
    • Benjamin Herrenschmidt's avatar
      irqdomain: Allow quiet failure mode · 5fe0c1f2
      Benjamin Herrenschmidt authored
      Some interrupt controllers refuse to map interrupts marked as
      "protected" by firwmare. Since we try to map everyting in the
      device-tree on some platforms, we end up with a lot of nasty
      WARN's in the boot log for what is a normal situation on those
      machines.
      
      This defines a specific return code (-EPERM) from the host map()
      callback which cause irqdomain to fail silently.
      
      MPIC is updated to return this when hitting a protected source
      printing only a single line message for diagnostic purposes.
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      5fe0c1f2
  4. 01 May, 2013 1 commit
  5. 09 Apr, 2013 1 commit
    • Al Viro's avatar
      procfs: new helper - PDE_DATA(inode) · d9dda78b
      Al Viro authored
      The only part of proc_dir_entry the code outside of fs/proc
      really cares about is PDE(inode)->data.  Provide a helper
      for that; static inline for now, eventually will be moved
      to fs/proc, along with the knowledge of struct proc_dir_entry
      layout.
      Signed-off-by: default avatarAl Viro <viro@zeniv.linux.org.uk>
      d9dda78b
  6. 23 Feb, 2013 1 commit
  7. 18 Feb, 2013 1 commit
  8. 07 Feb, 2013 1 commit
  9. 24 Jan, 2013 1 commit
    • Alexander Gordeev's avatar
      x86/MSI: Support multiple MSIs in presense of IRQ remapping · 51906e77
      Alexander Gordeev authored
      The MSI specification has several constraints in comparison with
      MSI-X, most notable of them is the inability to configure MSIs
      independently. As a result, it is impossible to dispatch
      interrupts from different queues to different CPUs. This is
      largely devalues the support of multiple MSIs in SMP systems.
      
      Also, a necessity to allocate a contiguous block of vector
      numbers for devices capable of multiple MSIs might cause a
      considerable pressure on x86 interrupt vector allocator and
      could lead to fragmentation of the interrupt vectors space.
      
      This patch overcomes both drawbacks in presense of IRQ remapping
      and lets devices take advantage of multiple queues and per-IRQ
      affinity assignments.
      Signed-off-by: default avatarAlexander Gordeev <agordeev@redhat.com>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Matthew Wilcox <willy@linux.intel.com>
      Cc: Jeff Garzik <jgarzik@pobox.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Link: http://lkml.kernel.org/r/c8bd86ff56b5fc118257436768aaa04489ac0a4c.1353324359.git.agordeev@redhat.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
      51906e77
  10. 18 Dec, 2012 1 commit
  11. 11 Dec, 2012 1 commit
  12. 30 Nov, 2012 1 commit
  13. 12 Nov, 2012 1 commit
    • Thomas Gleixner's avatar
      genirq: Always force thread affinity · 04aa530e
      Thomas Gleixner authored
      Sankara reported that the genirq core code fails to adjust the
      affinity of an interrupt thread in several cases:
      
       1) On request/setup_irq() the call to setup_affinity() happens before
          the new action is registered, so the new thread is not notified.
      
       2) For secondary shared interrupts nothing notifies the new thread to
          change its affinity.
      
       3) Interrupts which have the IRQ_NO_BALANCE flag set are not moving
          the thread either.
      
      Fix this by setting the thread affinity flag right on thread creation
      time. This ensures that under all circumstances the thread moves to
      the right place. Requires a check in irq_thread_check_affinity for an
      existing affinity mask (CONFIG_CPU_MASK_OFFSTACK=y)
      Reported-and-tested-by: default avatarSankara Muthukrishnan <sankara.m@gmail.com>
      Cc: stable@vger.kernel.org
      Link: http://lkml.kernel.org/r/alpine.LFD.2.02.1209041738200.2754@ionosSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      04aa530e
  14. 01 Nov, 2012 2 commits
  15. 10 Oct, 2012 1 commit
    • Linus Walleij's avatar
      irqdomain: augment add_simple() to allocate descs · 2854d167
      Linus Walleij authored
      Currently we rely on all IRQ chip instances to dynamically
      allocate their IRQ descriptors unless they use the linear
      IRQ domain. So for irqdomain_add_legacy() and
      irqdomain_add_simple() the caller need to make sure that
      descriptors are allocated.
      
      Let's slightly augment the yet unused irqdomain_add_simple()
      to also allocate descriptors as a means to simplify usage
      and avoid code duplication throughout the kernel.
      
      We warn if descriptors cannot be allocated, e.g. if a
      platform has the bad habit of hogging descriptors at boot
      time.
      
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Grant Likely <grant.likely@secretlab.ca>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Lee Jones <lee.jones@linaro.org>
      Reviewed-by: default avatarRob Herring <rob.herring@calxeda.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      2854d167
  16. 21 Aug, 2012 2 commits
  17. 25 Jul, 2012 3 commits
    • Thomas Gleixner's avatar
      genirq: Allow irq chips to mark themself oneshot safe · dc9b229a
      Thomas Gleixner authored
      Some interrupt chips like MSI are oneshot safe by implementation. For
      those interrupts we can avoid the mask/unmask sequence for threaded
      interrupt handlers.
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Link: http://lkml.kernel.org/r/alpine.LFD.2.02.1207132056540.32033@ionos
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Avi Kivity <avi@redhat.com>
      Cc: Marcelo Tosatti <mtosatti@redhat.com>
      Cc: Jan Kiszka <jan.kiszka@web.de>
      dc9b229a
    • Mark Brown's avatar
      irqdomain: Improve diagnostics when a domain mapping fails · f5a1ad05
      Mark Brown authored
      When the map operation fails log the error code we get and add a WARN_ON()
      so we get a backtrace (which should help work out which interrupt is the
      source of the issue).
      Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
      f5a1ad05
    • Grant Likely's avatar
      irqdomain: eliminate slow-path revmap lookups · 4c0946c4
      Grant Likely authored
      With the current state of irq_domain, the reverse map is always updated
      when new IRQs get mapped.  This means that the irq_find_mapping() function
      can be simplified to execute the revmap lookup functions unconditionally
      
      This patch adds lookup functions for the revmaps that don't yet have one
      and removes the slow path lookup code path.
      
      v8: Broke out unrelated changes into separate patches.  Rebased on Paul's irq
          association patches.
      v7: Rebased to irqdomain/next for v3.4 and applied before the removal of 'hint'
      v6: Remove the slow path entirely.  The only place where the slow path
          could get called is for a linear mapping if the hwirq number is larger
          than the linear revmap size.  There shouldn't be any interrupt
          controllers that do that.
      v5: rewrite to not use a ->revmap() callback.  It is simpler, smaller,
          safer and faster to open code each of the revmap lookups directly into
          irq_find_mapping() via a switch statement.
      v4: Fix build failure on incorrect variable reference.
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Milton Miller <miltonm@bga.com>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: Rob Herring <rob.herring@calxeda.com>
      4c0946c4
  18. 22 Jul, 2012 2 commits
  19. 19 Jul, 2012 1 commit
  20. 15 Jul, 2012 1 commit
  21. 11 Jul, 2012 6 commits
    • Grant Likely's avatar
      irqdomain: Fix irq_create_direct_mapping() to test irq_domain type. · 9844a552
      Grant Likely authored
      irq_create_direct_mapping can only be used with the NOMAP type.  Make
      the function test to ensure it is passed the correct type of
      irq_domain.
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Rob Herring <rob.herring@calxeda.com>
      9844a552
    • Grant Likely's avatar
      irqdomain: Eliminate dedicated radix lookup functions · d6b0d1f7
      Grant Likely authored
      In preparation to remove the slow revmap path, eliminate the public
      radix revmap lookup functions.  This simplifies the code and makes the
      slowpath removal patch a lot simpler.
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Rob Herring <rob.herring@calxeda.com>
      d6b0d1f7
    • Grant Likely's avatar
      irqdomain: Support for static IRQ mapping and association. · 98aa468e
      Grant Likely authored
      This adds a new strict mapping API for supporting creation of linux IRQs
      at existing positions within the domain. The new routines are as follows:
      
      For dynamic allocation and insertion to specified ranges:
      
      	- irq_create_identity_mapping()
      	- irq_create_strict_mappings()
      
      These will allocate and associate a range of linux IRQs at the specified
      location. This can be used by controllers that have their own static linux IRQ
      definitions to map a hwirq range to, as well as for platforms that wish to
      establish 1:1 identity mapping between linux and hwirq space.
      
      For insertion to specified ranges by platforms that do their own irq_desc
      management:
      
      	- irq_domain_associate()
      	- irq_domain_associate_many()
      
      These in turn call back in to the domain's ->map() routine, for further
      processing by the platform. Disassociation of IRQs get handled through
      irq_dispose_mapping() as normal.
      
      With these in place it should be possible to begin migration of legacy IRQ
      domains to linear ones, without requiring special handling for static vs
      dynamic IRQ definitions in DT vs non-DT paths. This also makes it possible
      for domains with static mappings to adopt whichever tree model best fits
      their needs, rather than simply restricting them to linear revmaps.
      Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
      [grant.likely: Reorganized irq_domain_associate{,_many} to have all logic in one place]
      [grant.likely: Add error checking for unallocated irq_descs at associate time]
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Rob Herring <rob.herring@calxeda.com>
      98aa468e
    • Grant Likely's avatar
      irqdomain: Always update revmap when setting up a virq · 2a71a1a9
      Grant Likely authored
      At irq_setup_virq() time all of the data needed to update the reverse
      map is available, but the current code ignores it and relies upon the
      slow path to insert revmap records.  This patch adds revmap updating
      to the setup path so the slow path will no longer be necessary.
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Rob Herring <rob.herring@calxeda.com>
      2a71a1a9
    • Grant Likely's avatar
      irqdomain: Split disassociating code into separate function · 913af207
      Grant Likely authored
      This patch moves the irq disassociation code out into a separate
      function in preparation to extend irq_setup_virq to handle multiple
      irqs and rename it for use by interrupt controller drivers.  The new
      function will be used by irq_setup_virq() in its error path.
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
      Acked-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Rob Herring <rob.herring@calxeda.com>
      913af207
    • Dong Aisheng's avatar
      irq_domain: correct a minor wrong comment for linear revmap · 22076c77
      Dong Aisheng authored
      The revmap type should be linear for irq_domain_add_linear function.
      Signed-off-by: default avatarDong Aisheng <dong.aisheng@linaro.org>
      Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
      22076c77