1. 01 Oct, 2020 1 commit
  2. 28 Sep, 2020 8 commits
    • Stephen Boyd's avatar
      phy: qcom-qmp: Add support for sc7180 DP phy · 7612f4e2
      Stephen Boyd authored
      Add the necessary compatible strings and phy data for the sc7180 USB3+DP
      combo phy.
      Signed-off-by: default avatarStephen Boyd <swboyd@chromium.org>
      Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
      Cc: Chandan Uddaraju <chandanu@codeaurora.org>
      Cc: Vara Reddy <varar@codeaurora.org>
      Cc: Tanmay Shah <tanmay@codeaurora.org>
      Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
      Cc: Manu Gautam <mgautam@codeaurora.org>
      Cc: Sandeep Maheswaram <sanm@codeaurora.org>
      Cc: Douglas Anderson <dianders@chromium.org>
      Cc: Sean Paul <seanpaul@chromium.org>
      Cc: Jonathan Marek <jonathan@marek.ca>
      Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
      Cc: Rob Clark <robdclark@chromium.org>
      Link: https://lore.kernel.org/r/20200609034623.10844-1-tanmay@codeaurora.org
      Link: https://lore.kernel.org/r/20200916231202.3637932-9-swboyd@chromium.orgSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
      7612f4e2
    • Stephen Boyd's avatar
      phy: qcom-qmp: Add support for DP in USB3+DP combo phy · 52e013d0
      Stephen Boyd authored
      Add support for the USB3 + DisplayPort (DP) "combo" phy to the qmp phy
      driver. We already have support for the USB3 part of the combo phy, so
      most additions are for the DP phy.
      
      Split up the qcom_qmp_phy{enable,disable}() functions into the phy init,
      power on, power off, and exit functions that the common phy framework
      expects so that the DP phy can add even more phy ops like
      phy_calibrate() and phy_configure(). This allows us to initialize the DP
      PHY and configure the AUX channel before powering on the PHY at the link
      rate that was negotiated during link training.
      
      The general design is as follows:
      
        1) DP controller calls phy_init() to initialize the PHY and configure
        the dp_com register region.
      
        2) DP controller calls phy_configure() to tune the link rate and
        voltage swing and pre-emphasis settings.
      
        3) DP controller calls phy_power_on() to enable the PLL and power on
        the phy.
      
        4) DP controller calls phy_configure() again to tune the voltage swing
        and pre-emphasis settings determind during link training.
      
        5) DP controller calls phy_calibrate() some number of times to change
        the aux settings if the aux channel times out during link training.
      
        6) DP controller calls phy_power_off() if the link rate is to be
        changed and goes back to step 2 to try again at a different link rate.
      
        5) DP controller calls phy_power_off() and then phy_exit() to power
        down the PHY when it is done.
      
      The DP PHY contains a PLL that is different from the one used for the
      USB3 PHY. Instead of a pipe clk there is a link clk and a pixel clk
      output from the DP PLL after going through various dividers. Introduce
      clk ops for these two clks that just tell the child clks what the
      frequency of the pixel and link are. When the phy link rate is
      configured we call clk_set_rate() to update the child clks in the
      display clk controller on what rate is in use. The clk frequencies
      always differ based on the link rate (i.e. 1.6Gb/s 2.7Gb/s, 5.4Gb/s, or
      8.1Gb/s corresponding to various transmission modes like HBR1, HBR2 or
      HBR3) so we simply store the link rate and use that to calculate the clk
      frequencies.
      
      The PLL enable sequence is a little different from other QMP phy PLLs so
      we power on the PLL in qcom_qmp_phy_configure_dp_phy() that gets called
      from phy_power_on(). This should probably be split out better so that
      each phy has a way to run the final PLL/PHY enable sequence.
      
      This code is based on a submission of this phy and PLL in the drm
      subsystem.
      Signed-off-by: default avatarStephen Boyd <swboyd@chromium.org>
      Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
      Cc: Chandan Uddaraju <chandanu@codeaurora.org>
      Cc: Vara Reddy <varar@codeaurora.org>
      Cc: Tanmay Shah <tanmay@codeaurora.org>
      Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
      Cc: Manu Gautam <mgautam@codeaurora.org>
      Cc: Sandeep Maheswaram <sanm@codeaurora.org>
      Cc: Douglas Anderson <dianders@chromium.org>
      Cc: Sean Paul <seanpaul@chromium.org>
      Cc: Stephen Boyd <sboyd@kernel.org>
      Cc: Jonathan Marek <jonathan@marek.ca>
      Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
      Cc: Rob Clark <robdclark@chromium.org>
      Link: https://lore.kernel.org/r/20200609034623.10844-1-tanmay@codeaurora.org
      Link: https://lore.kernel.org/r/20200916231202.3637932-8-swboyd@chromium.orgSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
      52e013d0
    • Stephen Boyd's avatar
      phy: qcom-qmp: Use devm_platform_ioremap_resource() to simplify · f385b731
      Stephen Boyd authored
      We can use the wrapper API here to save some lines and remove the need
      for the 'base' and 'res' local variable.
      Suggested-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
      Signed-off-by: default avatarStephen Boyd <swboyd@chromium.org>
      Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
      Cc: Chandan Uddaraju <chandanu@codeaurora.org>
      Cc: Vara Reddy <varar@codeaurora.org>
      Cc: Tanmay Shah <tanmay@codeaurora.org>
      Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
      Cc: Manu Gautam <mgautam@codeaurora.org>
      Cc: Sandeep Maheswaram <sanm@codeaurora.org>
      Cc: Douglas Anderson <dianders@chromium.org>
      Cc: Sean Paul <seanpaul@chromium.org>
      Cc: Jonathan Marek <jonathan@marek.ca>
      Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
      Cc: Rob Clark <robdclark@chromium.org>
      Link: https://lore.kernel.org/r/20200916231202.3637932-7-swboyd@chromium.orgSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
      f385b731
    • Stephen Boyd's avatar
      phy: qcom-qmp: Get dp_com I/O resource by index · dab7b10d
      Stephen Boyd authored
      The dp_com resource is always at index 1 according to the dts files in
      the kernel. Get this resource by index so that we don't need to make
      future additions to the DT binding use 'reg-names'.
      Signed-off-by: default avatarStephen Boyd <swboyd@chromium.org>
      Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
      Cc: Chandan Uddaraju <chandanu@codeaurora.org>
      Cc: Vara Reddy <varar@codeaurora.org>
      Cc: Tanmay Shah <tanmay@codeaurora.org>
      Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
      Cc: Manu Gautam <mgautam@codeaurora.org>
      Cc: Sandeep Maheswaram <sanm@codeaurora.org>
      Cc: Douglas Anderson <dianders@chromium.org>
      Cc: Sean Paul <seanpaul@chromium.org>
      Cc: Jonathan Marek <jonathan@marek.ca>
      Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
      Cc: Rob Clark <robdclark@chromium.org>
      Link: https://lore.kernel.org/r/20200916231202.3637932-6-swboyd@chromium.orgSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
      dab7b10d
    • Stephen Boyd's avatar
      phy: qcom-qmp: Move 'serdes' and 'cfg' into 'struct qcom_phy' · aa968cb1
      Stephen Boyd authored
      The serdes I/O region is where the PLL for the phy is controlled.
      Sometimes the PLL is shared between multiple phys, for example in the
      PCIe case where there are three phys inside the same wrapper. Other
      times the PLL is for a single phy, i.e. some USB3 phys. To complete the
      trifecta we have the USB3+DP combo phy where the USB3 and DP phys each
      have their own serdes region because they have their own PLL while they
      both share a common I/O region pertaining to the USB type-c pinout and
      cable orientation.
      
      Let's move the serdes iomem pointer into 'struct qmp_phy' so that we can
      correlate PLL control to the phy that uses it. This allows us to support
      the USB3+DP combo phy in this driver. This isn't a problem for the
      3-lane/phy PCIe phy because there is a common init function that is the
      only place the serdes region is programmed.
      
      Furthermore, move the configuration data that contains most of the
      register programming sequences to the qmp phy struct. This data isn't
      qmp wrapper specific. It is phy specific data used to tune various
      settings for things like pre-emphasis, bias, etc.
      Signed-off-by: default avatarStephen Boyd <swboyd@chromium.org>
      Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
      Cc: Chandan Uddaraju <chandanu@codeaurora.org>
      Cc: Vara Reddy <varar@codeaurora.org>
      Cc: Tanmay Shah <tanmay@codeaurora.org>
      Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
      Cc: Manu Gautam <mgautam@codeaurora.org>
      Cc: Sandeep Maheswaram <sanm@codeaurora.org>
      Cc: Douglas Anderson <dianders@chromium.org>
      Cc: Sean Paul <seanpaul@chromium.org>
      Cc: Jonathan Marek <jonathan@marek.ca>
      Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
      Cc: Rob Clark <robdclark@chromium.org>
      Link: https://lore.kernel.org/r/20200916231202.3637932-5-swboyd@chromium.orgSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
      aa968cb1
    • Stephen Boyd's avatar
      phy: qcom-qmp: Remove 'initialized' in favor of 'init_count' · e4bc7de8
      Stephen Boyd authored
      We already track if any phy inside the qmp wrapper has been initialized
      by means of the struct qcom_qmp::init_count member. Let's drop the
      duplicate 'initialized' member to simplify the code a bit.
      Signed-off-by: default avatarStephen Boyd <swboyd@chromium.org>
      Reviewed-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
      Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
      Cc: Chandan Uddaraju <chandanu@codeaurora.org>
      Cc: Vara Reddy <varar@codeaurora.org>
      Cc: Tanmay Shah <tanmay@codeaurora.org>
      Cc: Manu Gautam <mgautam@codeaurora.org>
      Cc: Sandeep Maheswaram <sanm@codeaurora.org>
      Cc: Douglas Anderson <dianders@chromium.org>
      Cc: Sean Paul <seanpaul@chromium.org>
      Cc: Jonathan Marek <jonathan@marek.ca>
      Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
      Cc: Rob Clark <robdclark@chromium.org>
      Link: https://lore.kernel.org/r/20200916231202.3637932-4-swboyd@chromium.orgSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
      e4bc7de8
    • Stephen Boyd's avatar
      phy: qcom-qmp: Move phy mode into struct qmp_phy · dadcf995
      Stephen Boyd authored
      The phy mode pertains to the phy itself, i.e. 'struct qmp_phy', not the
      wrapper, i.e. 'struct qcom_qmp'. Move the phy mode into the phy
      structure to more accurately reflect what is going on. This also cleans
      up 'struct qcom_qmp' so that it can eventually be the place where qmp
      wrapper wide data is located, paving the way for the USB3+DP combo phy.
      Signed-off-by: default avatarStephen Boyd <swboyd@chromium.org>
      Reviewed-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
      Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
      Cc: Chandan Uddaraju <chandanu@codeaurora.org>
      Cc: Vara Reddy <varar@codeaurora.org>
      Cc: Tanmay Shah <tanmay@codeaurora.org>
      Cc: Manu Gautam <mgautam@codeaurora.org>
      Cc: Sandeep Maheswaram <sanm@codeaurora.org>
      Cc: Douglas Anderson <dianders@chromium.org>
      Cc: Sean Paul <seanpaul@chromium.org>
      Cc: Jonathan Marek <jonathan@marek.ca>
      Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
      Cc: Rob Clark <robdclark@chromium.org>
      Link: https://lore.kernel.org/r/20200916231202.3637932-3-swboyd@chromium.orgSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
      dadcf995
    • Stephen Boyd's avatar
      dt-bindings: phy: qcom,qmp-usb3-dp: Add DP phy information · 724fabf5
      Stephen Boyd authored
      This binding only describes the USB phy inside the USB3 + DP "combo"
      phy. Add information for the DP phy and describe the sub-nodes that
      represent the DP and USB3 phys that exist inside the combo wrapper.
      Remove reg-names from required properties because it isn't required nor
      used by the kernel driver.
      Signed-off-by: default avatarStephen Boyd <swboyd@chromium.org>
      Reviewed-by: default avatarRob Herring <robh@kernel.org>
      Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
      Cc: Chandan Uddaraju <chandanu@codeaurora.org>
      Cc: Vara Reddy <varar@codeaurora.org>
      Cc: Tanmay Shah <tanmay@codeaurora.org>
      Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
      Cc: Manu Gautam <mgautam@codeaurora.org>
      Cc: Sandeep Maheswaram <sanm@codeaurora.org>
      Cc: Douglas Anderson <dianders@chromium.org>
      Cc: Sean Paul <seanpaul@chromium.org>
      Cc: Jonathan Marek <jonathan@marek.ca>
      Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
      Cc: <devicetree@vger.kernel.org>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Rob Clark <robdclark@chromium.org>
      Link: https://lore.kernel.org/r/20200916231202.3637932-2-swboyd@chromium.orgSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
      724fabf5
  3. 23 Sep, 2020 2 commits
  4. 22 Sep, 2020 2 commits
  5. 18 Sep, 2020 20 commits
  6. 16 Sep, 2020 7 commits