- 11 Jun, 2013 2 commits
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Olof Johansson authored
Merge tag 'renesas-pinmux-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc From Simon Horman: Renesas ARM based SoC pinmux and GPIO update for v3.11 SH-PFC: * Entries for INTC external IRQs * Remove dependency on GPIOLIB * PFC support for r8a7790 SoC * Pinmux support for r8a7778 SoC * Increase pin group and function coverage for sh7372, r8a7740, r8a7778, r8a7779 and r8a7790 SoCs * Use pinctrl mapping on mackerel, ap4evb, armadillo800eva, bonito, bockw, lager boards * Use RCAR_GP_PIN macro in marzen board * Remove unused GPIOs for sh7372, sh73a0, r8a7740 and r8a7790 SoCs * Add bias (pull-up/down) pinconf support for r8a7740 SoC * Add VCCQ support for sh73a0 GPIO car: * Add RCAR_GP_PIN macro * Add support for IRQ_TYPE_EDGE_BOTH * Make the platform data gpio_base field signed The GPIO changes have been included as the RCAR_GP_PIN and IRQ_TYPE_EDGE_BOTH changes are depended on by SH-PFC changes. * tag 'renesas-pinmux-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (132 commits) ARM: shmobile: marzen: Use RCAR_GP_PIN macro ARM: shmobile: lager: Initialize pinmux ARM: shmobile: bockw: add pinctrl support ARM: shmobile: kzm9g: tidyup FSI pinctrl ARM: shmobile: r8a7740 pinmux platform device cleanup ARM: shmobile: r8a7790: Configure R-Car GPIO for IRQ_TYPE_EDGE_BOTH pinctrl: sh-pfc: r8a7779: Fix missing MOD_SEL2 entry Revert "ARM: shmobile: Disallow PINCTRL without GPIOLIB" pinctrl: r8a7790: add pinmux data for MMCIF and SDHI interfaces sh-pfc: r8a7778: add MMCIF pin groups sh-pfc: r8a7778: add HSPI pin groups sh-pfc: r8a7778: add I2C pin groups pinctrl: sh-pfc: fix a typo in pfc-r8a7790 pinctrl: sh-pfc: fix r8a7790 Function Select register tables sh-pfc: r8a7778: fixup IRQ1A settings sh-pfc: r8a7779: add Ether pin groups sh-pfc: r8a7778: add Ether pin groups sh-pfc: r8a7778: add VIN pin groups sh-pfc: sh73a0: Remove function GPIOs sh-pfc: r8a7790: Add TPU pin groups and functions ...
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git://git.infradead.org/users/jcooper/linuxOlof Johansson authored
From Jason Cooper: mvebu pcie driver (kirkwood) for v3.11 (round 2) - kirkwood - migrate Netgear ReadyNAS Duo v2 to pcie DT init * tag 'pcie_kw-3.11-2' of git://git.infradead.org/users/jcooper/linux: arm: kirkwood: NETGEAR ReadyNAS Duo v2 init PCIe via DT Signed-off-by:Olof Johansson <olof@lixom.net>
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- 08 Jun, 2013 1 commit
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git://git.xilinx.com/linux-xlnxOlof Johansson authored
From Michal Simek: arm: Xilinx Zynq clock changes for v3.11 Change Xilinx Zynq DT clock description which reflects logical abstraction of Zynq's clock tree. - Refactor PLL driver - Use new clock controller driver - Change timer and uart drivers * tag 'zynq-clk-for-3.11' of git://git.xilinx.com/linux-xlnx: clk: zynq: Remove deprecated clock code arm: zynq: Migrate platform to clock controller clk: zynq: Add clock controller driver clk: zynq: Factor out PLL driver Signed-off-by:
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- 05 Jun, 2013 37 commits
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Laurent Pinchart authored
Replace hardcoded pin numbers with the RCAR_GP_PIN macro to make the code match the documentation. Signed-off-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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Laurent Pinchart authored
Initialize r8a7790 pinmuxing and register mappings for the two debug serial ports. Signed-off-by:
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Kuninori Morimoto authored
SCIF0 support as 1st step Acked-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by:
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Kuninori Morimoto authored
sh73a0 needs "sh_fsi2", not "sh_fsi2.0" Tested-by:
Hiep Cao Minh <cm-hiep@jinso.co.jp> Acked-by:
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Magnus Damm authored
Use DEFINE_RES_MEM() and platform_device_register_simple() to save a couple of lines of code. Signed-off-by:
Magnus Damm <damm@opensource.se> Acked-by:
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Simon Horman authored
"gpio-rcar: Support IRQ_TYPE_EDGE_BOTH" adds support to the R-Car GPIO driver for IRQ_TYPE_EDGE_BOTH. As hardware support for this feature is not universal for all SoCs a flag, has_both_edge_trigger, has been added to the platform data of the driver to allow this feature to be enabled. As the r8a7790 SoC hardware supports this feature enable it. Signed-off-by: -
Phil Edworthy authored
The list of functions selected by the MOD_SEL2 register was missing an entry. This caused all entries after this to modify the MOD_SEL2 register incorrectly. This bug showed up when selecting i2c2_c pins on the Renesas Hurricane board. This bug has been present since pinmux support was added for the r8a7779 SoC by 881023d2 ("sh-pfc: Add r8a7779 pinmux support") in v3.8-rc4. Signed-off-by:
Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by:
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Laurent Pinchart authored
GPIOLIB dependency handling was added to the PINCTRL core by commit 2afe8229 Author: Haojian Zhuang <haojian.zhuang@linaro.org> Date: Thu Mar 28 07:34:19 2013 +0800 pinctrl: core: add dependence of GPIOLIB There is not need to handle that dependency at the SH Mobile level anymore. Revert commit 6722f6cb Author: Magnus Damm <damm@opensource.se> Date: Mon Mar 18 22:58:18 2013 +0900 ARM: shmobile: Disallow PINCTRL without GPIOLIB Modify mach-shmobile to only select PINCTRL in case of ARCH_WANT_OPTIONAL_GPIOLIB is set. This fixes a build error triggered when adding a new SoC lacking GPIO software support (ARCH_WANT_OPTIONAL_GPIOLIB=n): Signed-off-by:
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Guennadi Liakhovetski authored
This patch adds pinmux groups and functions for the two MMCIF and four SDHI interfaces on r8a73a4 (APE6). Signed-off-by:
Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by:
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Kuninori Morimoto authored
Add MMCIF CLK/CMD/DATA groups to R8A7778 PFC driver. Signed-off-by:
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Kuninori Morimoto authored
Add HSPI CLK/CS/RX/TX pin groups to R8A7778 PFC driver. Signed-off-by:
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Kuninori Morimoto authored
Add I2C SDA/SCL pin groups to R8A7778 PFC driver. Signed-off-by:
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Guennadi Liakhovetski authored
Fix multiple occurrences of the "RESEVED" typo. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Guennadi Liakhovetski authored
Fix several errors in Peripheral Function Select register tables for r8a7790, which prevent various function pins from being correctly configured. Signed-off-by:
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Kuninori Morimoto authored
IP2[31] func2 is IRQ1A, not IRQ3A Reported-by:
Yusuke Goda <yusuke.goda.sx@renesas.com> Signed-off-by:
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Sergei Shtylyov authored
Add Ether RMII/LINK/MAGIC pin groups to R8A7779 PFC driver. Signed-off-by:
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart<laurent.pinchart@ideasonboard.com> Acked-by:
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Sergei Shtylyov authored
Add Ether RMII/LINK/MAGIC pin groups to R8A7778 PFC driver. Signed-off-by:
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Vladimir Barinov authored
Add VIN DATA[0:8]/CLK/HSYNC/VSYNC pin groups to R8A7778 PFC driver. While at it, add SH_PFC_MUX8() macro for 8-bit data busses. Signed-off-by:
Vladimir Barinov <vladimir.barinov@cogentembedded.com> [Sergei: updated the copyrights, added SH_PFC_MUX8() macro for 8-bit data bus, made use of SH_PFC_*() macros to define the pin groups.] Signed-off-by:
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Laurent Pinchart authored
No sh73a0 platform use the function GPIOs API. Remove it. Signed-off-by:
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Laurent Pinchart authored
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Laurent Pinchart authored
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Laurent Pinchart authored
Signed-off-by:
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Sergei Shtylyov authored
Add USB0/1 PENC/USB_OVC pin groups to R8A7778 PFC driver. Signed-off-by:
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Laurent Pinchart authored
The VCCQ MC0 power gate is now controlled by a regulator registered by the PFC driver. Remove the corresponding function GPIO. Signed-off-by:
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Laurent Pinchart authored
The VCCQ MC0 power gate is now controlled by a regulator registered by the PFC driver. Remove the corresponding function GPIO. Signed-off-by:
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Laurent Pinchart authored
The sh73a0 has an internal power gate on the VCCQ power supply for the SDHI0 device that is controlled (for some strange reason) by a bit in a PFC register. This feature should be exposed as a regulator. As the same register is also used for pin control purposes there is no way to achieve atomic read/write sequences with a separate regulator driver. We thus need to implement the regulator here. Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by:
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Laurent Pinchart authored
Add two optional init and exit SoC operations and call them from the core at probe and remove time. Signed-off-by:
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Magnus Damm authored
Use DEFINE_RES_MEM() to save a couple of lines of code. Signed-off-by:
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Laurent Pinchart authored
Function GPIOs are not used anymore, and all code use the GPIO numbers directly. Remove the GPIOs enumeration. Signed-off-by:
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Laurent Pinchart authored
Move GPIOs handling from the PFC device to separate GPIO devices. Signed-off-by:
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Kuninori Morimoto authored
This patch was tested on Bock-W board Signed-off-by:
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Kuninori Morimoto authored
SDHI 1/2 are the target Signed-off-by:
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Laurent Pinchart authored
Function GPIOs have been removed, remove comments that refer to them. Signed-off-by:
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Laurent Pinchart authored
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Laurent Pinchart authored
Function GPIOs are not used anymore, and all code use the GPIO numbers directly. Remove the GPIOs enumeration. Signed-off-by:
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Laurent Pinchart authored
The PFC GPIO API implementation moved to using port numbers. Replace all GPIO_PORTx enum usage with the corresponding port number. The GPIO_PORTx enum values are identical to the port number on this platform. Signed-off-by:
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Laurent Pinchart authored
No r8a7740 platform use the function GPIOs API. Remove it. Signed-off-by:
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