- 30 Jan, 2021 4 commits
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Lucas Stach authored
This adds all the necessary nodes to get audio support on both the RMB3 and Zest boards. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Kuldeep Singh authored
LS1028A-RDB/QDS provides support for flexcan. Add the properties. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Kuldeep Singh authored
LS1028A supports two flexcan controllers similar to LX2160A. There's already a compatible entry defined i.e "fsl,lx2160ar1-flexcan" which can be further reused for LS1028A. Please note, "fsl,ls1028ar1-flexcan" compatible entry doesn't exists and can be safely removed. LS1028A has a single peripheral clock (i.e platform clock) source connected to both "ipg" and "per" and therefore, remove "sysclk" as clock source from device-tree. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Kuldeep Singh authored
LX2160A supports two flexcan controllers. Add the support. Enable support further for LX2160A-RDB/QDS. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 29 Jan, 2021 13 commits
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Pawel Dembicki authored
This patch adds spi-uart controller to LS1012A-FRDM board dts. Device is equipped in SC16IS740 from NXP. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Pawel Dembicki authored
LS1012A-RDB equipped in some i2c devices: - 3x GPIO Expander: PCAL9555A (NXP) - Gyro: FXAS21002 (NXP) - Accelerometer: FXOS8700 (NXP) - Current & Power Monitor: INA220 (TI) This patch add listed devices to dts. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Adam Ford authored
There is a QSPI chip connected to the FlexSPI bus. Enable it. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Adam Ford authored
The i.MX8M Nano has the same Flexspi controller used in the i.MX8M Mini. Add the node and disable it by default. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Martin Kepplinger authored
Add librem5-r4 with specifics to that revision like the near-level, battery and charger properties. For schematics and more information, see https://developer.puri.sm/Librem5/Hardware_Reference/Evergreen.htmlSigned-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Martin Kepplinger authored
Expect all those regulators to be turned on initially. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Martin Kepplinger authored
This enables the Librem5's ft8006p based LCD panel driven by the imx8mq's Northwest Logic DSI IP core and mxsfb display controller. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Guido Günther authored
It's a supply for to touch and LCD. Signed-off-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Guido Günther authored
The tps65982 feeds the bq25895 charge controller on the Librem 5. Signed-off-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Guido Günther authored
With the pmic driver fixed we can now shut off the regulator in the gpc. Signed-off-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Guido Günther authored
This is consistent with other IRQs and makes keeps currents low. Signed-off-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Russell King authored
Increase the SmartEEE Tw parameter for Atheros PHYs to stop gigabit links from sporadically dropping. Testing on this platform shows that a value of 24 results in a stable link, whereas 23 or below has the occasional drop. Tested with a Netgear GS116 unmanaged switch link partner with Cat 5e cabling. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Peng Fan authored
We are using Jailhouse Hypervsior which has virtual pci node that use dt domains. so also use dt domains for pci node, this will avoid conflict with Jailhouse Hypervisor to trigger the following error: pr_err("Inconsistent \"linux,pci-domain\" property in DT\n"); Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 18 Jan, 2021 11 commits
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Joakim Zhang authored
Add fsl,stop-mode property for FEC to enable stop mode. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Joakim Zhang authored
Add mac address in efuse, so that FEC driver can parse it from nvmem cell. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Joakim Zhang authored
Assign clock parents for FEC, set "ptp" clock to 100M, "enet_clk_ref" to 125M. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Joakim Zhang authored
CLK_ENET_TIMER assigned clocks twice, should be a typo, correct to CLK_ENET_PHY_REF clock. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Michael Walle authored
Now that we have a proper driver for the FlexSPI interface use it. This will fix SCK frequency switching on Layerscape SoCs. This was tested on the Kontron sl28 board. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
eCSPI ports have DMA capability. Describe the eCSPI DMA properties. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Michael Walle authored
With a newer bootloader SATA might be used in a mPCI slot using a mSATA card. Enable the SATA controller on the Kontron K-Box LS-230-A which comes with such a slot. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Russell King authored
The RTC interrupt is incorrect and prevents the RTC driver initialising. In any case, the PCF2127 driver wants an active low interrupt, which neither the GIC nor the GPIO blocks support. There is an ISPPT block in the LX2160A, but this is not supported in mainline kernels. So, just delete the interrupt. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Adam Ford authored
On the i.MX8MN Beacon SOM, there is an RTC chip which is fed power from the baseboard during power off. The SNVS RTC integrated into the SoC is not fed power. Depending on the order the modules are loaded, this can be a problem if the external RTC isn't rtc0. Make the alias for rtc0 point to the external RTC all the time and rtc1 point to the SVNS in order to correctly hold date/time over a power-cycle. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Adam Ford authored
The WiFi chip is capable of communication at SDR104 speeds. Enable 100Mhz and 200MHz pinmux to support this. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Russell King authored
Add support for the power button. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 15 Jan, 2021 4 commits
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Martin Kepplinger authored
Add interconnect ports for lcdif to set bus capabilities. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Martin Kepplinger authored
Add #interconnect-cells on main &noc so that it will probe the interconnect provider. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Acked-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Leonard Crestez authored
Add initial support for dynamic frequency scaling of the main NOC on imx8mq. Make DDRC the parent of the NOC (using passive governor) so that the main NOC is automatically scaled together with DDRC by default. Support for proactive scaling via interconnect will come on top. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Acked-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Michael Walle authored
There is a new variant 1 of this board available. It features up to four SerDes lanes for customer use. Add a new device tree which features just the basic peripherals. A customer will then have to modify or append to this device tree. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 11 Jan, 2021 8 commits
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Teresa Remmet authored
Add initial support for phyBOARD-Pollux-i.MX8MP. Supported basic features: * eMMC * i2c EEPROM * i2c RTC * i2c LED * PMIC * debug UART * SD card * 1Gbit Ethernet (fec) * watchdog Signed-off-by: Teresa Remmet <t.remmet@phytec.de> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
The Gateworks Venice GW71xx-0x/GW72xx-0x/GW73xx-0x are development kits consisting of a GW700x SoM and a Baseboard. Future SoM's such as the GW701x will create additional combinations. The GW700x SoM contains: - i.MX 8M Mini SoC - LPDDR4 DRAM - eMMC FLASH - Gateworks System Controller (eeprom/pushbutton/reset/voltage-monitor) - GbE PHY connected to the i.MX 8M Mini FEC - Power Management IC The GW71xx Baseboard contains: - 1x MiniPCIe Socket with USB2.0, PCIe, and SIM - 1x RJ45 GbE (i.MX 8M Mini FEC) - I/O connector with 1x-SPI/1x-I2C/1x-UART/4x-GPIO signals - PCIe Clock generator - GPS and accelerometer - 1x USB 2.0 Front Panel connector - wide range power supply The GW72xx Baseboard contains: - 2x MiniPCIe Socket with USB2.0, PCIe, and SIM - 2x RJ45 GbE (i.MX 8M Mini FEC and LAN743x) - 1x MicroSD connector - 1x USB 2.0 Front Panel connector - 1x SPI connector - 1x Serial connector supporting 2x-UART or 1x-UART configured as 1 of: RS232 w/ flow-control, RS485, RS422 - PCIe Clock generator - GPS and accelerometer - Media Expansion connector (MIPI-CSI/MIPI-DSI/GPIO/I2S) - I/O connector with 2x-ADC,2x-GPIO,1x-UART,1x-I2C - wide range power supply The GW73xx Baseboard contains: - 3x MiniPCIe Socket with USB2.0, PCIe, and SIM - 2x RJ45 GbE (i.MX 8M Mini FEC and LAN743x) - 1x MicroSD connector - 1x USB 2.0 Front Panel connector - 1x SPI connector - 1x Serial connector supporting 2x-UART or 1x-UART configured as 1 of: RS232 w/ flow-control, RS485, RS422 - WiFi/BT - PCIe Clock generator - GPS and accelerometer - Media Expansion connector (MIPI-CSI/MIPI-DSI/GPIO/I2S) - I/O connector with 2x-ADC,2x-GPIO,1x-UART,1x-I2C - wide range power supply Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Alice Guo authored
In order to be able to use NVMEM APIs to read soc unique ID, add the nvmem data cell and name for nvmem-cells to the "soc" node, and add a nvmem node which provides soc unique ID to efuse@30350000. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Alice Guo authored
Add compatible string to .dtsi files for binding of imx8_soc_info and device. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Michael Walle authored
Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Michael Walle authored
Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Michael Walle authored
Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Michael Walle authored
Now that we have constants, use them. This is just a mechanical change. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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