1. 23 Feb, 2021 11 commits
  2. 19 Feb, 2021 11 commits
  3. 14 Jan, 2021 18 commits
    • Chen Huang's avatar
      riscv/stacktrace: Fix stack output without ra on the stack top · f766f77a
      Chen Huang authored
      When a function doesn't have a callee, then it will not
      push ra into the stack, such as lkdtm_BUG() function,
      
      addi	sp,sp,-16
      sd	s0,8(sp)
      addi	s0,sp,16
      ebreak
      
      The struct stackframe use {fp,ra} to get information from
      stack, if walk_stackframe() with pr_regs, we will obtain
      wrong value and bad stacktrace,
      
      [<ffffffe00066c56c>] lkdtm_BUG+0x6/0x8
      ---[ end trace 18da3fbdf08e25d5 ]---
      
      Correct the next fp and pc, after that, full stacktrace
      shown as expects,
      
      [<ffffffe00066c56c>] lkdtm_BUG+0x6/0x8
      [<ffffffe0008b24a4>] lkdtm_do_action+0x14/0x1c
      [<ffffffe00066c372>] direct_entry+0xc0/0x10a
      [<ffffffe000439f86>] full_proxy_write+0x42/0x6a
      [<ffffffe000309626>] vfs_write+0x7e/0x214
      [<ffffffe00030992a>] ksys_write+0x98/0xc0
      [<ffffffe000309960>] sys_write+0xe/0x16
      [<ffffffe0002014bc>] ret_from_syscall+0x0/0x2
      ---[ end trace 61917f3d9a9fadcd ]---
      Signed-off-by: default avatarChen Huang <chenhuang5@huawei.com>
      Signed-off-by: default avatarKefeng Wang <wangkefeng.wang@huawei.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      f766f77a
    • Kefeng Wang's avatar
      riscv: Improve __show_regs · da401e89
      Kefeng Wang authored
      Show the function symbols of epc and ra to improve the
      readability of crash reports, and align the printing
      formats about the raw epc value.
      Signed-off-by: default avatarKefeng Wang <wangkefeng.wang@huawei.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      da401e89
    • Kefeng Wang's avatar
      riscv: Add dump stack in show_regs · 091b9450
      Kefeng Wang authored
      Like commit 1149aad1 ("arm64: Add dump_backtrace() in show_regs"),
      dump the stack in riscv show_regs as common code expects.
      Reviewed-by: default avatarAtish Patra <atish.patra@wdc.com>
      Signed-off-by: default avatarKefeng Wang <wangkefeng.wang@huawei.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      091b9450
    • Guo Ren's avatar
      riscv: Enable per-task stack canaries · fea2fed2
      Guo Ren authored
      This enables the use of per-task stack canary values if GCC has
      support for emitting the stack canary reference relative to the
      value of tp, which holds the task struct pointer in the riscv
      kernel.
      
      After compare arm64 and x86 implementations, seems arm64's is more
      flexible and readable. The key point is how gcc get the offset of
      stack_canary from gs/el0_sp.
      
      x86: Use a fix offset from gs, not flexible.
      
      struct fixed_percpu_data {
      	/*
      	 * GCC hardcodes the stack canary as %gs:40.  Since the
      	 * irq_stack is the object at %gs:0, we reserve the bottom
      	 * 48 bytes of the irq stack for the canary.
      	 */
      	char            gs_base[40]; // :(
      	unsigned long   stack_canary;
      };
      
      arm64: Use -mstack-protector-guard-offset & guard-reg
      	gcc options:
      	-mstack-protector-guard=sysreg
      	-mstack-protector-guard-reg=sp_el0
      	-mstack-protector-guard-offset=xxx
      
      riscv: Use -mstack-protector-guard-offset & guard-reg
      	gcc options:
      	-mstack-protector-guard=tls
      	-mstack-protector-guard-reg=tp
      	-mstack-protector-guard-offset=xxx
      
       GCC's implementation has been merged:
       commit c931e8d5a96463427040b0d11f9c4352ac22b2b0
       Author: Cooper Qu <cooper.qu@linux.alibaba.com>
       Date:   Mon Jul 13 16:15:08 2020 +0800
      
           RISC-V: Add support for TLS stack protector canary access
      
      In the end, these codes are inserted by gcc before return:
      
      *  0xffffffe00020b396 <+120>:   ld      a5,1008(tp) # 0x3f0
      *  0xffffffe00020b39a <+124>:   xor     a5,a5,a4
      *  0xffffffe00020b39c <+126>:   mv      a0,s5
      *  0xffffffe00020b39e <+128>:   bnez    a5,0xffffffe00020b61c <_do_fork+766>
         0xffffffe00020b3a2 <+132>:   ld      ra,136(sp)
         0xffffffe00020b3a4 <+134>:   ld      s0,128(sp)
         0xffffffe00020b3a6 <+136>:   ld      s1,120(sp)
         0xffffffe00020b3a8 <+138>:   ld      s2,112(sp)
         0xffffffe00020b3aa <+140>:   ld      s3,104(sp)
         0xffffffe00020b3ac <+142>:   ld      s4,96(sp)
         0xffffffe00020b3ae <+144>:   ld      s5,88(sp)
         0xffffffe00020b3b0 <+146>:   ld      s6,80(sp)
         0xffffffe00020b3b2 <+148>:   ld      s7,72(sp)
         0xffffffe00020b3b4 <+150>:   addi    sp,sp,144
         0xffffffe00020b3b6 <+152>:   ret
         ...
      *  0xffffffe00020b61c <+766>:   auipc   ra,0x7f8
      *  0xffffffe00020b620 <+770>:   jalr    -1764(ra) # 0xffffffe000a02f38 <__stack_chk_fail>
      Signed-off-by: default avatarGuo Ren <guoren@linux.alibaba.com>
      Signed-off-by: default avatarCooper Qu <cooper.qu@linux.alibaba.com>
      Reviewed-by: default avatarKees Cook <keescook@chromium.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      fea2fed2
    • Guo Ren's avatar
      riscv: Add support for function error injection · ee55ff80
      Guo Ren authored
      Inspired by the commit 42d038c4 ("arm64: Add support for function
      error injection"), this patch supports function error injection for
      riscv.
      
      This patch mainly support two functions: one is regs_set_return_value()
      which is used to overwrite the return value; the another function is
      override_function_with_return() which is to override the probed
      function returning and jump to its caller.
      
      Test log:
       cd /sys/kernel/debug/fail_function
       echo sys_clone > inject
       echo 100 > probability
       echo 1 > interval
       ls /
      [  313.176875] FAULT_INJECTION: forcing a failure.
      [  313.176875] name fail_function, interval 1, probability 100, space 0, times 1
      [  313.184357] CPU: 0 PID: 87 Comm: sh Not tainted 5.8.0-rc5-00007-g6a758cc #117
      [  313.187616] Call Trace:
      [  313.189100] [<ffffffe0002036b6>] walk_stackframe+0x0/0xc2
      [  313.191626] [<ffffffe00020395c>] show_stack+0x40/0x4c
      [  313.193927] [<ffffffe000556c60>] dump_stack+0x7c/0x96
      [  313.194795] [<ffffffe0005522e8>] should_fail+0x140/0x142
      [  313.195923] [<ffffffe000299ffc>] fei_kprobe_handler+0x2c/0x5a
      [  313.197687] [<ffffffe0009e2ec4>] kprobe_breakpoint_handler+0xb4/0x18a
      [  313.200054] [<ffffffe00020357e>] do_trap_break+0x36/0xca
      [  313.202147] [<ffffffe000201bca>] ret_from_exception+0x0/0xc
      [  313.204556] [<ffffffe000201bbc>] ret_from_syscall+0x0/0x2
      -sh: can't fork: Invalid argument
      Signed-off-by: default avatarGuo Ren <guoren@linux.alibaba.com>
      Reviewed-by: default avatarMasami Hiramatsu <mhiramat@kernel.org>
      Cc: Palmer Dabbelt <palmerdabbelt@google.com>
      Cc: Paul Walmsley <paul.walmsley@sifive.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      ee55ff80
    • Guo Ren's avatar
      riscv: Add uprobes supported · 74784081
      Guo Ren authored
      This patch adds support for uprobes on riscv architecture.
      
      Just like kprobe, it support single-step and simulate instructions.
      Signed-off-by: default avatarGuo Ren <guoren@linux.alibaba.com>
      Reviewed-by: default avatarPekka Enberg <penberg@kernel.org>
      Cc: Oleg Nesterov <oleg@redhat.com>
      Cc: Masami Hiramatsu <mhiramat@kernel.org>
      Cc: Palmer Dabbelt <palmerdabbelt@google.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      74784081
    • Guo Ren's avatar
      riscv: Add KPROBES_ON_FTRACE supported · 829adda5
      Guo Ren authored
      This patch adds support for kprobes on ftrace call sites to avoids
      much of the overhead with regular kprobes. Try it with simple
      steps:
      
       echo 'p:myprobe sys_clone a0=%a0 a1=%a1 stack_val=+4($stack)' > /sys/kernel/de
      bug/tracing/kprobe_events
       echo 1 > /sys/kernel/debug/tracing/events/kprobes/enable
       cat /sys/kernel/debug/tracing/trace
       tracer: nop
      
       entries-in-buffer/entries-written: 1/1   #P:1
      
                                      _-----=> irqs-off
                                     / _----=> need-resched
                                    | / _---=> hardirq/softirq
                                    || / _--=> preempt-depth
                                    ||| /     delay
                 TASK-PID     CPU#  ||||   TIMESTAMP  FUNCTION
                    | |         |   ||||      |         |
                    sh-92      [000] ....   369.899962: myprobe: (sys_clone+0x0/0x28) a0=0x1200011 a1=0x0 stack_val=0x201c20ffffffe0
       cat /sys/kernel/debug/kprobes/list
      ffffffe00020b584  k  sys_clone+0x0    [FTRACE]
                                             ^^^^^^
      Signed-off-by: default avatarGuo Ren <guoren@linux.alibaba.com>
      Reviewed-by: default avatarMasami Hiramatsu <mhiramat@kernel.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      829adda5
    • Guo Ren's avatar
      riscv: Add kprobes supported · c22b0bcb
      Guo Ren authored
      This patch enables "kprobe & kretprobe" to work with ftrace
      interface. It utilized software breakpoint as single-step
      mechanism.
      
      Some instructions which can't be single-step executed must be
      simulated in kernel execution slot, such as: branch, jal, auipc,
      la ...
      
      Some instructions should be rejected for probing and we use a
      blacklist to filter, such as: ecall, ebreak, ...
      
      We use ebreak & c.ebreak to replace origin instruction and the
      kprobe handler prepares an executable memory slot for out-of-line
      execution with a copy of the original instruction being probed.
      In execution slot we add ebreak behind original instruction to
      simulate a single-setp mechanism.
      
      The patch is based on packi's work [1] and csky's work [2].
       - The kprobes_trampoline.S is all from packi's patch
       - The single-step mechanism is new designed for riscv without hw
         single-step trap
       - The simulation codes are from csky
       - Frankly, all codes refer to other archs' implementation
      
       [1] https://lore.kernel.org/linux-riscv/20181113195804.22825-1-me@packi.ch/
       [2] https://lore.kernel.org/linux-csky/20200403044150.20562-9-guoren@kernel.org/Signed-off-by: default avatarGuo Ren <guoren@linux.alibaba.com>
      Co-developed-by: default avatarPatrick Stählin <me@packi.ch>
      Signed-off-by: default avatarPatrick Stählin <me@packi.ch>
      Acked-by: default avatarMasami Hiramatsu <mhiramat@kernel.org>
      Tested-by: default avatarZong Li <zong.li@sifive.com>
      Reviewed-by: default avatarPekka Enberg <penberg@kernel.org>
      Cc: Patrick Stählin <me@packi.ch>
      Cc: Palmer Dabbelt <palmerdabbelt@google.com>
      Cc: Björn Töpel <bjorn.topel@gmail.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      c22b0bcb
    • Guo Ren's avatar
      riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT · afc76b8b
      Guo Ren authored
      This patch changes the current detour mechanism of dynamic ftrace
      which has been discussed during LPC 2020 RISCV-MC [1].
      
      Before the patch, we used mcount for detour:
      <funca>:
      	addi sp,sp,-16
      	sd   ra,8(sp)
      	sd   s0,0(sp)
      	addi s0,sp,16
      	mv   a5,ra
      	mv   a0,a5
      	auipc ra,0x0 -> nop
      	jalr  -296(ra) <_mcount@plt> ->nop
      	...
      
      After the patch, we use nop call site area for detour:
      <funca>:
      	nop -> REG_S ra, -SZREG(sp)
      	nop -> auipc ra, 0x?
      	nop -> jalr ?(ra)
      	nop -> REG_L ra, -SZREG(sp)
      	...
      
      The mcount mechanism is mixed with gcc function prologue which is
      not very clear. The patchable function entry just put 16 bytes nop
      before the front of the function prologue which could be filled
      with a separated detour mechanism.
      
      [1] https://www.linuxplumbersconf.org/event/7/contributions/807/Signed-off-by: default avatarGuo Ren <guoren@linux.alibaba.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      afc76b8b
    • Guo Ren's avatar
      riscv: Fixup patch_text panic in ftrace · 5ad84adf
      Guo Ren authored
      Just like arm64, we can't trace the function in the patch_text path.
      
      Here is the bug log:
      
      [   45.234334] Unable to handle kernel paging request at virtual address ffffffd38ae80900
      [   45.242313] Oops [#1]
      [   45.244600] Modules linked in:
      [   45.247678] CPU: 0 PID: 11 Comm: migration/0 Not tainted 5.9.0-00025-g9b7db83-dirty #215
      [   45.255797] epc: ffffffe00021689a ra : ffffffe00021718e sp : ffffffe01afabb58
      [   45.262955]  gp : ffffffe00136afa0 tp : ffffffe01af94d00 t0 : 0000000000000002
      [   45.270200]  t1 : 0000000000000000 t2 : 0000000000000001 s0 : ffffffe01afabc08
      [   45.277443]  s1 : ffffffe0013718a8 a0 : 0000000000000000 a1 : ffffffe01afabba8
      [   45.284686]  a2 : 0000000000000000 a3 : 0000000000000000 a4 : c4c16ad38ae80900
      [   45.291929]  a5 : 0000000000000000 a6 : 0000000000000000 a7 : 0000000052464e43
      [   45.299173]  s2 : 0000000000000001 s3 : ffffffe000206a60 s4 : ffffffe000206a60
      [   45.306415]  s5 : 00000000000009ec s6 : ffffffe0013718a8 s7 : c4c16ad38ae80900
      [   45.313658]  s8 : 0000000000000004 s9 : 0000000000000001 s10: 0000000000000001
      [   45.320902]  s11: 0000000000000003 t3 : 0000000000000001 t4 : ffffffffd192fe79
      [   45.328144]  t5 : ffffffffb8f80000 t6 : 0000000000040000
      [   45.333472] status: 0000000200000100 badaddr: ffffffd38ae80900 cause: 000000000000000f
      [   45.341514] ---[ end trace d95102172248fdcf ]---
      [   45.346176] note: migration/0[11] exited with preempt_count 1
      
      (gdb) x /2i $pc
      => 0xffffffe00021689a <__do_proc_dointvec+196>: sd      zero,0(s7)
         0xffffffe00021689e <__do_proc_dointvec+200>: li      s11,0
      
      (gdb) bt
      0  __do_proc_dointvec (tbl_data=0x0, table=0xffffffe01afabba8,
      write=0, buffer=0x0, lenp=0x7bf897061f9a0800, ppos=0x4, conv=0x0,
      data=0x52464e43) at kernel/sysctl.c:581
      1  0xffffffe00021718e in do_proc_dointvec (data=<optimized out>,
      conv=<optimized out>, ppos=<optimized out>, lenp=<optimized out>,
      buffer=<optimized out>, write=<optimized out>, table=<optimized out>)
      at kernel/sysctl.c:964
      2  proc_dointvec_minmax (ppos=<optimized out>, lenp=<optimized out>,
      buffer=<optimized out>, write=<optimized out>, table=<optimized out>)
      at kernel/sysctl.c:964
      3  proc_do_static_key (table=<optimized out>, write=1, buffer=0x0,
      lenp=0x0, ppos=0x7bf897061f9a0800) at kernel/sysctl.c:1643
      4  0xffffffe000206792 in ftrace_make_call (rec=<optimized out>,
      addr=<optimized out>) at arch/riscv/kernel/ftrace.c:109
      5  0xffffffe0002c9c04 in __ftrace_replace_code
      (rec=0xffffffe01ae40c30, enable=3) at kernel/trace/ftrace.c:2503
      6  0xffffffe0002ca0b2 in ftrace_replace_code (mod_flags=<optimized
      out>) at kernel/trace/ftrace.c:2530
      7  0xffffffe0002ca26a in ftrace_modify_all_code (command=5) at
      kernel/trace/ftrace.c:2677
      8  0xffffffe0002ca30e in __ftrace_modify_code (data=<optimized out>)
      at kernel/trace/ftrace.c:2703
      9  0xffffffe0002c13b0 in multi_cpu_stop (data=0x0) at kernel/stop_machine.c:224
      10 0xffffffe0002c0fde in cpu_stopper_thread (cpu=<optimized out>) at
      kernel/stop_machine.c:491
      11 0xffffffe0002343de in smpboot_thread_fn (data=0x0) at kernel/smpboot.c:165
      12 0xffffffe00022f8b4 in kthread (_create=0xffffffe01af0c040) at
      kernel/kthread.c:292
      13 0xffffffe000201fac in handle_exception () at arch/riscv/kernel/entry.S:236
      
         0xffffffe00020678a <+114>:   auipc   ra,0xffffe
         0xffffffe00020678e <+118>:   jalr    -118(ra) # 0xffffffe000204714 <patch_text_nosync>
         0xffffffe000206792 <+122>:   snez    a0,a0
      
      (gdb) disassemble patch_text_nosync
      Dump of assembler code for function patch_text_nosync:
         0xffffffe000204714 <+0>:     addi    sp,sp,-32
         0xffffffe000204716 <+2>:     sd      s0,16(sp)
         0xffffffe000204718 <+4>:     sd      ra,24(sp)
         0xffffffe00020471a <+6>:     addi    s0,sp,32
         0xffffffe00020471c <+8>:     auipc   ra,0x0
         0xffffffe000204720 <+12>:    jalr    -384(ra) # 0xffffffe00020459c <patch_insn_write>
         0xffffffe000204724 <+16>:    beqz    a0,0xffffffe00020472e <patch_text_nosync+26>
         0xffffffe000204726 <+18>:    ld      ra,24(sp)
         0xffffffe000204728 <+20>:    ld      s0,16(sp)
         0xffffffe00020472a <+22>:    addi    sp,sp,32
         0xffffffe00020472c <+24>:    ret
         0xffffffe00020472e <+26>:    sd      a0,-24(s0)
         0xffffffe000204732 <+30>:    auipc   ra,0x4
         0xffffffe000204736 <+34>:    jalr    -1464(ra) # 0xffffffe00020817a <flush_icache_all>
         0xffffffe00020473a <+38>:    ld      a0,-24(s0)
         0xffffffe00020473e <+42>:    ld      ra,24(sp)
         0xffffffe000204740 <+44>:    ld      s0,16(sp)
         0xffffffe000204742 <+46>:    addi    sp,sp,32
         0xffffffe000204744 <+48>:    ret
      
      (gdb) disassemble flush_icache_all-4
      Dump of assembler code for function flush_icache_all:
         0xffffffe00020817a <+0>:     addi    sp,sp,-8
         0xffffffe00020817c <+2>:     sd      ra,0(sp)
         0xffffffe00020817e <+4>:     auipc   ra,0xfffff
         0xffffffe000208182 <+8>:     jalr    -1822(ra) # 0xffffffe000206a60 <ftrace_caller>
         0xffffffe000208186 <+12>:    ld      ra,0(sp)
         0xffffffe000208188 <+14>:    addi    sp,sp,8
         0xffffffe00020818a <+0>:     addi    sp,sp,-16
         0xffffffe00020818c <+2>:     sd      s0,0(sp)
         0xffffffe00020818e <+4>:     sd      ra,8(sp)
         0xffffffe000208190 <+6>:     addi    s0,sp,16
         0xffffffe000208192 <+8>:     li      a0,0
         0xffffffe000208194 <+10>:    auipc   ra,0xfffff
         0xffffffe000208198 <+14>:    jalr    -410(ra) # 0xffffffe000206ffa <sbi_remote_fence_i>
         0xffffffe00020819c <+18>:    ld      s0,0(sp)
         0xffffffe00020819e <+20>:    ld      ra,8(sp)
         0xffffffe0002081a0 <+22>:    addi    sp,sp,16
         0xffffffe0002081a2 <+24>:    ret
      
      (gdb) frame 5
      (rec=0xffffffe01ae40c30, enable=3) at kernel/trace/ftrace.c:2503
      2503                    return ftrace_make_call(rec, ftrace_addr);
      (gdb) p /x rec->ip
      $2 = 0xffffffe00020817a -> flush_icache_all !
      
      When we modified flush_icache_all's patchable-entry with ftrace_caller:
       - Insert ftrace_caller at flush_icache_all prologue.
       - Call flush_icache_all to sync I/Dcache, but flush_icache_all is
      just we modified by half.
      
      Link: https://lore.kernel.org/linux-riscv/CAJF2gTT=oDWesWe0JVWvTpGi60-gpbNhYLdFWN_5EbyeqoEDdw@mail.gmail.com/T/#tSigned-off-by: default avatarGuo Ren <guoren@linux.alibaba.com>
      Reviewed-by: default avatarAtish Patra <atish.patra@wdc.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      5ad84adf
    • Guo Ren's avatar
      riscv: Fixup wrong ftrace remove cflag · 67d94577
      Guo Ren authored
      We must use $(CC_FLAGS_FTRACE) instead of directly using -pg. It
      will cause -fpatchable-function-entry error.
      Signed-off-by: default avatarGuo Ren <guoren@linux.alibaba.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      67d94577
    • Guo Ren's avatar
      riscv: Fixup compile error BUILD_BUG_ON failed · edfcf91f
      Guo Ren authored
      Unfortunately, the current code couldn't be compiled:
      
        CC      arch/riscv/kernel/patch.o
      In file included from ./include/linux/kernel.h:11,
                       from ./include/linux/list.h:9,
                       from ./include/linux/preempt.h:11,
                       from ./include/linux/spinlock.h:51,
                       from arch/riscv/kernel/patch.c:6:
      In function ‘fix_to_virt’,
          inlined from ‘patch_map’ at arch/riscv/kernel/patch.c:37:17:
      ./include/linux/compiler.h:392:38: error: call to ‘__compiletime_assert_205’ declared with attribute error: BUILD_BUG_ON failed: idx >= __end_of_fixed_addresses
        _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
                                            ^
      ./include/linux/compiler.h:373:4: note: in definition of macro ‘__compiletime_assert’
          prefix ## suffix();    \
          ^~~~~~
      ./include/linux/compiler.h:392:2: note: in expansion of macro ‘_compiletime_assert’
        _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
        ^~~~~~~~~~~~~~~~~~~
      ./include/linux/build_bug.h:39:37: note: in expansion of macro ‘compiletime_assert’
       #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
                                           ^~~~~~~~~~~~~~~~~~
      ./include/linux/build_bug.h:50:2: note: in expansion of macro ‘BUILD_BUG_ON_MSG’
        BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition)
        ^~~~~~~~~~~~~~~~
      ./include/asm-generic/fixmap.h:32:2: note: in expansion of macro ‘BUILD_BUG_ON’
        BUILD_BUG_ON(idx >= __end_of_fixed_addresses);
        ^~~~~~~~~~~~
      
      Because fix_to_virt(, idx) needs a const value, not a dynamic variable of
      reg-a0 or BUILD_BUG_ON failed with "idx >= __end_of_fixed_addresses".
      Signed-off-by: default avatarGuo Ren <guoren@linux.alibaba.com>
      Reviewed-by: default avatarMasami Hiramatsu <mhiramat@kernel.org>
      Reviewed-by: default avatarPekka Enberg <penberg@kernel.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      edfcf91f
    • Patrick Stählin's avatar
      RISC-V: Implement ptrace regs and stack API · dcdc7a53
      Patrick Stählin authored
      Needed for kprobes support. Copied and adapted from arm64 code.
      
      Guo Ren fixup pt_regs type for linux-5.8-rc1.
      Signed-off-by: default avatarPatrick Stählin <me@packi.ch>
      Signed-off-by: default avatarGuo Ren <guoren@linux.alibaba.com>
      Reviewed-by: default avatarPekka Enberg <penberg@kernel.org>
      Reviewed-by: default avatarZong Li <zong.li@sifive.com>
      Reviewed-by: default avatarMasami Hiramatsu <mhiramat@kernel.org>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      dcdc7a53
    • Kefeng Wang's avatar
      riscv: Add machine name to kernel boot log and stack dump output · 46ad48e8
      Kefeng Wang authored
      Add the machine name to kernel boot-up log, and install
      the machine name to stack dump for DT boot mode.
      Signed-off-by: default avatarKefeng Wang <wangkefeng.wang@huawei.com>
      Reviewed-by: default avatarAtish Patra <atish.patra@wdc.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      46ad48e8
    • Atish Patra's avatar
      riscv: Add numa support for riscv64 platform · 4f0e8eef
      Atish Patra authored
      Use the generic numa implementation to add NUMA support for RISC-V.
      This is based on Greentime's patch[1] but modified to use generic NUMA
      implementation and few more fixes.
      
      [1] https://lkml.org/lkml/2020/1/10/233Co-developed-by: default avatarGreentime Hu <greentime.hu@sifive.com>
      Signed-off-by: default avatarGreentime Hu <greentime.hu@sifive.com>
      Signed-off-by: default avatarAtish Patra <atish.patra@wdc.com>
      Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
      Reviewed-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      4f0e8eef
    • Greentime Hu's avatar
      riscv: Add support pte_protnone and pmd_protnone if CONFIG_NUMA_BALANCING · 3e5b0bdb
      Greentime Hu authored
      These two functions are used to distinguish between PROT_NONENUMA
      protections and hinting fault protections.
      Signed-off-by: default avatarGreentime Hu <greentime.hu@sifive.com>
      Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
      Reviewed-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      3e5b0bdb
    • Atish Patra's avatar
      riscv: Separate memory init from paging init · cbd34f4b
      Atish Patra authored
      Currently, we perform some memory init functions in paging init. But,
      that will be an issue for NUMA support where DT needs to be flattened
      before numa initialization and memblock_present can only be called
      after numa initialization.
      
      Move memory initialization related functions to a separate function.
      Signed-off-by: default avatarAtish Patra <atish.patra@wdc.com>
      Reviewed-by: default avatarGreentime Hu <greentime.hu@sifive.com>
      Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
      Reviewed-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      cbd34f4b
    • Atish Patra's avatar
      numa: Move numa implementation to common code · ae3c107c
      Atish Patra authored
      ARM64 numa implementation is generic enough that RISC-V can reuse that
      implementation with very minor cosmetic changes. This will help both
      ARM64 and RISC-V in terms of maintanace and feature improvement
      
      Move the numa implementation code to common directory so that both ISAs
      can reuse this. This doesn't introduce any function changes for ARM64.
      Signed-off-by: default avatarAtish Patra <atish.patra@wdc.com>
      Acked-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
      Tested-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
      Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
      ae3c107c