- 17 Feb, 2023 11 commits
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Nick Hawkins authored
Document compatibility string to support I2C controller in GXP. Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Christophe JAILLET authored
wait_for_completion_timeout() never returns negative value. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Raviteja Narayanam authored
From 'clock-frequency' device tree property, configure I2C SCL frequency by calculating the timing register values according to input clock. After soft reset in reinit function, the timing registers are set to default values (configured in design tool). So, setting SCL frequency is done inside reinit function after the soft reset. This allows configuration of SCL frequency exclusively through software via device tree property, overriding the design. If the clock-frequency parameter is not specified in DT, driver doesn't configure frequency, making it backward compatible. Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Raviteja Narayanam authored
Xilinx AXI I2C IP is updated with a bug fix for dynamic mode reads. Older IPs are handled with a workaround in which they are using xiic standard mode for all these effected use cases. Add the new IP version to compatible. Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Raviteja Narayanam authored
Add xilinx I2C new version 'xlnx,axi-iic-2.1' string to compatible. Add clock-frequency as optional property. Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Heiner Kallweit authored
Avoid code duplication by calling i801_check_post() from i801_access(). Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Heiner Kallweit authored
This avoids code duplication, in a next step we'll call i801_check_post() from i801_transaction() as well. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Heiner Kallweit authored
Similar to what was done for non-block commands, centralize block command register settings in i801_block_transaction(). Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Heiner Kallweit authored
Currently configuring command register settings is distributed over multiple functions. At first centralize this for non-block commands in i801_simple_transaction(). Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Heiner Kallweit authored
Currently we touch SMBAUXCTL even if not needed. That's the case for block commands that don't use block buffer mode, either because block buffer mode isn't available or because it's not supported for the respective command (e.g. I2C block transfer). Improve this by setting/resetting SMBAUXCTL_E32B in i801_block_transaction_by_block() only. Small downside is that we now access SMBAUXCTL twice for transactions that use PEC and block buffer mode. But this should a rather rare case and the impact is negligible. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Heiner Kallweit authored
Factor out non-block pre/post processing to a new function i801_simple_transaction(), complementing existing function i801_block_transaction(). This makes i801_access() better readable. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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- 15 Feb, 2023 2 commits
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Randy Dunlap authored
Correct spelling problems for Documentation/i2c/ as reported by codespell. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Alain Volmat authored
Convert i2c-st.txt into st,sti-i2c.yaml for the i2c-st driver. Signed-off-by: Alain Volmat <avolmat@me.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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- 12 Feb, 2023 6 commits
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Heiner Kallweit authored
Factor out setting SMBHSTADD to a helper. The current code makes the assumption that constant I2C_SMBUS_READ has bit 0 set, that's not ideal. Therefore let the new helper explicitly check for I2C_SMBUS_READ. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Heiner Kallweit authored
According to the datasheet the block process call requires block buffer mode. The user may disable block buffer mode by module parameter disable_features, in such a case we have to clear FEATURE_BLOCK_PROC. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Heiner Kallweit authored
Host notification uses an interrupt, therefore it makes sense only if interrupts are enabled. Make this dependency explicit by removing FEATURE_HOST_NOTIFY if FEATURE_IRQ isn't set. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Heiner Kallweit authored
Not sure if it can happen, but better play safe: If SMBHSTSTS_BYTE_DONE and an error flag is set, then don't trust the result and skip calling i801_isr_byte_done(). In addition clear status bit SMBHSTSTS_BYTE_DONE in the main interrupt handler, this allows to simplify the code a little. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Alain Volmat authored
Rely on pm_sleep_ptr when setting the pm ops and get rid of the ifdef CONFIG_PM_SLEEP around suspend/resume functions. Signed-off-by: Alain Volmat <avolmat@me.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Kunihiko Hayashi authored
UniPhier I2C controller allows reset control support. Add resets property to the controller as optional. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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- 03 Feb, 2023 7 commits
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Binbin Zhou authored
Add myself as maintainer of the Loongson LS2X I2C driver. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Raviteja Narayanam authored
'DYNAMIC_MODE_READ_BROKEN_BIT' quirk added in the driver, effected IP versions no longer enter dynamic mode. So, remove local_irq_save/local_irq_restore APIs from driver. Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Raviteja Narayanam authored
smbus_block_read is added to xiic driver to read from few sensors which support this command. Since the number of bytes to read is not known prior to transfer, xiic standard mode is being used for low level control of IP. Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Raviteja Narayanam authored
If the tx_half_empty interrupt comes first instead of tx_empty, STOP bit is generated even before all the bytes are transmitted out on the bus. STOP bit should be sent only after all the bytes in the FIFO are transmitted out of the FIFO. So wait until FIFO is empty before sending the STOP bit. Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Raviteja Narayanam authored
Xilinx I2C IP has two modes of operation, both of which implement I2C transactions. The only difference from sw perspective is the programming sequence for these modes. Dynamic mode -> Simple to program, less number of steps in sequence. Standard mode -> Gives flexibility, more number of steps in sequence. In dynamic mode, during the i2c-read transactions, if there is a delay(> 200us) between the register writes (address & byte count), read transaction fails. On a system with load, this scenario is occurring frequently. To avoid this, switch to standard mode if there is a read request. Added a quirk to identify the IP version effected by this and follow the standard mode. Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Raviteja Narayanam authored
repeated start When a combined message request comes from user space, the controller has to initiate repeated start sequence. In standard mode, this repeated start sequence is corrupted if there is still data in the Tx FIFO. So, always make sure that all the bytes are completely transmitted out of the FIFO by waiting for TXEMPTY, if the previous message is of Tx type. Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Raviteja Narayanam authored
read transfers Added standard mode for AXI I2C controller to enable read transfers of size more than 255 bytes. The driver selects standard mode in the following scenarios. 1. If a single message request comes from user space, requesting a read of more than 255 bytes 2. If a message set request comes from user space consisting of many messages and if any one of them is a read operation, irrespective of the size of transfer. (This is done because it is observed that repeated start operation is not happening in dynamic mode read as expected in a message set request from user space.) Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com> Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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- 02 Feb, 2023 2 commits
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Binbin Zhou authored
This I2C module is integrated into the Loongson-2K SoCs and Loongson LS7A bridge chip. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Binbin Zhou authored
Add Loongson LS2X I2C controller binding with DT schema format using json-schema. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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- 28 Jan, 2023 2 commits
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Shyam Sundar S K authored
regmap_read() API signature expects the caller to send "unsigned int" type to return back the read value, but there are some occurrences of 'u32' across i2c-designware-* files. Change them to match the regmap_read() signature. Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Shyam Sundar S K authored
On some AMD platforms, based on the new designware datasheet, BIOS sets the BIT(11) within the IC_CON register to advertise the "bus clear feature capability". AMD/Designware datasheet says: Bit(11) BUS_CLEAR_FEATURE_CTRL. Read-write,Volatile. Reset: 0. Description: In Master mode: - 1'b1: Bus Clear Feature is enabled. - 1'b0: Bus Clear Feature is Disabled. In Slave mode, this register bit is not applicable. On AMD platform designs: 1. BIOS programs the BUS_CLEAR_FEATURE_CTRL and enables the detection of SCL/SDA stuck low. 2. Whenever the stuck low is detected, the SMU FW shall do the bus recovery procedure. Currently, the way in which the "master_cfg" is built in the driver, it overrides the BUS_CLEAR_FEATURE_CTRL advertised by BIOS and the SMU FW cannot initiate the bus recovery if the stuck low is detected. Hence add a check in i2c_dw_probe_master() that if the BIOS advertises the bus clear feature, let driver not ignore it and adapt accordingly. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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- 23 Jan, 2023 4 commits
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Heiner Kallweit authored
There are slave devices that understand I2C but have read-only SDA and SCL. Examples are FD650 7-segment LED controller and its derivatives. Typical board designs don't even have a pull-up for both pins. Handle the new attributes for write-only SDA and missing pull-up on SDA/SCL. For either pin the open-drain and has-no-pullup properties are mutually-exclusive, what is documented in the DT property documentation. We don't add an extra warning here because the open-drain properties are marked deprecated anyway. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> [wsa: switched to device properties] Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Heiner Kallweit authored
This is in preparation of supporting write-only SDA in i2c-gpio. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Heiner Kallweit authored
There are slave devices that understand I2C but have read-only SDA and SCL. Examples are FD650 7-segment LED controller and its derivatives. Typical board designs don't even have a pull-up for both pins. Therefore add properties for not using open-drain. For write-only SCL we have a property already, add one for write-only SDA. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Luca Weiss authored
Document the compatible for the CCI block found on SM6350 SoC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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- 20 Jan, 2023 6 commits
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ye xingchen authored
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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ye xingchen authored
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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ye xingchen authored
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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ye xingchen authored
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Binbin Zhou authored
Add support for the ACPI-based device registration, so that the driver can be also enabled through ACPI table. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Reviewed-by: Andy Shevchenko <andy@kernel.org> Tested-by: Peibao Liu <liupeibao@loongson.cn> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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Lars-Peter Clausen authored
In the mrecv() function the Cadence I2C driver has the following expression in an if clause. ((id->p_msg->flags & I2C_M_RECV_LEN) != I2C_M_RECV_LEN) && (id->recv_count <= CDNS_I2C_FIFO_DEPTH)) Earlier in the same function when I2C_M_RECV_LEN is set the recv_count is initialized to a value that is larger than CDNS_I2C_FIFO_DEPTH. This means if the first expression is false the second expression is also false. Checking the first expression is thus redundant and can be removed. This slightly simplifies the logic. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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