- 02 Nov, 2022 1 commit
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Colin Ian King authored
Don't populate the const array ls1028a_soc_attr on the stack, instead make it static. Also makes the object code smaller. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Acked-by: Han Xu <han.xu@nxp.com> Link: https://lore.kernel.org/r/20221102152904.143423-1-colin.i.king@gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 01 Nov, 2022 3 commits
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Yang Yingliang authored
For using modern names host/target to instead of all the legacy names, I think it takes 3 steps: - step1: introduce new helpers with modern naming. - step2: switch to use these new helpers in all drivers. - step3: remove all legacy helpers and update all legacy names. This patch is for step1, it introduces new helpers with host/target naming for drivers using. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20221011092204.950288-1-yangyingliang@huawei.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Jonathan Neuschäfer authored
struct spi_master has been renamed to struct spi_controller. Update the reference in spi.rst to make it clickable again. Fixes: 8caab75f ("spi: Generalize SPI "master" to "controller"") Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20221101173252.1069294-1-j.neuschaefer@gmx.netSigned-off-by: Mark Brown <broonie@kernel.org>
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Jonathan Neuschäfer authored
The node name for flash memories has been standardized to "flash@...". Fix the example in nuvoton,npcm-fiu.txt accordingly. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20221031222559.199509-1-j.neuschaefer@gmx.netSigned-off-by: Mark Brown <broonie@kernel.org>
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- 31 Oct, 2022 2 commits
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Yang Yingliang authored
Use the devm_platform_ioremap_resource_byname() helper instead of calling platform_get_resource_byname() and devm_ioremap_resource() separately. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20221029071720.3041094-1-yangyingliang@huawei.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Yang Yingliang authored
Use the devm_platform_ioremap_resource_byname() helper instead of calling platform_get_resource_byname() and devm_ioremap_resource() separately. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20221029071529.3019626-1-yangyingliang@huawei.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 26 Oct, 2022 1 commit
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Thomas Gleixner authored
Now that the 32bit UP oddity is gone and 32bit uses always a sequence count, there is no need for the fetch_irq() variants anymore. Convert to the regular interface. Cc: Mark Brown <broonie@kernel.org> Cc: linux-spi@vger.kernel.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/20221026122951.331638-1-bigeasy@linutronix.deSigned-off-by: Mark Brown <broonie@kernel.org>
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- 24 Oct, 2022 6 commits
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Mark Brown authored
Merge series from Andy Shevchenko <andriy.shevchenko@linux.intel.com>: Currently the SPI PXA2xx devices on Intel platforms can be instantiated via the following paths: 1) as ACPI LPSS device on Haswell, Bay Trail and Cherry Trail; 2) as ACPI LPSS device on the Sky Lake and newer; 3) as PCI LPSS device on Haswell, Bay Trail and Cherry Trail; 4) as PCI LPSS device on the Sky Lake and newer; 5) as PCI device via ID table. Each of these cases provides some platform related data differently, i.e.: 1) via drivers/acpi/acpi_lpss.c and drivers/spi/spi-pxa2xx.c 2) via drivers/mfd/intel-lpss-acpi.c 3) via drivers/spi/spi-pxa2xx-pci.c 4) via drivers/mfd/intel-lpss-pci.c and drivers/spi/spi-pxa2xx.c 5) via drivers/spi/spi-pxa2xx-pci.c This approach has two downsides: a) there is no data propagated in the case #2 because we can't have two or more drivers to match the same ACPI ID and hence some cases are still not supported (Sky Lake and newer ACPI enabled LPSS); b) the data is duplicated over two drivers in the cases #1 & #4 and, besides to be a bloatware, it is error prone (e.g. Lakefield has a wrong data right now due to missed PCI entry in the spi-pxa2xx.c). This series fixes the downsides, and enables previously unsupported cases.
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Andy Shevchenko authored
There is no code that uses ID tables directly, except the struct device_driver at the end of the file. Hence, move tables closer to its user. It's always possible to access them via pointer to a platform device. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20221021190018.63646-5-andriy.shevchenko@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Andy Shevchenko authored
Since the PCI enumerated devices provide a property with SSP type, there is no more necessity to bear the copy of the ID table here. Remove it for good. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20221021190018.63646-4-andriy.shevchenko@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Andy Shevchenko authored
Allow to set the Intel SSP type by reading the property. Only apply this to the known MFD enumerated LPSS devices. The check is done by the looking for the specifically named IO memory resource provided by upper layer. This won't be an issue in the future because we strictly prioritize the order in which we are looking for the SSP type in the code. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20221021190018.63646-3-andriy.shevchenko@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Andy Shevchenko authored
Currently we blindly apply the SSP type value from any source of the information. Increase robustness by validating the value before use. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20221021190018.63646-2-andriy.shevchenko@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Yang Yingliang authored
Use the devm_platform_{get_and_}ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20221019092635.1176622-1-yangyingliang@huawei.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 21 Oct, 2022 8 commits
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Mark Brown authored
Merge series from Amjad Ouled-Ameur <aouledameur@baylibre.com>: Between SPI transactions, all SPI pins are in HiZ state. When using the SS signal from the SPICC controller it's not an issue because when the transaction resumes all pins come back to the right state at the same time as SS. The problem is when we use CS as a GPIO. In fact, between the GPIO CS state change and SPI pins state change from idle, you can have a missing or spurious clock transition. Set a bias on the clock depending on the clock polarity requested before CS goes active, by passing a special "idle-low" and "idle-high" pinctrl state and setting the right state at a start of a message.
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Mark Brown authored
Merge series from Andy Shevchenko <andriy.shevchenko@linux.intel.com>: This series has a couple of cleanups for the pxa2xx driver.
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Amjad Ouled-Ameur authored
Between SPI transactions, all SPI pins are in HiZ state. When using the SS signal from the SPICC controller it's not an issue because when the transaction resumes all pins come back to the right state at the same time as SS. The problem is when we use CS as a GPIO. In fact, between the GPIO CS state change and SPI pins state change from idle, you can have a missing or spurious clock transition. Set a bias on the clock depending on the clock polarity requested before CS goes active, by passing a special "idle-low" and "idle-high" pinctrl state and setting the right state at a start of a message Reported-by: Da Xue <da@libre.computer> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com> Link: https://lore.kernel.org/r/20221004-up-aml-fix-spi-v4-2-0342d8e10c49@baylibre.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Amjad Ouled-Ameur authored
SPI pins of the SPICC Controller in Meson-GX needs to be controlled by pin biais when idle. Therefore define three pinctrl names: - default: SPI pins are controlled by spi function. - idle-high: SCLK pin is pulled-up, but MOSI/MISO are still controlled by spi function. - idle-low: SCLK pin is pulled-down, but MOSI/MISO are still controlled by spi function. Reported-by: Da Xue <da@libre.computer> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221004-up-aml-fix-spi-v4-1-0342d8e10c49@baylibre.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Marc Kleine-Budde authored
In commit 7a908832 ("spi: imx: add fallback feature") the last user of the struct spi_imx_devtype_data::disable_dma callback was removed. However the disable_dma member of struct spi_imx_devtype_data and the callback itself was not removed. Remove struct spi_imx_devtype_data::disable_dma and mx51_disable_dma() as they are unused. Cc: Robin Gong <yibin.gong@nxp.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://lore.kernel.org/r/20221021131051.1777984-1-mkl@pengutronix.deSigned-off-by: Mark Brown <broonie@kernel.org>
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Andy Shevchenko authored
Cleaning up the driver to use pm_ptr() macro instead of ifdeffery that makes it simpler and allows the compiler to remove those functions if built without CONFIG_PM and CONFIG_PM_SLEEP support. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20221020194500.10225-6-andriy.shevchenko@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Andy Shevchenko authored
We have a temporary variable to keep a pointer to a struct device in the pxa2xx_spi_init_pdata(). Use it consistently there. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20221020194500.10225-5-andriy.shevchenko@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Andy Shevchenko authored
The proposed spi_get_device_match_data() helper is for retrieving a driver data associated with the ID in an ID table. First, it tries to get driver data of the device enumerated by firmware interface (usually Device Tree or ACPI). If none is found it falls back to the SPI ID table matching. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20221020195421.10482-1-andriy.shevchenko@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 19 Oct, 2022 10 commits
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Mark Brown authored
Merge series from Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>: A bunch of improvements to the driver: - Fix kernel-doc warnings in GQSPI driver. - Avoid setting CPOL, CPHA & baud rate multiple times. - Add Versal platform support in GQSPI driver. - Add tap delay support in GQSPI driver.
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Yang Yingliang authored
Use the devm_platform_get_and_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20221019093318.1183190-1-yangyingliang@huawei.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Amit Kumar Mahapatra authored
Add tap delay support for GQSPI controller on Versal platform. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> Link: https://lore.kernel.org/r/20221011062040.12116-8-amit.kumar-mahapatra@amd.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Amit Kumar Mahapatra authored
Add new compatible to support QSPI controller on Xilinx Versal SoCs. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20221011062040.12116-7-amit.kumar-mahapatra@amd.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Naga Sureshkumar Relli authored
GQSPI controller uses the internal clock for loopback mode. The loopback mode is used with the high-speed Quad SPI timing mode, where the memory interface clock needs to be greater than 40 MHz. Based on the tap delay value programmed, the internal clock is delayed and used for capturing the data. Based upon the frequency of operation set the recommended tap delay values in GQSPI driver. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> Link: https://lore.kernel.org/r/20221011062040.12116-6-amit.kumar-mahapatra@amd.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Rajan Vaja authored
Add support for QSPI ioctl functions and enums. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> Link: https://lore.kernel.org/r/20221011062040.12116-5-amit.kumar-mahapatra@amd.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Amit Kumar Mahapatra authored
During every transfer the GQSPI driver configures the baud rate value. But when there is no change in the SPI clock frequency the driver should avoid rewriting the same baud rate value to the configuration register. Update GQSPI driver to rewrite the baud rate value if there is any change in SPI clock frequency. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> Link: https://lore.kernel.org/r/20221011062040.12116-4-amit.kumar-mahapatra@amd.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Amit Kumar Mahapatra authored
During every transfer GQSPI driver writes the CPOL & CPHA values to the configuration register. But the CPOL & CPHA values do not change in between multiple transfers, so moved the CPOL & CPHA initialization to hardware init so that the values are written only once. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> Link: https://lore.kernel.org/r/20221011062040.12116-3-amit.kumar-mahapatra@amd.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Amit Kumar Mahapatra authored
Document zynqmp_qspi ctrl and op_lock member description. It also adds return documentation for 'zynqmp_qspi_setuprxdma' and zynqmp_qspi_read_op. Fixes below kernel-doc warnings- spi-zynqmp-gqspi.c:178: warning: Function parameter or member 'ctlr' not described in 'zynqmp_qspi' spi-zynqmp-gqspi.c:178: warning: Function parameter or member 'op_lock' not described in 'zynqmp_qspi' spi-zynqmp-gqspi.c:737: warning: No description found for return value of 'zynqmp_qspi_setuprxdma' spi-zynqmp-gqspi.c:822: warning: No description found for return value of 'zynqmp_qspi_read_op' Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> Link: https://lore.kernel.org/r/20221011062040.12116-2-amit.kumar-mahapatra@amd.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Giulio Benetti authored
Not all zero page implementations use empty_zero_page global pointer so let's substitute empty_zero_page occurence with helper ZERO_PAGE(0). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Link: https://lore.kernel.org/r/20221018215755.33566-2-giulio.benetti@benettiengineering.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 18 Oct, 2022 2 commits
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Uwe Kleine-König authored
The function bcm_qspi_remove() returns zero unconditionally. Make it return void. This is a preparation for making platform remove callbacks return void. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20221017200143.1426528-1-u.kleine-koenig@pengutronix.deSigned-off-by: Mark Brown <broonie@kernel.org>
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Andy Shevchenko authored
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. No functional changes. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20221017171243.57078-1-andriy.shevchenko@linux.intel.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 17 Oct, 2022 5 commits
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Yang Yingliang authored
Use the devm_platform_{get_and}_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20220928145852.1882221-2-yangyingliang@huawei.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Yang Yingliang authored
Use the devm_platform_get_and_ioremap_resource() helper instead of calling platform_get_resource() and devm_ioremap_resource() separately. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20220928145852.1882221-1-yangyingliang@huawei.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Tharun Kumar P authored
Microchip pci1xxxx is a PCIe switch with a multi-function endpoint on one of its downstream ports. SPI is one of the functions in the multi-function endpoint. This function has 2 SPI masters, operates at a maximum frequency of 30 MHz and supports 7 client devices per master. This patch adds complete functionality to the SPI function except for suspend and resume. Signed-off-by: Tharun Kumar P <tharunkumar.pasumarthi@microchip.com> Link: https://lore.kernel.org/r/20221006050514.115564-2-tharunkumar.pasumarthi@microchip.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Jiapeng Chong authored
The function mchp_corespi_enable() is defined in the spi-microchip-core.c file, but not called elsewhere, so delete this unused function. drivers/spi/spi-microchip-core.c:122:20: warning: unused function 'mchp_corespi_enable'. Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2418Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20221017092141.9789-1-jiapeng.chong@linux.alibaba.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Mark Brown authored
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- 16 Oct, 2022 2 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/crng/randomLinus Torvalds authored
Pull more random number generator updates from Jason Donenfeld: "This time with some large scale treewide cleanups. The intent of this pull is to clean up the way callers fetch random integers. The current rules for doing this right are: - If you want a secure or an insecure random u64, use get_random_u64() - If you want a secure or an insecure random u32, use get_random_u32() The old function prandom_u32() has been deprecated for a while now and is just a wrapper around get_random_u32(). Same for get_random_int(). - If you want a secure or an insecure random u16, use get_random_u16() - If you want a secure or an insecure random u8, use get_random_u8() - If you want secure or insecure random bytes, use get_random_bytes(). The old function prandom_bytes() has been deprecated for a while now and has long been a wrapper around get_random_bytes() - If you want a non-uniform random u32, u16, or u8 bounded by a certain open interval maximum, use prandom_u32_max() I say "non-uniform", because it doesn't do any rejection sampling or divisions. Hence, it stays within the prandom_*() namespace, not the get_random_*() namespace. I'm currently investigating a "uniform" function for 6.2. We'll see what comes of that. By applying these rules uniformly, we get several benefits: - By using prandom_u32_max() with an upper-bound that the compiler can prove at compile-time is ≤65536 or ≤256, internally get_random_u16() or get_random_u8() is used, which wastes fewer batched random bytes, and hence has higher throughput. - By using prandom_u32_max() instead of %, when the upper-bound is not a constant, division is still avoided, because prandom_u32_max() uses a faster multiplication-based trick instead. - By using get_random_u16() or get_random_u8() in cases where the return value is intended to indeed be a u16 or a u8, we waste fewer batched random bytes, and hence have higher throughput. This series was originally done by hand while I was on an airplane without Internet. Later, Kees and I worked on retroactively figuring out what could be done with Coccinelle and what had to be done manually, and then we split things up based on that. So while this touches a lot of files, the actual amount of code that's hand fiddled is comfortably small" * tag 'random-6.1-rc1-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/crng/random: prandom: remove unused functions treewide: use get_random_bytes() when possible treewide: use get_random_u32() when possible treewide: use get_random_{u8,u16}() when possible, part 2 treewide: use get_random_{u8,u16}() when possible, part 1 treewide: use prandom_u32_max() when possible, part 2 treewide: use prandom_u32_max() when possible, part 1
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