- 29 Sep, 2017 6 commits
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Dave Airlie authored
This reduces the pwrvirus table size by 30k, by moving the sequences of writes to the data register into blocks. Signed-off-by:
Dave Airlie <airlied@redhat.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Dave Airlie authored
This removes the init path as well, since the init path just did some constant init of some structs. Reviewed-by:
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Dave Airlie authored
These don't seem to change at runtime, and the initialisers are constant data. This could be improved by not selecting the apu/non-apu path on each pcie read/write access. Signed-off-by:
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Dave Airlie authored
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Dave Airlie authored
This avoids fragile hardcoding of array size. Signed-off-by:
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Dave Airlie authored
This isn't safe if we have multiple GPUs plugged in, since there is only one copy of this struct in the bss, just allocate on stack, it's 40/108 bytes which should be safe. Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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- 28 Sep, 2017 28 commits
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Horace Chen authored
Add ATOM_VRAM_BLOCK_SRIOV_MSG_SHARE_RESERVATION to identify whether driver need to reserve VRAM for SR-IOV shared memory. Signed-off-by:
Horace Chen <horace.chen@amd.com> Reviewed-by:
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Rex Zhu authored
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Rex Zhu <Rex.Zhu@amd.com> Signed-off-by:
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Rex Zhu authored
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Rex Zhu authored
Use pr_debug to prevent spamming unimportant dmesg. Reviewed-by:
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Rex Zhu authored
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Rex Zhu authored
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Rex Zhu authored
amdgpu not care powerplay or dpm is enabled. just check ip functions and pp functions Reviewed-by:
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Rex Zhu authored
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Rex Zhu authored
cgs device not free. Reviewed-by:
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Rex Zhu authored
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Rex Zhu authored
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Felix Kuehling authored
When many wavefronts cause VM faults at the same time, it can overwhelm the interrupt handler and cause IH ring overflows before the driver can notify or kill the faulting application. As a workaround I'm introducing limited per-VM fault credit. After that number of VM faults have occurred, further VM faults are filtered out at the prescreen stage of processing. This depends on the PASID in the interrupt packet, so it currently only works for KFD contexts. Signed-off-by:
Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by:
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Felix Kuehling authored
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Colin Ian King authored
Trivial fix to spelling mistakes in pr_err error message and ASSERT messages. Signed-off-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
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Dave Airlie authored
I've no idea why this is like this, why store 64-bit fields as a string, and then parse the strings, this is just over engineered. Reduce the size of the amdgpu.o by 80k. text data bss dec hex filename 1331332 17982 1008 1350322 149ab2 amdgpu.o 1244668 17982 1008 1263658 13482a amdgpu.o Acked-by:
Harry Wentland <harry.wentland@amd.com> Acked-by:
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Dave Airlie authored
This fixes the 0-day build warning. Reviewed-by:
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Dave Airlie authored
This is what I'd call slightly overengineered, we waste 40k on storing a value that is write or end, when we could just use the register value to denote end. Remove the virus command parameter, and save text data bss dec hex filename 1412724 17982 1008 1431714 15d8a2 ../drm-next-build/drivers/gpu/drm/amd/amdgpu/amdgpu.o 1331332 17982 1008 1350322 149ab2 ../drm-next-build/drivers/gpu/drm/amd/amdgpu/amdgpu.o Reviewed-by:
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Dave Airlie authored
There is no reason that this gets passed back into the function from outside the file, just reference the table directly. Reviewed-by:
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Dave Airlie authored
This isn't used outside this file. Reviewed-by:
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Dave Airlie authored
This split serves no purpose, and we can make a bunch of functions static now. There are lots of cases of this sort of split in the powerplay code, please start cleaning them up. Ideally the function table is in the same file as all the implementations used in it. Reviewed-by:
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Dave Airlie authored
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Dave Airlie authored
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Dave Airlie authored
This moves this from being global data to global rodata, I'm sure it would be easy to move it to being local data. Reviewed-by:
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Dave Airlie authored
If we bump this up a level, we can ask about it, for now, just default to what amdgpu does. Reviewed-by:
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Andres Rodriguez authored
This patch provides a guarantee that the first n queues allocated by an application will be on different pipes. Where n is the number of pipes available from the hardware. This helps avoid ring aliasing which can result in work executing in time-sliced mode instead of truly parallel mode. Reviewed-by:
Andres Rodriguez <andresx7@gmail.com> Signed-off-by:
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Andres Rodriguez authored
Useful for testing the effects of multipipe compute without recompiling. Acked-by:
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Andres Rodriguez authored
A performance regression for OpenCL tests on Polaris11 had this feature disabled for all asics. Instead, disable it selectively on the affected asics. Acked-by:
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Alex Deucher authored
The error handling for virtual functions assumed a single vf per VM and didn't properly account for bare metal. Make the error arrays per device and add locking. Reviewed-by:
Gavin Wan <gavin.wan@amd.com> Signed-off-by:
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- 26 Sep, 2017 6 commits
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Alex Deucher authored
It was not clear. The rest of the driver is MIT/X11. Reviewed-by:
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Samuel Li authored
v2: drop hdp invalidate/flush. v3: honor pgoff during prime mmap. Add a barrier after cpu access. v4: drop begin/end_cpu_access() for now, revisit later. Signed-off-by:
Samuel Li <Samuel.Li@amd.com> Reviewed-by:
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Rex Zhu authored
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Rex Zhu authored
repeated defining in hwmgr.h Reviewed-by:
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Rex Zhu authored
repeated defining in hwmgr.h use PHM_WAIT_INDIRECT_FIELD instand. Reviewed-by:
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Rex Zhu authored
repeated defining in hwmgr.h Reviewed-by:
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