- 16 Feb, 2023 8 commits
-
-
Jani Nikula authored
The sanitization should be limited to PCH split platforms up to display version 8. Warn and bail out otherwise. Signed-off-by:
Jani Nikula <jani.nikula@intel.com> Reviewed-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230215141910.433043-2-jani.nikula@intel.com
-
Jani Nikula authored
Move sanitize_watermarks() to i9xx_wm.[ch] and rename as ilk_wm_sanitize(). The slightly unfortunate downside is having to expose intel_atomic_check() from intel_display.c, but this declutters intel_display.c nicely. v2: - Move to i9xx_wm.[ch] instead of intel_wm.[ch] (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
-
Stanislav Lisovskiy authored
There was a specific SW workaround requested, which should prevent some watermark issues happening, which requires copying highest enabled wm level to those disabled wm levels(bit 31 is of course still needs to be cleared). This is related to different subsystems like PSR and others, which may still consult a low power wm values ocassionally, despite those are disabled. For that reason we need to keep sane values in correspondent registers, even when those are disabled. HSDES: 22016115093 v2: Remove redundant WA for ICL and extend this WA for all platforms starting from SKL, as it seems that we needed this anyway on all of those(Ville Syrjälä) Signed-off-by:Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Reviewed-by:
-
Chaitanya Kumar Borah authored
A new step of 480MHz has been added on SKUs that have a RPL-U device id to support 120Hz displays more efficiently. Use a new quirk to identify the machine for which this change needs to be applied. v2: (Matt) - Add missing clock steps - Correct reference clock typo v3: - Revert to RPL-U subplatform (Jani) v4: - Remove Bspec reference from code (Jani) Bspec: 55409 Signed-off-by:Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Reviewed-by:
-
Chaitanya Kumar Borah authored
Separate out RPLU device ids and add them to both RPL and newly created RPL-U subplatforms. v2: (Matt) - Sort PCI-IDs numerically - Name the sub-platform to accurately depict what it is for - Make RPL-U part of RPL subplatform v3: revert to RPL-U subplatform (Jani) v4: (Jani) - Add RPL-U ids to RPL-P platform - Remove redundant comment Signed-off-by: -
Ville Syrjälä authored
We defined the bitmasks for DVSTILEOFF but never used them. Remedy that. Signed-off-by:
-
Ville Syrjälä authored
Hiding a function call with side effects inside the variable declaration block is a bit rude. Make it stand out more. Signed-off-by:
-
Ville Syrjälä authored
It's confusing to debug backlight issues when one can't easily even tell what kind of backlight control was selected. Sprinkle uniform debug messages to all the backlight setup functions. Also the one that was already there (ext_pwm) was using drm_info() for some reason. I don't think that's warranted so switch it to drm_dbg_kms() as well. v2: Deal with AUX backlights too (Jani) Move the VLV/CHV initial pipe debug there too (Jani) Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by:
-
- 15 Feb, 2023 8 commits
-
-
Jani Nikula authored
Get rid of the if ladder in intel_modeset_setup_hw_state() and hide a number of functions by adding a .get_hw_state() hook to watermark functions. At least for now, combine the platform specific sanitization to the hw state readouts on the relevant platforms instead of adding a separate hook for that. There's a functional change on PCH split platforms: If i9xx_wm_init() fails to read plane latency and chooses the nop functions, ilk_wm_get_hw_state() won't get called for readout. Add the ilk_init_lp_watermarks() call on that path which now won't be called in .get_hw_state(), as it looks like the only thing that could make a difference. v2: - Add missing static (kernel test robot) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
-
Jani Nikula authored
Move the wrappers to call watermark hooks into intel_wm.[ch]. This declutters intel_display.c nicely. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
-
Jani Nikula authored
Add new files intel_wm.[ch] and i9xx_wm.[ch] under display/ to hold generic and pre-SKL watermark code, respectively. SKL+ watermark code has already been split out to skl_watermark.[ch]. Use the _wm.[ch] naming for brevity; we may want to rename skl_watermark.[ch] later accordingly. Add new intel_wm_init() to call either skl_wm_init() or i9xx_wm_init(i915) depending on the platform, the latter comprising of the remains of intel_init_pm(). Sprinkle in some minor checkpatch fixes while moving the code. v2: - Rebase - Fix copyright year Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
-
Jani Nikula authored
The memory frequency detection is a bit spread out here and there. Consolidate to intel_dram.c. v2: - Remove inaccurate comment (Ville) - Call detect_mem_freq() unconditionally (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
-
Imre Deak authored
Detecting in intel_device_info_runtime_init() that the display is fused off or not present should only zero intel_runtime_info::pipe_mask, while the other related masks will be accordingly zeroed later in the function. Remove the redundant zeroing of the related fields on GEN7/8. Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by:
Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230208114300.3123934-5-imre.deak@intel.com
-
Imre Deak authored
DG1/DG2 and MTL+ has added a new display-present HW flag. Check this flag and if cleared, disable the driver's display functionality. So far the missing check resulted in running the display initialization sequence, and the WARNs below, due to the display register accesses timing out: [ 3.902843] ------------[ cut here ]------------ [ 3.902848] i915 0000:03:00.0: drm_WARN_ON(intel_de_wait_for_set(dev_priv, ((const i915_reg_t){ .reg = (0x42000) }), (1 << (27 - (pg))), 1)) [ 3.902879] WARNING: CPU: 6 PID: 462 at drivers/gpu/drm/i915/display/intel_display_power_well.c:326 gen9_wait_for_power_well_fuses+0x71/0x80 [i915] [ 3.903009] Modules linked in: hid_sensor_hub intel_ishtp_hid i915(+) rtsx_pci_sdmmc drm_buddy mmc_core drm_display_helper crct10dif_pclmul nvme cec crc32_pclmul intel_ish_ipc crc32c_intel ucsi_acpi hid_multitouch nvme_core ghash_clmulni_intel typec_ucsi rtsx_pci ttm sha512_ssse3 serio_raw intel_ishtp typec video i2c_hid_acpi i2c_hid wmi pinctrl_tigerlake ip6_tables ip_tables x_tables fuse [ 3.903021] CPU: 6 PID: 462 Comm: systemd-udevd Tainted: G U 6.2.0-rc6+ #50 [ 3.903023] Hardware name: LENOVO 82VB/LNVNB161216, BIOS KMCN09WW 04/26/2022 [ 3.903023] RIP: 0010:gen9_wait_for_power_well_fuses+0x71/0x80 [i915] [ 3.903105] Code: 48 8b 5f 50 48 85 db 75 03 48 8b 1f e8 98 bb 0d e9 48 c7 c1 00 65 a1 c0 48 89 da 48 c7 c7 4b c5 a3 c0 48 89 c6 e8 e3 df 53 e9 <0f> 0b 5b c3 cc cc cc cc 0f 1f 80 00 00 00 00 90 90 90 90 90 90 90 [ 3.903106] RSP: 0018:ffffa7cec0b07a98 EFLAGS: 00010292 [ 3.903107] RAX: 0000000000000080 RBX: ffff9a05430eaaa0 RCX: 0000000000000000 [ 3.903108] RDX: 0000000000000001 RSI: ffffffffaa7ab69e RDI: 00000000ffffffff [ 3.903108] RBP: ffff9a0552ba2020 R08: ffffffffab062ce0 R09: 00000000abd3ffc2 [ 3.903109] R10: ffffffffffffffff R11: 0000000000000081 R12: 0000000000000000 [ 3.903109] R13: ffff9a05532a9cb0 R14: ffffffffc09e1670 R15: ffff9a0543132000 [ 3.903110] FS: 00007f24d0fe5b40(0000) GS:ffff9a0ccf780000(0000) knlGS:0000000000000000 [ 3.903110] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 3.903111] CR2: 00005643d7a31a28 CR3: 0000000111614002 CR4: 0000000000770ee0 [ 3.903112] PKRU: 55555554 [ 3.903112] Call Trace: [ 3.903113] <TASK> [ 3.903114] hsw_power_well_enable+0x12f/0x1a0 [i915] [ 3.903191] intel_power_well_enable+0x21/0x70 [i915] [ 3.903265] icl_display_core_init+0x92/0x6a0 [i915] [ 3.903346] intel_power_domains_init_hw+0x1da/0x5b0 [i915] [ 3.903422] intel_modeset_init_noirq+0x60/0x250 [i915] [ 3.903497] i915_driver_probe+0x562/0xe10 [i915] [ 3.903557] ? i915_pci_probe+0x87/0x180 [i915] [ 3.903617] local_pci_probe+0x3e/0x80 [ 3.903621] pci_device_probe+0xb3/0x210 [ 3.903622] really_probe+0xdb/0x380 [ 3.903624] ? pm_runtime_barrier+0x50/0x90 [ 3.903626] __driver_probe_device+0x78/0x170 [ 3.903627] driver_probe_device+0x1f/0x90 [ 3.903628] __driver_attach+0xce/0x1c0 [ 3.903629] ? __pfx___driver_attach+0x10/0x10 [ 3.903630] bus_for_each_dev+0x5f/0x90 [ 3.903631] bus_add_driver+0x1ae/0x200 [ 3.903632] driver_register+0x89/0xe0 [ 3.903634] i915_init+0x1f/0x7f [i915] [ 3.903695] ? __pfx_init_module+0x10/0x10 [i915] [ 3.903751] do_one_initcall+0x43/0x220 [ 3.903753] ? kmalloc_trace+0x26/0x90 [ 3.903756] do_init_module+0x4a/0x200 [ 3.903758] __do_sys_init_module+0x157/0x180 [ 3.903760] do_syscall_64+0x58/0xc0 [ 3.903762] ? do_syscall_64+0x67/0xc0 [ 3.903762] ? exc_page_fault+0x70/0x170 [ 3.903764] entry_SYSCALL_64_after_hwframe+0x72/0xdc Bspec: 49189, 53112 v2: (Jani) - Change "Display fused off" dmesg info to "Display not present". - Zero only runtime->pipe_mask, other fields being zeroed based on this later. - Detect display presence already before the fused-off checks and only for HAS_DISPLAY(). v3: Fix "preset" vs "present" typo. Reported-and-tested-by:iczero <iczero@hellomouse.net> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8015 Cc: iczero <iczero@hellomouse.net> Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by:
-
Imre Deak authored
Determining whether the display engine is present on a platform happens only in intel_device_info_runtime_init(). Initializing the display power functionality depends on this condition, so move intel_power_domains_init() later after the runtime init function has been called. The next patch fixing platforms without display, depends on this patch. Acked-by:
-
Imre Deak authored
If fbdev is not initialized for some reason - in practice on platforms without display - suspending fbdev should be skipped during system suspend, fix this up. While at it add an assert that suspending fbdev only happens with the display present. This fixes the following: [ 91.227923] PM: suspend entry (s2idle) [ 91.254598] Filesystems sync: 0.025 seconds [ 91.270518] Freezing user space processes [ 91.272266] Freezing user space processes completed (elapsed 0.001 seconds) [ 91.272686] OOM killer disabled. [ 91.272872] Freezing remaining freezable tasks [ 91.274295] Freezing remaining freezable tasks completed (elapsed 0.001 seconds) [ 91.659622] BUG: kernel NULL pointer dereference, address: 00000000000001c8 [ 91.659981] #PF: supervisor write access in kernel mode [ 91.660252] #PF: error_code(0x0002) - not-present page [ 91.660511] PGD 0 P4D 0 [ 91.660647] Oops: 0002 [#1] PREEMPT SMP NOPTI [ 91.660875] CPU: 4 PID: 917 Comm: bash Not tainted 6.2.0-rc7+ #54 [ 91.661185] Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS edk2-20221117gitfff6d81270b5-9.fc37 unknown [ 91.661680] RIP: 0010:mutex_lock+0x19/0x30 [ 91.661914] Code: 90 90 90 90 90 90 90 90 90 90 90 90 90 90 90 90 90 0f 1f 44 00 00 53 48 89 fb e8 62 d3 ff ff 31 c0 65 48 8b 14 25 00 15 03 00 <f0> 48 0f b1 13 75 06 5b c3 cc cc cc cc 48 89 df 5b eb b4 0f 1f 40 [ 91.662840] RSP: 0018:ffffa1e8011ffc08 EFLAGS: 00010246 [ 91.663087] RAX: 0000000000000000 RBX: 00000000000001c8 RCX: 0000000000000000 [ 91.663440] RDX: ffff8be455eb0000 RSI: 0000000000000001 RDI: 00000000000001c8 [ 91.663802] RBP: ffff8be459440000 R08: ffff8be459441f08 R09: ffffffff8e1432c0 [ 91.664167] R10: 0000000000000000 R11: 0000000000000000 R12: 0000000000000001 [ 91.664532] R13: 00000000000001c8 R14: 0000000000000000 R15: ffff8be442f4fb20 [ 91.664905] FS: 00007f28ffc16740(0000) GS:ffff8be4bb900000(0000) knlGS:0000000000000000 [ 91.665334] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 91.665626] CR2: 00000000000001c8 CR3: 0000000114926006 CR4: 0000000000770ee0 [ 91.665988] PKRU: 55555554 [ 91.666131] Call Trace: [ 91.666265] <TASK> [ 91.666381] intel_fbdev_set_suspend+0x97/0x1b0 [i915] [ 91.666738] i915_drm_suspend+0xb9/0x100 [i915] [ 91.667029] pci_pm_suspend+0x78/0x170 [ 91.667234] ? __pfx_pci_pm_suspend+0x10/0x10 [ 91.667461] dpm_run_callback+0x47/0x150 [ 91.667673] __device_suspend+0x10a/0x4e0 [ 91.667880] dpm_suspend+0x134/0x270 [ 91.668069] dpm_suspend_start+0x79/0x80 [ 91.668272] suspend_devices_and_enter+0x11b/0x890 [ 91.668526] pm_suspend.cold+0x270/0x2fc [ 91.668737] state_store+0x46/0x90 [ 91.668916] kernfs_fop_write_iter+0x11b/0x200 [ 91.669153] vfs_write+0x1e1/0x3a0 [ 91.669336] ksys_write+0x53/0xd0 [ 91.669510] do_syscall_64+0x58/0xc0 [ 91.669699] ? syscall_exit_to_user_mode_prepare+0x18e/0x1c0 [ 91.669980] ? syscall_exit_to_user_mode_prepare+0x18e/0x1c0 [ 91.670278] ? syscall_exit_to_user_mode+0x17/0x40 [ 91.670524] ? do_syscall_64+0x67/0xc0 [ 91.670717] ? __irq_exit_rcu+0x3d/0x140 [ 91.670931] entry_SYSCALL_64_after_hwframe+0x72/0xdc [ 91.671202] RIP: 0033:0x7f28ffd14284 v2: CC stable. (Jani) Fixes: f8cc091e ("drm/i915/fbdev: suspend HPD before fbdev unregistration") References: https://gitlab.freedesktop.org/drm/intel/-/issues/8015Reported-and-tested-by:
-
- 14 Feb, 2023 11 commits
-
-
Ville Syrjälä authored
Since we now populate encoder->devdata for all DP capable platforms we can consult it directly during the eDP connector init instead of taking a detour via some global list/array. Unfortunately we can't quite get rid of intel_dp_is_port_edp() since it's still used by the higher level ilk/vlv/chv output setup code. Signed-off-by:
-
Ville Syrjälä authored
Instead of consulting vbt.ports[] lets just go through the whole child device list to check whether a specific port was declared by the VBT or not. Note that this doesn't change anything wrt. detecting duplicate child devices with the same port as vbt.ports[] would also always contain exactly one of the duplicates. v2: Include a is_port_valid() check to deal with some broken VBTs Mention something about duplicate port detection (Jani) Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: -
Ville Syrjälä authored
Currently intel_bios_port_aux_ch() digs out the devdata (VBT child device info) from the vbt.ports[] array. We need to get rid of that, so just pass in the correct encoder->devdata (now that we have it also for g4x+ ports) directly. Signed-off-by:
-
Ville Syrjälä authored
Let's make encoder->devdata (the VBT information for the port) available on g4x+ platforms as well. Much easier when you can just grab it there instead of trying to find it from some global list array based on the port. Note that (unlike DDI platforms) we don't currently require that each DP/HDMI port is actually declared in VBT. Perhaps in the future we may want to rethink that, but for now just stick in a debug+FIXME as a reminder. Signed-off-by:
-
Ville Syrjälä authored
Display WA #1178 calls us to tweak some magic bits when doing AUX to an external combo PHY port. Instead of looking to see if the VBT has declared such a port (which could in theory even alias with a declared eDP port on the same PHY) just check the real situation based on the registered encoders. The only slight chicken vs. egg situation here is during output probing. But typically we'd register the eDP ports first and so once we get to probe anything external on the combo PHY we have already determined if it's eDP or not. Signed-off-by:
-
Ville Syrjälä authored
intel_bios_is_port_hpd_inverted() is only used on bxt/glk on which we always have encoder->devdata available. So consult that instead of digging around in vbt.ports[]. And rename the function to match the common pattern. Signed-off-by:
-
Ville Syrjälä authored
The sole user of intel_bios_is_lane_reversal_needed() has the devdata already located, so pass it in directly instead of digging it again from vbt.ports[]. And rename the function to follow the common pattern for these things. Signed-off-by:
-
Ville Syrjälä authored
We always have encoder->devdata available on the platforms that can have LSPCON. So let's start looking there instead of digging it out from vbt.ports[]. And let's rename the function to fit the common pattern for these things. Signed-off-by:
-
Ville Syrjälä authored
Lot of the loops over VBT child devices have variables declared outside the loop but only used inside the loop. Move the variables to a tighter scope. Signed-off-by:
-
Ville Syrjälä authored
bxt_hotplug_enables() needs to dig out not only the hpd_pin but also the VBT child device info, so let's just pass in the whole encoder to avoid having to look things up multiple times. Signed-off-by:
-
Suraj Kandpal authored
According VDSC spec 1.2a Section 3.8 Options for Slice implies that 108 lines is an optimal slice height, but any size can be used as long as vertical active integer multiple and maximum vertical slice count requirements are met. Bspec: 49259 --v3 -remove previous fallback code and return slice_height as 2 [Jani] Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Cc: Swati Sharma <swati2.sharma@intel.com> Signed-off-by:
Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by:
-
- 10 Feb, 2023 5 commits
-
-
Ville Syrjälä authored
It's hard to figure out whether the number is hex or decimal if doesn't have the 0x to indicate hex. Signed-off-by:
-
Ville Syrjälä authored
Dump the stepping information alongside all the other device info. Might avoid some guesswork when reading logs. Signed-off-by:
-
Nirmoy Das authored
For i915 functions pass struct drm_i915_private directly instead of struct drm_device. v2: Use to_i915(dev) directly without alias(Andrzej). Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Suggested-by:
Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by:
Nirmoy Das <nirmoy.das@intel.com> Reviewed-by:
Andrzej Hajda <andrzej.hajda@intel.com> Signed-off-by:
Andi Shyti <andi.shyti@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230125095603.17845-1-nirmoy.das@intel.com
-
Ville Syrjälä authored
Replaces wm.max_level with wm.num_levels, since that generally results in nicer looking code (for-loops can be in standard form etc.). Also get rid of the two different wrappers we have for this (ilk_wm_max_level() and intel_wm_num_levels()). They don't really do anything for us other than potentially slow things down if the compiler actually emits the function calls every time (num_planes*num_wm_levels*higher_level_wm_function_calls could be a big number). The watermark code already shows up far too prominently in cpu profiles. Though I must admit that I didn't look at the generated code this time. v2: Fix the ilk_wm_merge() off-by-one (Jani) Signed-off-by:
-
Ville Syrjälä authored
Switch ilk+ and skl+ platforms to also setting up wm.max_level and remove a bunch of if ladders as a result. There will be a tiny change in the debugfs on CHV machines that have DVFS disabled in the BIOS. Presviously debugfs would show the latency for the DVFS level as well, but that will no longer be the case. Which is arguably better as that number is absolutely meaningless when DVFS can't be enabled anyway. Signed-off-by:
-
- 09 Feb, 2023 1 commit
-
-
Radhakrishna Sripada authored
Clock gating hooks to be initialized for MTL are yet to be implemented. Use a nop till we identify relevant WA's here. Signed-off-by:
Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by:
Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230111235531.3353815-3-radhakrishna.sripada@intel.com
-
- 08 Feb, 2023 7 commits
-
-
Matt Roper authored
The bspec was recently updated to remove PCI ID 0x5698; this ID is actually reserved for future use and should not be treated as DG2-G11. Bspec: 44477 Fixes: 8618b848 ("drm/i915: DG2 and ATS-M device ID updates") Signed-off-by:
Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230208200905.680865-1-matthew.d.roper@intel.com
-
Ashutosh Dixit authored
This reverts commit 0349c41b. 0349c41b ("drm/i915/hwmon: Enable PL1 power limit") is incorrect and caused a major regression on ATSM. The change enabled the PL1 power limit but FW sets the default value of the PL1 limit to 0 which implies HW now works at minimum power and therefore the lowest effective frequency. This means all workloads now run slower resulting in even GuC FW load operations timing out, rendering ATSM unusable. A different solution to the original issue of the PL1 limit being disabled on ATSM is needed but till that is developed, revert 0349c41b. Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8062Signed-off-by:
Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by:
Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230208190312.1611335-1-ashutosh.dixit@intel.com
-
Jani Nikula authored
With backlight controller set to -1 in intel_panel_init_alloc() to distinguish uninitialized values, and controller later being set only if it's present in VBT, we can end up with -1 for the controller: [drm:intel_bios_init_panel [i915]] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 0, level 255, controller 4294967295 There's no harm if it happens on platforms that ignore controller due to only one backlight controller being present, like on VLV above, but play it safe. Fixes: bf38bba3 ("drm/i915: Try to use the correct power sequencer intiially on bxt/glk") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: -
Jani Nikula authored
drmm_add_action_or_reset() is unaware of __iomem and the pointer needs to be a plain void *. Cast __iomem away and back while the pointer goes through drmm. drivers/gpu/drm/i915/intel_uncore.c:2463:17: warning: incorrect type in argument 1 (different address spaces) drivers/gpu/drm/i915/intel_uncore.c:2463:17: expected void volatile [noderef] __iomem *addr drivers/gpu/drm/i915/intel_uncore.c:2463:17: got void *regs drivers/gpu/drm/i915/intel_uncore.c:2494:16: warning: incorrect type in argument 3 (different address spaces) drivers/gpu/drm/i915/intel_uncore.c:2494:16: expected void *data drivers/gpu/drm/i915/intel_uncore.c:2494:16: got void [noderef] __iomem *regs Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by:
-
Jani Nikula authored
The ucode part in the init, fini, suspend and resume function names is just unnecessary. Drop it. Cc: Imre Deak <imre.deak@intel.com> Signed-off-by:
-
Ville Syrjälä authored
Use the second backlight controller on ICP+ if the VBT asks us to do so. On pre-MTP we also check the chicken bit to make sure the pins have been correctly muxed by the firmware. Cc: stable@vger.kernel.org Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8016Signed-off-by:
-
Ville Syrjälä authored
We now have some eDP+DSI dual panel systems floating around where the DSI panel is the secondary LFP and thus needs to consult "panel type 2" in VBT in order to locate all the other panel type dependant stuff correctly. To that end we need to pass in the devdata to intel_bios_init_panel_late(), otherwise it'll just assume we want the primary panel type. So let's try to just populate the vbt.ports[] stuff and encoder->devdata for icl+ DSI panels as well. We can't do this on older platforms as there we risk a DSI port aliasing with a HDMI/DP port, which is a totally legal thing as the DSI ports live in their own little parallel universe. Cc: stable@vger.kernel.org Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8016Signed-off-by:
-
