- 31 Jul, 2018 21 commits
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Thomas Zimmermann authored
The function ttm_bo_put releases a reference to a TTM buffer object. The function's name is more aligned to the Linux kernel convention of naming ref-counting function _get and _put. A call to ttm_bo_unref takes the address of the TTM BO object's pointer and clears the pointer's value to NULL. This is not necessary in most cases and sometimes even worked around by the calling code. A call to ttm_bo_put only releases the reference without clearing the pointer. The current behaviour of cleaning the pointer is kept in the calling code, but should be removed if not required in a later patch. Signed-off-by:
Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Thomas Zimmermann authored
The function ttm_bo_get acquires a reference on a TTM buffer object. The function's name is more aligned to the Linux kernel convention of naming ref-counting function _get and _put. Signed-off-by:
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Thomas Zimmermann authored
The function ttm_bo_put releases a reference to a TTM buffer object. The function's name is more aligned to the Linux kernel convention of naming ref-counting function _get and _put. A call to ttm_bo_unref takes the address of the TTM BO object's pointer and clears the pointer's value to NULL. This is not necessary in most cases and sometimes even worked around by the calling code. A call to ttm_bo_put only releases the reference without clearing the pointer. The current behaviour of cleaning the pointer is kept in the calling code, but should be removed if not required in a later patch. v2: * set prefix to drm/amdgpu Signed-off-by:
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Thomas Zimmermann authored
The function ttm_bo_get acquires a reference on a TTM buffer object. The function's name is more aligned to the Linux kernel convention of naming ref-counting function _get and _put. v2: * changed prefix to drm/amdgpu Signed-off-by:
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Christian König authored
We removed the redundancy of having an extra scheduler field, so we can't set the rq to NULL any more or otherwise won't know which scheduler to use for the cleanup. Just remove the entity from the scheduling list instead. Signed-off-by:
Nayan Deshmukh <nayan26deshmukh@gmail.com> Bug: https://bugs.freedesktop.org/show_bug.cgi?id=107367Signed-off-by:
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Christian König authored
Note which task is using the entity and only kill it if the last user of the entity is killed. This should prevent problems when entities are leaked to child processes. v2: add missing kernel doc Signed-off-by:
Andrey Grodzovsky <andrey.grodzovsky@amd.com> Acked-by:
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Christian König authored
Instead of having extra handling just create an empty bo_list when no handle is provided. Signed-off-by:
Chunming Zhou <david1.zhou@amd.com> Reviewed-by:
Huang Rui <ray.huang@amd.com> Signed-off-by:
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Christian König authored
This avoids multiple allocations for the head and the array. Signed-off-by:
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Christian König authored
Add helpers to iterate over all entries in a bo_list. Signed-off-by:
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Christian König authored
The RCU grace period is harmless and avoiding it is not worth the effort of doubling the implementation. Signed-off-by:
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Christian König authored
The bo_list handle is allocated by OP_CREATE, so in OP_UPDATE here we just re-create the bo_list object and replace the handle. This way we don't need locking to protect the bo_list because it's always re-created when changed. Signed-off-by:
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Christian König authored
Further demangle amdgpu.h Signed-off-by:
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Christian König authored
This allows us to trace all VM ranges which should be valid inside a CS. v2: dump mappings without BO as well Signed-off-by:
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Christian König authored
Return -EINVAL when both the BOs as well as a list handle is provided in the IOCTL. Signed-off-by:
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Christian König authored
long might only be 32bit in size and we can easily use more than 4GB here. Signed-off-by:
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Masahiro Yamada authored
I refactored the include directives under include/drm/ some time ago. This flag is unneeded. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by:
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Christian König authored
Otherwise we silently don't use a BO list when the handle is invalid. Signed-off-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
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Rex Zhu authored
This test was reversed so it would end up leading to vddnb value can't be read via hwmon on APU. Reviewed-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Rex Zhu <Rex.Zhu@amd.com> Signed-off-by:
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Rex Zhu authored
the voltage showed in debugfs and hwmon should be in mV Reviewed-by:
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Rex Zhu authored
Only delete the dead temp variables in Polaris. Reviewed-by:
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Rex Zhu authored
DIDTConfig_Polaris12[] table missed a big chunk of data. Pointed by aidan.fabius <aidan.fabius@coreavi.com> Reviewed-by:
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- 27 Jul, 2018 19 commits
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Huang Rui authored
This patch cleans up spaces and align the text to refine the comment for amdgpu_ttm. Signed-off-by:
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Junwei Zhang authored
pass the evict flag instead of hard code Signed-off-by:
Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by:
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Bas Nieuwenhuizen authored
Every set_pages_array_wb call resulted in cross-core interrupts and TLB flushes. Merge more of them for less overhead. This reduces the time needed to free a 1.6 GiB GTT WC buffer as part of Vulkan CTS from ~2 sec to < 0.25 sec. (Allocation still takes more than 2 sec though) (v2): use set_pages_wb instead of set_memory_wb. Signed-off-by:
Bas Nieuwenhuizen <basni@chromium.org> Signed-off-by:
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Huang Rui authored
All non-x86 definitions are moved to ttm_set_memory header, so remove it from ttm_page_alloc.c. Suggested-by:
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Huang Rui authored
All non-x86 definitions are moved to ttm_set_memory header, so remove it from ttm_page_alloc_dma.c. Suggested-by:
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Huang Rui authored
This patch moves all non-x86 abstraction to the ttm_set_memory header. It is to make function calling more clearly. (v2): add ttm_ prefix. Suggested-by:
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Alex Deucher authored
Properly handle cases where one or more instance of the IP block may be harvested. v2: make sure ip_num_rings is initialized amdgpu_queue_mgr.c v3: rebase on Christian's UVD changes, drop unused var Reviewed-by:
James Zhu <James.Zhu@amd.com> Signed-off-by:
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Harry Wentland authored
This structure needs to align with structure in atomfirmware table. Update it. Signed-off-by:
Harry Wentland <harry.wentland@amd.com> Acked-by:
Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Signed-off-by:
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Harry Wentland authored
Signed-off-by:
Aric Cyr <Aric.Cyr@amd.com> Acked-by:
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by:
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Anthony Koo authored
[Why] PSR_SET command is sent to the microcontroller in order to initialize parameters needed for PSR feature, such as telling the microcontroller which pipe is driving the PSR supported panel. When this command is skipped or fails, the microcontroller may program the wrong thing if driver tries to enable PSR. [How] If PSR_SET fails, do not set psr_enable flag to indicate the feature is not yet initialized. Signed-off-by:
Anthony Koo <Anthony.Koo@amd.com> Reviewed-by:
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Jerry (Fangzhi) Zuo authored
[Why] The sequence is slightly changed when bring .set_bandwidth out from the end of programming backend to the end of programming surface. Vega10 doesn't like to get clocks updated if stream_count is zero in the current context (Atomic Reset). [How] Do not update clocks if no stream is showing up in the context. Fixes 1b2b130192 "dc: Remove 300Mhz minimum disp clk limit." Signed-off-by:
Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
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Bhawanpreet Lakha authored
[Why] engine and aux_engine are unnecessary layers we want to remove this layer. [How] flatten engine and aux engine structs into one struct called aux_engine and remove all references to the engine struct. Signed-off-by:
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Bhawanpreet Lakha authored
[Why] Some receivers seem to fail the first link training but are good on subsequent tries. We want to retry link training again. This fixes HTC vive pro not lighting up after being disabled. [How] Check if the link training passed without fall back if this is not the case then we retry link training. Signed-off-by:
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Christian König authored
Patch the IBs for the second UVD instance so that userspace don't need to care about the instance they submit to. v2: use direct IB patching Signed-off-by:
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Christian König authored
We are going to need that for the second UVD instance on Vega20. v2: rename to patch_cs_in_place Signed-off-by:
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
Updates for 4.19. Mostly bug fixes and cleanups. Highlights: - Internal API cleanup in GPU scheduler - Decouple i2c and aux abstractions in DC - Update maintainers - Misc cleanups - Misc bug fixes Signed-off-by:
Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180725215326.2709-1-alexander.deucher@amd.com
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Dave Airlie authored
Merge tag 'exynos-drm-next-for-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next Cleanups - Change g2d driver to component based driver . g2d driver was last customed sub driver so this patch series changes it to component based driver, which also makes gem handling to be more simplify. - Cleanup of Exynos DRM suspend/resume . Register exynos drm core suspend/resume functions to prepare/complete callbacks of dev_pm_ops instead of suspend/resume callbacks to ensure exynos_drm_suspend() is called before any suspend callback from the real devices to avoid some issues on boards with complex pipelines. . Also Add pm_runtime_furce_suspend/resume as SYSTEM_SLEEP_PM_OPS to ensure that resources of each devices will be released for the system PM suspend/resume cycle. - Remove local value not used. Signed-off-by:
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git://linux-arm.org/linux-ldDave Airlie authored
I have a couple of small patches for malidp to be applied in drm-next. They have arisen from the decision to switch the writeback connectors to always connected. Signed-off-by:
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git://git.pengutronix.de/git/pza/linuxDave Airlie authored
drm/imx: cleanup and csi improvements - Remove the unused struct imx_drm_crtc and the unused pipes field from imx_drm_device and replace drm_dev_unref with drm_dev_put. - Extend CSI configuration to support RGB888 and BGR888 capture, as well as 16-bit RGB565 capture via a parallel bus. - Add CPMEM support for negative interlace offsets, which is necessary to support writing captured bottom-top interlaced fields to memory with interleaved lines. Signed-off-by:
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