- 03 Oct, 2012 20 commits
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Guennadi Liakhovetski authored
Upon completion of a MMC_WRITE_MULTIPLE_BLOCK command MMCIF issues an IRQ with the DTRANE bit set and often with one or several of CMD12 bits set. If those interrupts are not acknowledged, an additional interrupt can be produced and will be delivered later, possibly, when the transaction has already been completed. To prevent this from happening, CMD12 completion interrupt sources have to be cleared too upon reception of an DTRANE IRQ. Signed-off-by:
Guennadi Liakhovetski <g.liakhovetski@gmx.de> Tested-by:
Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by:
Chris Ball <cjb@laptop.org>
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Chander Kashyap authored
If sdhci-s3c driver is built as module, it gives following error if inserted again after removing. This was happening as pm_runtime_use_autosuspend() is called in sdhci_s3c_probe() function but in sdhci_s3c_remove() its complementary pm_runtime_dont_use_autosuspend() is not called. BUG: spinlock bad magic on CPU#1, insmod/955 lock: 0xee771368, .magic: 00000000, .owner: insmod/955, .owner_cpu: 1 [<c00147e0>] (unwind_backtrace+0x0/0xf8) from [<c0136b40>] (do_raw_spin_unlock+0xa4/0xe4) [<c0136b40>] (do_raw_spin_unlock+0xa4/0xe4) from [<c01be508>] (_raw_spin_unlock_irqrestore+0xc/0x38) [<c01be508>] (_raw_spin_unlock_irqrestore+0xc/0x38) from [<c01a9334>] (sdhci_runtime_suspend_host+0x54/0x80) [<c01a9334>] (sdhci_runtime_suspend_host+0x54/0x80) from [<bf0060a8>] (sdhci_s3c_runtime_suspend+0x14/0x38 [sdhci_s3c]) [<bf0060a8>] (sdhci_s3c_runtime_suspend+0x14/0x38 [sdhci_s3c]) from [<c016cb00>] (pm_generic_runtime_suspend+0x2c/0x40) [<c016cb00>] (pm_generic_runtime_suspend+0x2c/0x40) from [<c0170090>] (__rpm_callback+0x70/0x98) [<c0170090>] (__rpm_callback+0x70/0x98) from [<c01703f0>] (rpm_suspend+0xf0/0x534) [<c01703f0>] (rpm_suspend+0xf0/0x534) from [<c0171670>] (__pm_runtime_suspend+0x5c/0x74) [<c0171670>] (__pm_runtime_suspend+0x5c/0x74) from [<c016d018>] (pm_generic_runtime_idle+0x44/0x4c) [<c016d018>] (pm_generic_runtime_idle+0x44/0x4c) from [<c0170090>] (__rpm_callback+0x70/0x98) [<c0170090>] (__rpm_callback+0x70/0x98) from [<c0170984>] (rpm_idle+0xdc/0x18c) [<c0170984>] (rpm_idle+0xdc/0x18c) from [<c0171608>] (pm_runtime_set_autosuspend_delay+0x30/0x3c) [<c0171608>] (pm_runtime_set_autosuspend_delay+0x30/0x3c) from [<bf0069c4>] (sdhci_s3c_probe+0x35c/0x52c [sdhci_s3c]) [<bf0069c4>] (sdhci_s3c_probe+0x35c/0x52c [sdhci_s3c]) from [<c016a014>] (platform_drv_probe+0x18/0x1c) Signed-off-by:
Chander Kashyap <chander.kashyap@linaro.org> Acked-by:
Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by:
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Chander Kashyap authored
In case of multiple bus clock sources, all the clock sources were getting enabled. As only one clock source is needed at the time hence enable only the required bus clock. This patch does as follows: 1. In sdhci_s3c_probe enable only required bus clock source. 2. Handle the disabling of old bus clock and enables the best clock selected in sdhci_s3c_set_clock(). Signed-off-by:
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Seungwon Jeon authored
This reverts commit 94c6cee9 (Add check for IDMAC configuration). Synopsys says that only if internal dmac is not present, optional external dma interface is present. When internal dmac is present, '0' value in DMA_INTERFACE of HCON is reasonable. DMA_INTERFACE indicates external dma interface. And idmac initialization is prohibited now. The commit should be reverted since: the check for IDMAC is not reliable; falling back to PIO would provide awful performance; we wouldn't expect to see instances of this block without DMA support. Signed-off-by:
Seungwon Jeon <tgih.jun@samsung.com> Acked-by:
Will Newton <will.newton@imgtec.com> Signed-off-by:
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Javier Martin authored
The problem can be easily reproduced using a script that loops copying a file in an SD card to another place in the same SD card and its related to read transfers. This only happens with DMA enabled. This is related to the fact that, when reading, an MMC irq signals the fact that all data from the SD card has been copied to the internal buffers. However, it doesn't signal whether the DMA transfer that is in charge of moving data from these internal buffers to RAM has finished or not. Thus, calling dmaengine_terminate_all() in the MMC irq routine can cancel an ongoing DMA transfer leaving some data in the internal buffers that produces an accumulative effect which, in the end, blocks a read data transfer forever. The following patch watches DMA irq for reading and MMC irqs for writing transfers. The 'dangerous' usage of dmaengine_terminate_all() is removed and a timeout of 10 seconds is added so that the MMC won't block forever anymore. Signed-off-by:
Javier Martin <javier.martin@vista-silicon.com> Reviewed-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
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Vaibhav Bedia authored
In some cases mmc_suspend_host() is not able to claim the host and proceed with the suspend process. The core returns -EBUSY to the host controller driver. Unfortunately, the host controller driver does not pass on this information to the PM core and hence the system suspend process continues. ret = mmc_suspend_host(host->mmc); if (ret) { host->suspended = 0; if (host->pdata->resume) { ret = host->pdata->resume(dev, host->slot_id); The return status from mmc_suspend_host() is overwritten by return status from host->pdata->resume. So the original return status is lost. In these cases the MMC core gets to an unexpected state during resume and multiple issues related to MMC crop up. 1. Host controller driver starts accessing the device registers before the clocks are enabled which leads to a prefetch abort. 2. A file copy thread which was launched before suspend gets stuck due to the host not being reclaimed during resume. To avoid such problems pass on the -EBUSY status to the PM core from the host controller driver. With this change, MMC core suspend might still fail but it does not end up making the system unusable. Suspend gets aborted and the user can try suspending the system again. Signed-off-by:Vaibhav Bedia <vaibhav.bedia@ti.com> Signed-off-by:
Hebbar, Gururaja <gururaja.hebbar@ti.com> Acked-by:
Venkatraman S <svenkatr@ti.com> Cc: stable <stable@vger.kernel.org> Signed-off-by:
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Hein_Tibosch authored
Earlier, atmel-mci was adapted to make use of the peripheral DMA controller (PDC), in case normal DMA wouldn't work. ( http://comments.gmane.org/gmane.linux.kernel.mmc/9403 ) This works OK on ARM platforms (AT91), but it broke the driver for AVR32, the AP700x. Although the MCI has PDC support, the connection is not done for AVR chips. This patch makes the use of PDC depend on !CONFIG_AVR32. Signed-off-by:
Hein Tibosch <hein_tibosch@yahoo.es> Signed-off-by:
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Hein_Tibosch authored
After the latest changes to atmel-mci, it could not be used with DMA on the AVR32 platform. This patch will allow to use DMA again and it will avoid access to MCI register ATMCI_DMA. Even if the IP version is lower than v3xx and doesn't have the DMA configuration register, DMA transfers can be used with a different controller than the Atmel AHB DMA one. For instance, some AVR chips use the Synopsys DesignWare AHB DMA controller. Signed-off-by:
Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by:
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Julia Lawall authored
clk_prepare_enable and clk_disable_unprepare combine clk_prepare and clk_enable, and clk_disable and clk_unprepare. They make the code more concise, and ensure that clk_unprepare is called when clk_enable fails. A simplified version of the semantic patch that introduces calls to these functions is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e; @@ - clk_prepare(e); - clk_enable(e); + clk_prepare_enable(e); @@ expression e; @@ - clk_disable(e); - clk_unprepare(e); + clk_disable_unprepare(e); // </smpl> Signed-off-by:
Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by:
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Thomas Abraham authored
Add device tree based discovery support for Samsung's sdhci controller. Cc: Ben Dooks <ben-linux@fluff.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by:
Thomas Abraham <thomas.abraham@linaro.org> Reviewed-by:
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Thomas Abraham authored
Samsung Exynos SoC's extend the dw-mshc controller for additional clock and bus control. Add support for these extensions and include provide device tree based discovery suppory as well. Signed-off-by:
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Thomas Abraham authored
The core dw-mshc controller driver can let platform specific implementations of the dw-mshc controller to control the hardware as required by such implementations. This is acheived by invoking implementation specific (optional) callbacks. Define the list of callbacks supported the add invocation points for the same. Signed-off-by:
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Thomas Abraham authored
Platform implementations of dw-mshc controller may choose to extend the features of the standard dw-mshc controller such as adding additional clocking options or modifying the bus interface. Support for such implementation specific extensions can be incorporated into dw_mmc-pltfm, but including multiple such platform specific implementations would convolute the existing dw_mmc-pltfm code. Instead, it would be better to create implementation specific platform drivers to support implementation specific features. Such platforms drivers can reuse the existing infrastructure in dw_mmc-pltfm for resource identification and controller registration and provide support for implementation specific features. So, allow the infrastructure in dw_mmc-pltfm to be reused by other implementation specific platform drivers. Signed-off-by:
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Thomas Abraham authored
Add device tree based discovery support. Signed-off-by:
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Thomas Abraham authored
If the write protect pad of the controller is not connected to the write protect pin of the slot, the driver should be notified of this condition so that incorrect check for write protection by reading the WRTORT register can avoided. The get_ro platform callback can be used for in such cases, but with device tree support enabled, such platform callbacks cannot be supported. Add a new quirk for notifying the driver about the missing write protect line so the driver can assume that the card write protection is disabled. Signed-off-by:
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Thomas Abraham authored
Some platforms allow for clock gating and control of bus interface unit clock and card interface unit clock. Add support for clock lookup of optional biu and ciu clocks for clock gating and clock speed determination. Signed-off-by:
Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by:
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Thomas Abraham authored
Instead of aborting the probe when a slot initialization fails, allow initialization of as many slots as possible. If there is at least one instance of a slot that is successfully initialized, allow the driver probe to succeed. Signed-off-by:
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Thomas Abraham authored
Use devm_* managed functions for simpler error handling. Signed-off-by:
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Thomas Abraham authored
The 'struct dw_mci' maintains a copy of the pdev->dev instance instead of maintaining a reference to that 'struct device' instance. Any resource allocated using the device resource management kernel API with the instance of 'struct device' in 'struct dw_mci' is then incorrect. Fix this by converting the copy of 'struct device' in 'struct dw_mci' to a reference. Signed-off-by:
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Jaehoon Chung authored
Enable eMMC background operations (BKOPS) feature. If URGENT_BKOPS is set after a response, note that BKOPS are required. Immediately run BKOPS if required. Read/write operations should be requested during BKOPS(LEVEL-1), then issue HPI to interrupt the ongoing BKOPS and service the foreground operation. (This patch only controls the LEVEL2/3.) When repeating the writing 1GB data, at a certain time, performance is decreased. At that time, card triggers the Level-3 or Level-2. After running bkops, performance is recovered. Future considerations: * Check BKOPS_LEVEL=1 and start BKOPS in a preventive manner. * Interrupt ongoing BKOPS before powering off the card. * How do we get BKOPS_STATUS value (periodically send ext_csd command)? * If using periodic bkops, also consider runtime_pm control. Signed-off-by:
Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by:
Konstantin Dorfman <kdorfman@codeaurora.org> Reviewed-by:
Maya Erez <merez@codeaurora.org> Signed-off-by:
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- 19 Sep, 2012 5 commits
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Guennadi Liakhovetski authored
Previously to this patch, an SDHCI platform that uses a GPIO for card detection instead of the internal SDHCI_CARD_PRESENT bit on the presence register would fail to detect a new card. Some drivers worked around this in various ways: esdhc-imx defines an IO accessor to fake the presence bit being true, s3c turns on polling (which stops the SDHCI driver from checking the bit) after a card's inserted. But none of this should be necessary; the real fix is to check whether we're using a GPIO and avoid relying on the presence bit if so, as this patch implements. Signed-off-by:
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Matt Porter authored
Removes use of the DaVinci EDMA private DMA API and replaces it with use of the DMA engine API. Signed-off-by:
Matt Porter <mporter@ti.com> Tested-by:
Koen Kooi <koen@dominion.thruhere.net> Signed-off-by:
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Thierry Reding authored
Power management callbacks defined by SIMPLE_DEV_PM_OPS are only used if the PM_SLEEP Kconfig symbol has been defined. If not, the compiler will complain about them being unused. However, since the callback for this driver doesn't do anything it can just as well be dropped. Signed-off-by:
Thierry Reding <thierry.reding@avionic-design.de> Acked-by:
Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by:
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Kyungsik Lee authored
It is expected that Extended CSD register (the size of this register is larger than CID/CSD) will be referenced more frequently as more fields have been added to Extended CSD and it seems that it is not a good option to double the memory used. This patch is intended to avoid the use of bounce buffer for reading Extended CSD register in mmc_send_cxd_data(). It will provide a better performance gain by removing memcpy() overhead for a half KiB and a redundant bounce buffer allocated repeatedly at the cost of providing DMA-capable buffer from upper caller (but on-stack buffer is allowed with no performance gain). Signed-off-by:
Kyungsik Lee <kyungsik.lee@lge.com> Reviewed-by:
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Chris Ball authored
Tested on OLPC XO-4/MMP3, where the card detection pin for one of the controllers is a sideband GPIO. The third cell in the cd-gpios property controls whether the GPIO is active high/active low. (Also, pass host_caps2 through from platdata to the mmc host.) Acked-by:
Haojian Zhuang <haojian.zhuang@gmail.com> [kliu5@marvell.com: Compile fix] Signed-off-by:
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- 11 Sep, 2012 1 commit
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Chris Ball authored
mmc_gpio_request_ro() doesn't store the requested gpio in ctx->ro_gpio. As a result, subsequent calls to mmc_gpio_get_ro() will always fail with -ENOSYS because the gpio number isn't available to that function. Cc: stable <stable@vger.kernel.org> Acked-by:
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- 04 Sep, 2012 14 commits
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Sachin Kamat authored
module_pci_driver makes the code simpler by eliminating module_init and module_exit calls. Signed-off-by:
Sachin Kamat <sachin.kamat@linaro.org> Acked-by:
Harald Welte <laforge@gnumonks.org> Signed-off-by:
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Sachin Kamat authored
module_pci_driver makes the code simpler by eliminating module_init and module_exit calls. Signed-off-by:
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Sachin Kamat authored
module_pci_driver makes the code simpler by eliminating module_init and module_exit calls. Signed-off-by:
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Sachin Kamat authored
module_spi_driver makes the code simpler by eliminating module_init and module_exit calls. Signed-off-by:
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Jingoo Han authored
This patch fixes the checkpatch error and warnings listed below: ERROR: return is not a function, parentheses are not required WARNING: Prefer pr_err(... to printk(KERN_ERR, ... WARNING: quoted string split across lines WARNING: line over 80 characters WARNING: braces {} are not necessary for single statement blocks Signed-off-by:Jingoo Han <jg1.han@samsung.com> Acked-by:
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Johan Rudholm authored
If MMC_CAP_NONREMOVABLE is set, only issue a detect job on init. Signed-off-by:
Johan Rudholm <johan.rudholm@stericsson.com> Acked-by:
Ulf Hansson <ulf.hansson@linaro.org> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Jaehoon Chung authored
Fixed the below message. WARNING: drivers/mmc/host/built-in.o(.text+0x5ee8): Section mismatch in reference from the function dw_mci_probe() to the function .init.text:dw_mci_init_slot() The function dw_mci_probe() references the function __init dw_mci_init_slot(). This is often because dw_mci_probe lacks a __init annotation or the annotation of dw_mci_init_slot is wrong Signed-off-by:
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Joseph Lo authored
When compiling a kernel that supports only Tegra30 and not Tegra20, the SDHCI driver will fail to compile since the of_match_device() failure fallback code unconditinally references soc_data_tegra20, which is only compiled in when Tegra20 support is enabled. In Kernel 3.7, both Tegra20 and Tegra30 will only support booting using device tree, Hence, there is never a need to fall back to using soc_data_tegra20 if of_mach_device() fails. Instead, make this case an error. This removes the reference to soc_data_tegra20, and hence solves the compile failure. Signed-off-by:
Joseph Lo <josephl@nvidia.com> Tested-by:
Stephen Warren <swarren@wwwdotorg.org> Signed-off-by:
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Chris Ball authored
Signed-off-by: -
Venkatraman S authored
I can continue to look after this driver. Signed-off-by:
Felipe Balbi <balbi@ti.com> Signed-off-by:
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Venkatraman S authored
Consolidate the duplicated code around the handling of CMD_TIMEOUT, CMD_CRC, DATA_TIMEOUT, DATA_CRC and CARD_ERR handling into a single function. This generally shrinks code bloat, but is also required for implementing software based guard timers. Signed-off-by:
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Venkatraman S authored
Flushing spurious IRQs from HSMMC IP is done twice in omap_hsmmc_irq and omap_hsmmc_do_irq. Consolidate them to one location. Signed-off-by:
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Venkatraman S authored
SYSCONFIG register of HSMMC IP is managed by the omap hwmod abstraction layer. Resetting the IP and configuring the correct SYSCONFIG mode is centrally managed by hwmod. Remove code which manipulates IP reset and SYSCONFIG directly in the driver. Signed-off-by:
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Venkatraman S authored
Some straight forward cleanup of unnecessary #include's and host variables. Some of the verbose and redundant debug messages are converted to use dev_vdbg. Signed-off-by:
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