This is to

  - handle _CRS with multiple vendor-specific resources
  - use acpi_walk_resources() instead of doing it by hand
  - make lookup of vendor resource by GUID generic
  - cleanup now-unused helper functions

(This depends on the previous IO port space patches, because
they removed the last of acpi_get_addr_space()).

My hope is that acpi_vendor_resource_match() and
acpi_find_vendor_resource() can someday move into ACPI,
but that probably depends on getting the idea of labelling
vendor resources with a GUID into the spec.  HP does this
and I think is working on putting it in the spec.

This is a trivial patch that makes sba_iommu recognize a new IOC.
Only change is that it will print

    IOC: sx1000 0.1 HPA 0xf8120002000 IOVA space 1024Mb at 0x80000000

instead of

    IOC: Unknown (103c:127c) 0.1 HPA 0xf8120002000 IOVA space 1024Mb
at 0x80000000

trivial (whitespace, copyright, and move pcibios_fixup_device_resources
closer to related code)

add support for /proc/iomem and /proc/ioports

enhance pcibios_scan_root to get multiple mem & io windows from ACPI _CRS,
and fixup all the resources

This has been in my 2.4 BK tree for a while, but I should have
posted it in case there's feedback from other people working
on large machines.  So here it is, in four parts:

  1  enhance __ia64_mk_io_addr(port)
  2  enhance pcibios_scan_root to get multiple mem & io windows
      from ACPI _CRS, and fixup all the resources
  3  add support for /proc/iomem and /proc/ioports
  4  trivial (whitespace, copyright, and move pcibios_fixup_device_resources
       closer to related code)

The current scheme is that IO ports are 64 bits, with the low 24
bits being the port number within an IO port space, and the upper
bits identifying the space.  There is currently a limit of 16
spaces.

Here's some cleanups/fixes/changes for interrupts on 2.5.67 + ia64.
Specifically:

  - Cleanup some ugliness with polarity/trigger setup.

  - Add iosapic_enable_intr() to set_rte on an interupt when the
    device is enabled.  IMHO, we really only want to unmask RTEs
    for PRTs we might actually use.  This moves the interrupt
    distribution here too.

  - When changing a vector from edge to level, call register_intr()
    to do it so all the data structures get set correctly.  If we
    have to guess how to setup an interupt and get it wrong, this
    should close some holes in changing it back to the correct type.

  - Register the HCDP interrupt in 8250_hcdp - this is where we have
    to guess the polarity/trigger.  The real handler will get fixed
    up via PCI setup or ACPI namespace serial support, this gets it
    associated w/ the port at setup.  This should allow interrupts
    to work when using builtin UARTs as console on HP Itanium2 boxes.

This patch fixes the issue of some CPUs not showing timer interrupts
going off.  Seems during the process of sync'ing the itc, we jumped over
the next timer value.  This patch is against 2.5.67 + ia64.  I haven't
seen the problem on 2.4, but a quick looks seems like it's potentially
an issue there too.

Please apply the following patch on top of 2.5.6x. This patch does the
following:

- repair broken system-wide overflow notification
- repair broken per-process notification
- fix a problem in the resrved bitmask for opcode 
  matcher8,9 for McKinley as reported by UIUC.
- forcing of bit2 for pmc8/pmc9 now part of reserved bitmask
- add the unsecure option to perfmon
- update to perfmon 1.4 (similar to 2.4)

	with a special convention.  Various minor fixes for gcc-pre3.4.

This is mostly trivial whitespace and printk text tweaks.  I did add the
segment number to a printk that previously just had the bus.

Include id when encountering unknown IOC.

This removes a workaround for some broken firmware that was
never released.

> It looks like dynamic x86 binaries have a problem once again (or
> still).  If I try to run any shared x86 binaries, I get:
> 
>       $ ls.x86
>       ls.x86: error while loading shared libraries: librt.so.1: cannot map zero-fill pages: Error 14
> 
> Would someone take a look?

We saw this behavior with 2.5.59 also. The attached work around should
take care of the problem temporarily. Last time this happened, IA-32
programs were doing mmaps, whose size was one page bigger than the
size of the underlying file (even after rounding up the file size).

I never got a chance to figure out why glibc was doing mmaps with the
wrong size. Also, I failed to reproduce the problem with a more
recent (RH 8.0) glibc.

Which version of IA-32 glibc were you using ?

	int.

	help of ia64_fetchadd() macro.  Ditto for _raw_read_unlock().

This patch fixes waste of interrupt vector pool by not
allocating an interrupt vector to a GSI which has no corresponding
IO SAPIC.

This fix is needed to boot on Intel-based machines.

This fixes a couple problems with the generic target in the latest
2.5.67 kernel.  First is simply a fix for the addition of readX in
the machvec.  The second gets things to link in roughly the same order
when using a generic vs zx1 flavor.  With the current code, sba_init()
is called in the right place when using a zx1 flavor kernel, but
happens way too early on a generic kernel.

	Various small 2.5.67 fixes.

Here is a trivial patch to processor.h to change "extern" to "static".

Here is the ia64 part of the patch.  It depends on my previous COMPAT
patches.  This is safe to apply even before Linus applies the generic
part.

Here is the ia64 part of the patch.  Pleas apply after Linus has applied
the generic part.

	Chandra Kapate).

implies that it should vary between 0-7, not any further (the
higher bits are done by updating current_vector by 8).

This also means that we don't have any overflow condition.

This version fixes:
- missing rtnl_lock()/rtnl_unload() bug on unregister_hdlc_device
- N2, C101: interrupt handler now works under high IRQ load from other
  devices (with previous versions, the IRQ processing for the card could
  sometimes stop after reaching "work limit")

This is production-tested on devices I have access to (N2, C101, PC300,
PCI200SYN).

This patch disables irqbalance and doesn't spawn a kernel thread for
systems which run SMP kernels and only have one online cpu.