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  1. 29 Jun, 2015 10 commits
    • David S. Miller's avatar
      Merge branch 'bcm7xxx_workaround' · 7c80c3af
      David S. Miller authored 
      Florian Fainelli says:

====================
net: phy: bcm7xxx initial read/write workaround

This patch series fixes occasional BCM7xxx PHY driver binding failure due
to a harware bug where the first read or write does not come out of the PHY
MDIO management controller.

Since we have two different MDIO controllers using this PHY, a similar
need to be replicated in GENET and UniMAC MDIO.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      7c80c3af
    • Florian Fainelli's avatar
      net: phy: mdio-bcm-unimac: workaround initial read failures for integrated PHYs · d8e704e4
      Florian Fainelli authored 
      All BCM7xxx integrated Gigabit PHYs have an issue in their MDIO
management controller which will make the initial read or write to them
to fail and return 0xffff. This is a real issue as the typical first
thing we do is read from MII_PHYSID1 and MII_PHYSID2 from get_phy_id()
to register a driver for these PHYs.

Coupled with the workaround in drivers/net/phy/bcm7xxx.c, this
workaround for the MDIO bus controller consists in scanning the list of
PHYs to do this initial read workaround for as part of the MDIO bus
reset routine which is invoked prior to mdiobus_scan().

Once we have a proper PHY driver/device registered, all workarounds are
located there (e.g: power management suspend/resume calls).
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d8e704e4
    • Florian Fainelli's avatar
      net: bcmgenet: workaround initial read failures for integrated PHYs · 7b635da8
      Florian Fainelli authored 
      All BCM7xxx integrated Gigabit PHYs have an issue in their MDIO
management controller which will make the initial read or write to them
to fail and return 0xffff. This is a real issue as the typical first
thing we do is read from MII_PHYSID1 and MII_PHYSID2 from get_phy_id()
to register a driver for these PHYs.

Coupled with the workaround in drivers/net/phy/bcm7xxx.c, this
workaround for the MDIO bus controller consists in scanning the list of
PHYs to do this initial read workaround for as part of the MDIO bus
reset routine which is invoked prior to mdiobus_scan().

Once we have a proper PHY driver/device registered, all workarounds are
located there (e.g: power management suspend/resume calls).
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      7b635da8
    • Florian Fainelli's avatar
      net: phy: bcm7xxx: workaround MDIO management controller initial read · 8e346e15
      Florian Fainelli authored 
      The initial MDIO read or write towards the BCM7xxx integrated PHY may
fail, workaround this by inserting a dummy MII_BMSR read to force the
MDIO management controller to see at least one valid transaction and get
out of stuck state out of reset.
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8e346e15
    • Michal Schmidt's avatar
      bnx2x: fix DMA API usage · 8031612d
      Michal Schmidt authored 
      With CONFIG_DMA_API_DEBUG=y bnx2x triggers the error "DMA-API: device
driver frees DMA memory with wrong function".
On archs where PAGE_SIZE > SGE_PAGE_SIZE it also triggers "DMA-API:
device driver frees DMA memory with different size".

Fix this by making the mapping and unmapping symmetric:
 - Do not map the whole pool page at once. Instead map the
   SGE_PAGE_SIZE-sized pieces individually, so they can be unmapped in
   the same manner.
 - What's mapped using dma_map_page() must be unmapped using
   dma_unmap_page().

Tested on ppc64.

Fixes: 4cace675 ("bnx2x: Alloc 4k fragment for each rx ring buffer element")
Signed-off-by: default avatarMichal Schmidt <mschmidt@redhat.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8031612d
    • Geert Uytterhoeven's avatar
      net: via: VIA_RHINE and VIA_VELOCITY should depend on HAS_DMA · 0f8b6cea
      Geert Uytterhoeven authored 
      If NO_DMA=y:

    ERROR: "dma_sync_single_for_cpu" [drivers/net/ethernet/via/via-rhine.ko] undefined!
    ERROR: "dma_set_mask" [drivers/net/ethernet/via/via-rhine.ko] undefined!
    ERROR: "dma_mapping_error" [drivers/net/ethernet/via/via-rhine.ko] undefined!
    ERROR: "dma_map_single" [drivers/net/ethernet/via/via-rhine.ko] undefined!
    ERROR: "dma_alloc_coherent" [drivers/net/ethernet/via/via-rhine.ko] undefined!
    ERROR: "dma_free_coherent" [drivers/net/ethernet/via/via-rhine.ko] undefined!
    ERROR: "dma_unmap_single" [drivers/net/ethernet/via/via-rhine.ko] undefined!
    ERROR: "dma_map_page" [drivers/net/ethernet/via/via-velocity.ko] undefined!
    ERROR: "dma_sync_single_for_cpu" [drivers/net/ethernet/via/via-velocity.ko] undefined!
    ERROR: "dma_free_coherent" [drivers/net/ethernet/via/via-velocity.ko] undefined!
    ERROR: "dma_unmap_single" [drivers/net/ethernet/via/via-velocity.ko] undefined!
    ERROR: "dma_map_single" [drivers/net/ethernet/via/via-velocity.ko] undefined!
    ERROR: "dma_alloc_coherent" [drivers/net/ethernet/via/via-velocity.ko] undefined!

Before, the symbols depended implicitly on HAS_DMA through PCI or
USE_OF.  Add explicit dependencies on HAS_DMA to fix this.

Fixes: b7d3282a ("net: via/Kconfig: replace USE_OF with OF_???")
Signed-off-by: default avatarGeert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      0f8b6cea
    • David S. Miller's avatar
      Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-queue · ebc03239
      David S. Miller authored 
      Jeff Kirsher says:

====================
Intel Wired LAN Driver Updates 2015-06-26

This series contains fixes for igb, e1000e and i40evf.

Todd disables IPv6 extension header processing due to a hardware errata
and bumps the driver version.

Yanir provides six fixes for e1000e.  First is a fix for a locking issue
where we were not always taking the pci_bus_sem semaphore all the time
when calling pci_disable_link_state_locked(), so fix the code to only call
pci_disable_link_state_locked() when the semaphore has been acquired,
otherwise call pci_disable_link_state().  A previous fix for i219 where
the hardware prevented ULP entry caused EEE in Sx not the be enabled, so
modify the code flow that allows both ULP and EEE in Sx.  Fix an issue
when running 10/100 full duplex on i219 where CRC errors were occurring
by increasing the IPG from 8 to 0xC as per the hardware developers.
Fix a data corruption issue found on some platforms by increasing the
minimum gap between the PHY FIFO read and write pointers.  Fix i219,
which does not require the K1 workaround for LPT devices.

Mitch provides a i40evf fix for a panic when changing MTU.  Down was
requesting queue disables, but then exited immediately without waiting
for the queues to actually be disabled.  This could allow any function
called after i40evf_down() to run immediately, including i40evf_up(),
and causes a memory leak.  Fixed the issue by removing the whole
reinit_locked function which allows for the driver to handle the state
changes by requesting reset from the periodic timer.  The second fix
resolves an issue where RSS was being configured as though it is using
the maximum number of queue.  This can cause the device to drop a lot
of receive traffic, as the packets get assigned to non-functional queues.
This is resolved by only configuring RSS with the number of active queues.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ebc03239
    • Shengzhou Liu's avatar
      net/phy: tune get_phy_c45_ids to support more c45 phy · da1da284
      Shengzhou Liu authored 
      As some C45 10G PHYs(e.g. Cortina CS4315/CS4340 PHY) have
zero Devices In package, current driver can't get correct
devices_in_package value by non-zero Devices In package.
so let's probe more with zero Devices In package to support
more C45 PHYs.
Signed-off-by: default avatarShengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      da1da284
    • Eric Dumazet's avatar
      bnx2x: fix lockdep splat · d53c66a5
      Eric Dumazet authored 
      Michel reported following lockdep splat

[   44.718117] INFO: trying to register non-static key.
[   44.723081] the code is fine but needs lockdep annotation.
[   44.728559] turning off the locking correctness validator.
[   44.734036] CPU: 8 PID: 5483 Comm: ethtool Not tainted 4.1.0
[   44.770289] Call Trace:
[   44.772741]  [<ffffffff816eb1cd>] dump_stack+0x4c/0x65
[   44.777879]  [<ffffffff8111d921>] ? console_unlock+0x1f1/0x510
[   44.783708]  [<ffffffff811121f5>] __lock_acquire+0x1d05/0x1f10
[   44.789538]  [<ffffffff8111370a>] ? mark_held_locks+0x6a/0x90
[   44.795276]  [<ffffffff81113835>] ? trace_hardirqs_on_caller+0x105/0x1d0
[   44.801967]  [<ffffffff8111390d>] ? trace_hardirqs_on+0xd/0x10
[   44.807793]  [<ffffffff811330fa>] ? hrtimer_try_to_cancel+0x4a/0x250
[   44.814142]  [<ffffffff81112ba6>] lock_acquire+0xb6/0x290
[   44.819537]  [<ffffffff810d6675>] ? flush_work+0x5/0x280
[   44.824844]  [<ffffffff810d66ad>] flush_work+0x3d/0x280
[   44.830061]  [<ffffffff810d6675>] ? flush_work+0x5/0x280
[   44.835366]  [<ffffffff816f3c43>] ? schedule_hrtimeout_range+0x13/0x20
[   44.841889]  [<ffffffff8112ec9b>] ? usleep_range+0x4b/0x50
[   44.847365]  [<ffffffff8111370a>] ? mark_held_locks+0x6a/0x90
[   44.853102]  [<ffffffff810d8585>] ? __cancel_work_timer+0x105/0x1c0
[   44.859359]  [<ffffffff81113835>] ? trace_hardirqs_on_caller+0x105/0x1d0
[   44.866045]  [<ffffffff810d851f>] __cancel_work_timer+0x9f/0x1c0
[   44.872048]  [<ffffffffa0010982>] ? bnx2x_func_stop+0x42/0x90 [bnx2x]
[   44.878481]  [<ffffffff810d8670>] cancel_work_sync+0x10/0x20
[   44.884134]  [<ffffffffa00259e5>] bnx2x_chip_cleanup+0x245/0x730 [bnx2x]
[   44.890829]  [<ffffffff8110ce02>] ? up+0x32/0x50
[   44.895439]  [<ffffffff811306b5>] ? del_timer_sync+0x5/0xd0
[   44.901005]  [<ffffffffa005596d>] bnx2x_nic_unload+0x20d/0x8e0 [bnx2x]
[   44.907527]  [<ffffffff811f1aef>] ? might_fault+0x5f/0xb0
[   44.912921]  [<ffffffffa005851c>] bnx2x_reload_if_running+0x2c/0x50 [bnx2x]
[   44.919879]  [<ffffffffa005a3c5>] bnx2x_set_ringparam+0x2b5/0x460 [bnx2x]
[   44.926664]  [<ffffffff815d498b>] dev_ethtool+0x55b/0x1c40
[   44.932148]  [<ffffffff815dfdc7>] ? rtnl_lock+0x17/0x20
[   44.937364]  [<ffffffff815e7f8b>] dev_ioctl+0x17b/0x630
[   44.942582]  [<ffffffff815abf8d>] sock_do_ioctl+0x5d/0x70
[   44.947972]  [<ffffffff815ac013>] sock_ioctl+0x73/0x280
[   44.953192]  [<ffffffff8124c1c8>] do_vfs_ioctl+0x88/0x5b0
[   44.958587]  [<ffffffff8110d0b3>] ? up_read+0x23/0x40
[   44.963631]  [<ffffffff812584cc>] ? __fget_light+0x6c/0xa0
[   44.969105]  [<ffffffff8124c781>] SyS_ioctl+0x91/0xb0
[   44.974149]  [<ffffffff816f4dd7>] system_call_fastpath+0x12/0x6f

As bnx2x_init_ptp() is only called if bp->flags contains PTP_SUPPORTED,
we also need to guard bnx2x_stop_ptp() with same condition, otherwise
ptp_task workqueue is not initialized and kernel barfs on
cancel_work_sync()

Fixes: eeed018c ("bnx2x: Add timestamping and PTP hardware clock support")
Reported-by: default avatarMichel Lespinasse <walken@google.com>
Signed-off-by: default avatarEric Dumazet <edumazet@google.com>
Cc: Michal Kalderon <Michal.Kalderon@qlogic.com>
Cc: Ariel Elior <Ariel.Elior@qlogic.com>
Cc: Yuval Mintz <Yuval.Mintz@qlogic.com>
Cc: David Decotigny <decot@google.com>
Acked-by: default avatarSony Chacko <sony.chacko@qlogic.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d53c66a5
    • Greg Ungerer's avatar
      net: fec: don't access RACC register when not available · 18803495
      Greg Ungerer authored 
      Not all silicon implementations of the Freescale FEC hardware module
have the RACC (Receive Accelerator Function) register, so we should not
be trying to access it on those that don't. Currently none of the ColdFire
based parts with a FEC have it.

Support for RACC was introduced by commit 4c09eed9 ("net: fec: Enable imx6
enet checksum acceleration"). A fix was introduced in commit d1391930
("net: fec: Fix build for MCF5272") that disables its use on the ColdFire
M5272 part, but it doesn't fix the general case of other ColdFire parts.

To fix we create a quirk flag, FEC_QUIRK_HAS_RACC, and check it before
working with the RACC register.
Signed-off-by: default avatarGreg Ungerer <gerg@uclinux.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      18803495
  3. 28 Jun, 2015 10 commits
  5. 26 Jun, 2015 10 commits
  7. 25 Jun, 2015 10 commits
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