- 21 Sep, 2016 7 commits
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Tomasz Figa authored
Since VOP does not have a hardware vblank count register, the ongoing commit might be racing with a requested vblank interrupt, which would increment the software vblank counter before the changes being committed actually happen. To avoid this, we can extend .atomic_flush(), so after it sets cfg_done bit, it polls the vblank interrupt bit until it's inactive to make sure that any old vblank interrupt gets to the handler and then uses synchronize_irq(vop->irq) to make sure the handler finishes running. The polling case should happen very rarely, but even if, the total wait time should be relatively low and in practice almost equal to the vop hardirq handler running time. Signed-off-by:Tomasz Figa <tfiga@chromium.org>
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Tomasz Figa authored
Current code implements prepare_fb and cleanup_fb callbacks only to grab/release fb references, which is already done by atomic framework when creating/destryoing plane state. Let's remove these unused bits. Signed-off-by: -
Tomasz Figa authored
The enable register only masks the raw status bits to signal CPU interrupt only for enabled interrupts. The status bits are activated regardless of the enable register. This means that we might have an old interrupt event queued, which we are not interested in. To avoid getting a spurious interrupt signalled, we have to clear the old bit before we update the enable register. Signed-off-by: -
Sean Paul authored
The ->set() callback would always be called when transitioning from FLUSH->DISABLE since we assign state to psr->state right above the skip condition. Reported-by:
Daniel Kurtz <djkurtz@chromium.org> Reviewed-by:
Sean Paul <seanpaul@chromium.org>
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Tomeu Vizoso authored
Remove code for reading the EDID and DPCD fields and use the helpers instead. Besides the obvious code reduction, other helpers are being added to the core that could be used in this driver and will be good to be able to use them instead of duplicating them. Signed-off-by:
Tomeu Vizoso <tomeu.vizoso@collabora.com> Tested-by:
Javier Martinez Canillas <javier@osg.samsung.com> Tested-by:
Yakir Yang <ykk@rock-chips.com> Signed-off-by:
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Sean Paul authored
3 seconds is a bit too conservative, drop this to 100ms for better power savings. Reviewed-by:
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Sean Paul authored
Instead of keying off vblank for psr, just flush every time we get an atomic update. This ensures that cursor updates will properly disable psr (without turning vblank on/off), and unifies the paths between fb_dirty and atomic psr enable/disable. Reviewed-by:
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- 20 Sep, 2016 1 commit
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http://git.agner.ch/git/linux-drm-fsl-dcuDave Airlie authored
fsl-dcu fixes. * 'for-next' of http://git.agner.ch/git/linux-drm-fsl-dcu: drm/fsl-dcu: disable clock on error path drm/fsl-dcu: use PTR_ERR_OR_ZERO() to simplify the code drm/fsl-dcu: fix endian issue when using clk_register_divider
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- 19 Sep, 2016 8 commits
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git://git.pengutronix.de/git/pza/linuxDave Airlie authored
imx-drm active plane reconfiguration, cleanup, FSU/IC/IRT/VDIC support - add active plane reconfiguration support (v4), use the atomic_disable callback - stop calling disable_plane manually in the plane destroy path - let mode cleanup destroy mode objects on driver unbind - drop deprecated load/unload drm_driver ops - add exclusive fence to plane state, so the atomic helper can wait on them, remove the open-coded fence wait from imx-drm - add low level deinterlacer (VDIC) support - add support for channel linking via the frame synchronisation unit (FSU) - add queued image conversion support for memory-to-memory scaling, rotation, and color space conversion, using IC and IRT. * tag 'imx-drm-next-2016-09-19' of git://git.pengutronix.de/git/pza/linux: gpu: ipu-v3: Add queued image conversion support gpu: ipu-v3: Add ipu_rot_mode_is_irt() gpu: ipu-v3: fix a possible NULL dereference drm/imx: parallel-display: detach bridge or panel on unbind drm/imx: imx-ldb: detach bridge on unbind drm/imx: imx-ldb: detach panel on unbind gpu: ipu-v3: Add FSU channel linking support gpu: ipu-v3: Add Video Deinterlacer unit drm/imx: add exclusive fence to plane state drm/imx: fold ipu_plane_disable into ipu_disable_plane drm/imx: don't destroy mode objects manually on driver unbind drm/imx: drop deprecated load/unload drm_driver ops drm/imx: don't call disable_plane in plane destroy path drm/imx: Add active plane reconfiguration support drm/imx: Use DRM_PLANE_COMMIT_NO_DISABLE_AFTER_MODESET flag drm/imx: ipuv3-crtc: Use the callback ->atomic_disable instead of ->disable gpu: ipu-v3: Do not wait for DMFC FIFO to clear when disabling DMFC channel
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git://anongit.freedesktop.org/drm-intelDave Airlie authored
- refactor the sseu code (Imre) - refine guc dmesg output (Dave Gordon) - more vgpu work - more skl wm fixes (Lyude) - refactor dpll code in prep for upfront link training (Jim Bride et al) - consolidate all platform feature checks into intel_device_info (Carlos Santa) - refactor elsp/execlist submission as prep for re-submission after hang recovery and eventually scheduling (Chris Wilson) - allow synchronous gpu reset handling, to remove tricky/impossible/fragile error recovery code (Chris Wilson) - prep work for nonblocking (execlist) submission, using fences to track depencies and drive elsp submission (Chris Wilson) - partial error recover/resubmission of non-guilty batches after hangs (Chris Wilson) - full dma-buf implicit fencing support (Chris Wilson) - dp link training fixes (Jim, Dhinkaran, Navare, ...) - obey dp branch device pixel rate/bpc/clock limits (Mika Kahola), needed for many vga dongles - bunch of small cleanups and polish all over, as usual [airlied: printing macros collided] * tag 'drm-intel-next-2016-09-19' of git://anongit.freedesktop.org/drm-intel: (163 commits) drm/i915: Update DRIVER_DATE to 20160919 drm: Fix DisplayPort branch device ID kernel-doc drm/i915: use NULL for NULL pointers drm/i915: do not use 'false' as a NULL pointer drm/i915: make intel_dp_compute_bpp static drm: Add DP branch device info on debugfs drm/i915: Update bits per component for display info drm/i915: Check pixel rate for DP to VGA dongle drm/i915: Read DP branch device SW revision drm/i915: Read DP branch device HW revision drm/i915: Cleanup DisplayPort AUX channel initialization drm: Read DP branch device id drm: Helper to read max bits per component drm: Helper to read max clock rate drm: Drop VGA from bpc definitions drm: Add missing DP downstream port types drm/i915: Add ddb size field to device info structure drm/i915/guc: general tidying up (submission) drm/i915/guc: general tidying up (loader) drm/i915: clarify PMINTRMSK/pm_intr_keep usage ...
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
More radeon and amdgpu changes for 4.9. Highlights: - Initial SI support for amdgpu (controlled by a Kconfig option) - misc ttm cleanups - runtimepm fixes - S3/S4 fixes - power improvements - lots of code cleanups and optimizations * 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux: (151 commits) drm/ttm: remove cpu_address member from ttm_tt drm/radeon/radeon_device: remove unused function drm/amdgpu: clean function declarations in amdgpu_ttm.c up drm/amdgpu: use the new ring ib and dma frame size callbacks (v2) drm/amdgpu/vce3: add ring callbacks for ib and dma frame size drm/amdgpu/vce2: add ring callbacks for ib and dma frame size drm/amdgpu/vce: add common ring callbacks for ib and dma frame size drm/amdgpu/uvd6: add ring callbacks for ib and dma frame size drm/amdgpu/uvd5: add ring callbacks for ib and dma frame size drm/amdgpu/uvd4.2: add ring callbacks for ib and dma frame size drm/amdgpu/sdma3: add ring callbacks for ib and dma frame size drm/amdgpu/sdma2.4: add ring callbacks for ib and dma frame size drm/amdgpu/cik_sdma: add ring callbacks for ib and dma frame size drm/amdgpu/si_dma: add ring callbacks for ib and dma frame size drm/amdgpu/gfx8: add ring callbacks for ib and dma frame size drm/amdgpu/gfx7: add ring callbacks for ib and dma frame size drm/amdgpu/gfx6: add ring callbacks for ib and dma frame size drm/amdgpu/ring: add an interface to get dma frame and ib size drm/amdgpu/sdma3: drop unused functions drm/amdgpu/gfx6: drop gds_switch callback ...
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Daniel Vetter authored
Signed-off-by:Daniel Vetter <daniel.vetter@ffwll.ch>
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git://anongit.freedesktop.org/drm-intelDave Airlie authored
Just random misc stuff that Sean/Sumit&Archit picked up while I relaxed. Well except for one commit: * tag 'topic/drm-misc-2016-09-19' of git://anongit.freedesktop.org/drm-intel: drm: Only use compat ioctl for addfb2 on X86/IA64 drm/qxl: squash lines for simple wrapper functions drm/bridge: analogix_dp: squash lines for simple wrapper functions drm/radeon: squash lines for simple wrapper functions drm/amdgpu: squash lines for simple wrapper functions dma-buf/sync-file: Avoid enable fence signaling if poll(.timeout=0) drm/fence: allow fence waiting to be interrupted by userspace drm: Move property validation to a helper, v2. drm/bridge: adv7511: add support for the 2nd chip
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Steve Longerbeam authored
This patch implements image conversion support using the IC tasks, with tiling to support scaling to and from images up to 4096x4096. Image rotation is also supported. Image conversion requests are added to a run queue under the IC tasks. The internal API is subsystem agnostic (no V4L2 dependency except for the use of V4L2 fourcc pixel formats). Callers prepare for image conversion by calling ipu_image_convert_prepare(), which initializes the parameters of the conversion. The caller passes in the ipu and IC task to use for the conversion, the input and output image formats, a rotation mode, and a completion callback and completion context pointer: struct ipu_image_converter_ctx * ipu_image_convert_prepare(struct ipu_soc *ipu, enum ipu_ic_task ic_task, struct ipu_image *in, struct ipu_image *out, enum ipu_rotate_mode rot_mode, ipu_image_converter_cb_t complete, void *complete_context); A new conversion context is created that is added to an IC task context queue. The caller is given the new conversion context, which can then be passed to the further APIs: int ipu_image_convert_queue(struct ipu_image_converter_run *run); This queues the given image conversion request run to a run queue, and starts the conversion immediately if the run queue is empty. Only the physaddr's of the input and output image buffers are needed, since the conversion context was created previously with ipu_image_convert_prepare(). When the conversion completes, the run pointer is returned to the completion callback. void ipu_image_convert_abort(struct ipu_image_converter_ctx *ctx); This will abort any active or pending conversions for this context. Any currently active or pending runs belonging to this context are returned via the completion callback with an error status. void ipu_image_convert_unprepare(struct ipu_image_converter_ctx *ctx); Unprepares the conversion context. Any active or pending runs will be aborted by calling ipu_image_convert_abort(). Signed-off-by:Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de>
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Steve Longerbeam authored
Add a macro that returns boolean true if the given ipu_rotate_mode requires the use of the Image Rotator. Signed-off-by:
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LABBE Corentin authored
of_match_device could return NULL, and so cause a NULL pointer dereference later. For fixing this problem, we use of_device_get_match_data(), this will simplify the code a little by using a standard function for getting the match data. Testing the return value of of_device_get_match_data is also necessary for avoiding a second NULL deref later on devtype. Signed-off-by:
LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by:
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- 16 Sep, 2016 24 commits
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Alexandre Courbot authored
Patch 3d50d4dc exposed the CPU address of DMA-allocated pages as returned by dma_alloc_coherent because Nouveau on Tegra needed it. This is not required anymore - as there were no other users for it, remove it and save some memory for everyone. Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alexandre Courbot <acourbot@nvidia.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Baoyou Xie authored
We get 2 warnings when building kernel with W=1: drivers/gpu/drm/radeon/radeon_device.c:1961:5: warning: no previous prototype for 'radeon_debugfs_init' [-Wmissing-prototypes] drivers/gpu/drm/radeon/radeon_device.c:1966:6: warning: no previous prototype for 'radeon_debugfs_cleanup' [-Wmissing-prototypes] In fact, these functions are dummy, but can be removed, so this patch removes them. Reviewed-by:
Baoyou Xie <baoyou.xie@linaro.org> Signed-off-by:
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Baoyou Xie authored
We get 2 warnings when building kernel with W=1: drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:985:5: warning: no previous prototype for 'amdgpu_ttm_init' [-Wmissing-prototypes] drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1092:6: warning: no previous prototype for 'amdgpu_ttm_fini' [-Wmissing-prototypes] In fact, both functions are declared in drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c, but should be declared in a header file, thus can be recognized in other file. So this patch moves the declarations into drivers/gpu/drm/amd/amdgpu/amdgpu.h. Reviewed-by:
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Alex Deucher authored
Use them to more accurately determine the ring size required for ib submission. v2: drop extra alignment Reviewed-by:
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Alex Deucher authored
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Alex Deucher authored
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Alex Deucher authored
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Alex Deucher authored
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Alex Deucher authored
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Alex Deucher authored
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Alex Deucher authored
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Alex Deucher authored
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Alex Deucher authored
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Alex Deucher authored
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Alex Deucher authored
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Alex Deucher authored
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Alex Deucher authored
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Alex Deucher authored
Used to properly calculate space on the ring for ib submissions. Reviewed-by:
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Alex Deucher authored
These are not used yet. Reviewed-by:
Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by:
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Alex Deucher authored
GDS works differently on GFX6, plus the callback was empty. Reviewed-by:
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Alex Deucher authored
Missing for gfx6. Reviewed-by:
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Alex Deucher authored
The compute functions just called the gfx functions, drop the wrapper. Reviewed-by:
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Alex Deucher authored
We switched the other asics, but missed this. Reviewed-by:
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Rex Zhu authored
partially revert commit I36f3c9e3a28cbf290652edfb6e19109da660c4f1 this will lead APU can't work. Signed-off-by:
Rex Zhu <Rex.Zhu@amd.com> Reviewed-by:
Huang Rui <ray.huang@amd.com> Signed-off-by:
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