- 18 Jan, 2023 40 commits
-
-
Abel Vesa authored
Add PCIe controllers and PHY nodes. Signed-off-by:
Abel Vesa <abel.vesa@linaro.org> Signed-off-by:
Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230118230526.1499328-2-abel.vesa@linaro.org
-
Neil Armstrong authored
Add the aDSP, cDSP and MPSS firmware and "Devicetree" firmware paths for the SM8550 MTP platform. Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by:
-
Neil Armstrong authored
This adds support for the aDSP, cDSP and MPSS Subsystems found in the SM8550 SoC. The aDSP, cDSP and MPSS needs: - smp2p nodes to get event back from the subsystems - remoteproc nodes with glink-edge subnodes providing all needed resources to start and run the subsystems In addition, the MPSS Subsystem needs a rmtfs_mem dedicated memory zone. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by:
-
Abel Vesa authored
Add the interconnect path to SCM dts node. Signed-off-by:
-
Neil Armstrong authored
Add nodes for the Visionox VTDR6130 found on the SM8550-MTP device. TLMM states are also added for the Panel reset GPIO and Tearing Effect signal for when the panel is running in DSI Command mode. Signed-off-by:
-
Neil Armstrong authored
Enable MDSS/DPU/DSI0 on SM8550-MTP device. Signed-off-by:
-
Neil Armstrong authored
Add devices tree nodes describing display hardware on SM8550: - Display Clock Controller - MDSS - MDP - two DSI controllers and DSI PHYs This does not provide support for DP controllers present on the SM8550. Reviewed-by:
-
Bjorn Andersson authored
Merge the DT binding in order to get the dispcc include file.
-
Neil Armstrong authored
Document device tree bindings for display clock controller for Qualcomm SM8550 SoC. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
-
Pavankumar Kondeti authored
Currently, available frequencies for all CPUs are appearing as 2x of the actual frequencies. Use xo clock source as bi_tcxo in the cpufreq-hw node to fix this. Signed-off-by:
Pavankumar Kondeti <quic_pkondeti@quicinc.com> Tested-by:
-
Markuss Broks authored
The MUIC installed is a part of SM5703 MFD, and it seems to work the same as the SM5502 MUIC unit. Signed-off-by:
Markuss Broks <markuss.broks@gmail.com> [Apply for msm8916-samsung-j5x] Signed-off-by:
Lin, Meng-Bo <linmengbo0689@protonmail.com> Signed-off-by:
-
Lin, Meng-Bo authored
Samsung Galaxy J5 2015 and 2016 have a Hall sensor on GPIO pin 52. Add GPIO Hall sensor for them. Signed-off-by:
-
Lin, Meng-Bo authored
After moving msm8916-samsung-j5.dts to msm8916-samsung-j5-common.dtsi, Add new J5 2016 device tree. [Add j5x device tree] Co-developed-by:
Josef W Menad <JosefWMenad@protonmail.ch> Signed-off-by:
Stephan Gerhold <stephan@gerhold.net> Signed-off-by:
-
Lin, Meng-Bo authored
The smartphones below are using the MSM8916 SoC, which are released in 2015-2016: Samsung Galaxy J5 2015 (SM-J500*) Samsung Galaxy J5 2016 (SM-J510*) Move msm8916-samsung-j5.dts to msm8916-samsung-j5-common.dtsi, and add a common device tree for with initial support for: - GPIO keys - SDHCI (internal and external storage) - USB Device Mode - UART (on USB connector via the SM5703 MUIC) - WCNSS (WiFi/BT) - Regulators The two devices (all other variants of J5 released in 2015 and J5X released in 2016) are very similar, with some differences in display and GPIO pins. The common parts are shared in msm8916-samsung-j5-common.dtsi to reduce duplication. This patch rewrites J5 2015 devices, later patches will add support for other models. Signed-off-by:
-
Luca Weiss authored
IPA is used for mobile data. Enable it. Signed-off-by:
Luca Weiss <luca.weiss@fairphone.com> Signed-off-by:
Alex Elder <elder@linaro.org> Signed-off-by:
-
Luca Weiss authored
IPA is used for mobile data. Add a node describing it. Signed-off-by:
-
Konrad Dybcio authored
Add the CPU OPP tables including core frequency and L3 bus frequency. The L3 throughput values were chosen by studying the frequencies available in HW LUT and picking the highest one that's less than the CPU frequency. DDR clock rates come from the vendor kernel. Available values from the HW LUT: 300000000 556800000 652800000 806400000 844800000 940800000 1132800000 1209600000 1286400000 1401600000 1459200000 Signed-off-by:
-
Konrad Dybcio authored
Enable the OSM block responsible for scaling the L3 cache. Signed-off-by:
-
Dmitry Baryshkov authored
Specify pre-parsed per-sensor calibration nvmem cells in the tsens device node rather than parsing the whole data blob in the driver. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
-
Dmitry Baryshkov authored
Specify pre-parsed per-sensor calibration nvmem cells in the tsens device node rather than parsing the whole data blob in the driver. Signed-off-by:
-
Dmitry Baryshkov authored
Specify pre-parsed per-sensor calibration nvmem cells in the tsens device node rather than parsing the whole data blob in the driver. Signed-off-by:
-
Dmitry Baryshkov authored
The slope values used during tsens calibration differ between msm8976 and msm8956 SoCs. Use SoC-specific compat value for the msm8956 SoC. Fixes: 0484d3ce ("arm64: dts: qcom: Add DTS for MSM8976 and MSM8956 SoCs") Reviewed-by:
-
Alex Elder authored
Depending on the platform, either the modem or the AP must load GSI firmware for IPA before it can be used. To date, this has been indicated by the presence or absence of a "modem-init" property. That mechanism has been deprecated. Instead, we indicate how GSI firmware should be loaded by the value of the "qcom,gsi-loader" property. Update all arm64 platforms that use IPA to use the "qcom,gsi-loader" property to specify how the GSI firmware is loaded. Update the affected nodes so the status property is last. Signed-off-by:
-
Krzysztof Kozlowski authored
Bindings expect each pin config to come with a "function" property: sc7280-crd-r3.dtb: pinctrl@f100000: amp-en-state: 'oneOf' conditional failed, one must be fixed: 'function' is a required property 'bias-pull-down', 'drive-strength', 'pins' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+' Signed-off-by: -
Krzysztof Kozlowski authored
Correct typo in motor pinctrl node name: msm8916-samsung-a5u-eur.dtb: pinctrl@1000000: 'motor-en-default-stae' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+' Signed-off-by:
-
Petr Vorel authored
It's disabled on downstream [1] thus not shown on downstream dmesg. Removing it fixes warnings on v6.1: [ 0.000000] OF: reserved mem: OVERLAP DETECTED! [ 0.000000] dfps_data_mem@3400000 (0x0000000003400000--0x0000000003401000) overlaps with memory@3400000 (0x0000000003400000--0x0000000004600000) [1] https://android.googlesource.com/kernel/msm.git/+/android-7.0.0_r0.17/arch/arm64/boot/dts/lge/msm8992-bullhead.dtsi#137 Fixes: 976d321f ("arm64: dts: qcom: msm8992: Make the DT an overlay on top of 8994") Signed-off-by:
Petr Vorel <petr.vorel@gmail.com> Reviewed-by:
-
Petr Vorel authored
Original google firmware reports 12 MiB: [ 0.000000] cma: Found cont_splash_mem@0, memory base 0x0000000003400000, size 12 MiB, limit 0xffffffffffffffff which is actually 12*1024*1024 = 0xc00000. This matches the aosp source [1]: &cont_splash_mem { reg = <0 0x03400000 0 0xc00000>; }; Fixes: 3cb6a271 ("arm64: dts: qcom: msm8992-bullhead: Fix cont_splash_mem mapping") Fixes: 976d321f ("arm64: dts: qcom: msm8992: Make the DT an overlay on top of 8994") [1] https://android.googlesource.com/kernel/msm.git/+/android-7.0.0_r0.17/arch/arm64/boot/dts/lge/msm8992-bullhead.dtsi#141Signed-off-by: -
Bjorn Andersson authored
Qualcomm ARM64 DTS fixes for 6.2 The cluster idle issue was resolved on SM8250, so the change disabling the cluster state is being reverted. Issues where identified with the QMP PHY binding, that would prevent enablement of Displayport and it was decided not to support the old binding for the recently introduced SC8280XP, which broke USB. This adjusts the USB PHY nodes to the new binding. The reset signal for the first QMP PHY is corrected as well. The reserved memory map is updated on Xiaomi Mi 4C and Huawei Nexus 6P, to avoid instabilities caused by use of protected memory regions. The compatible for the MSM8992 TCSR mutex is corrected as well. Lastly SDHCI interconnects on SM8350 are corrected to match the providers #interconnect-cells.
-
Robert Foss authored
Use two interconnect cells in order to optionally support a path tag. Signed-off-by:
Robert Foss <robert.foss@linaro.org> Reviewed-by:
-
Robert Foss authored
Add GPIO line names as described by the sm8350-hdk schematic. Signed-off-by:
-
Bjorn Andersson authored
While booting the CRD, a series of CMA allocation errors can be seen in the kernel log: cma: cma_alloc: reserved: alloc failed, req-size: 128 pages, ret: -12 Growing the CMA region and querying /proc/meminfo indicates that a newly booted system (currently) uses 64MB CMA. Define a memory region sufficiently large for the current use cases, to avoid forcing users to add this themselves, through command line parameters etc. While fixing the CRD define the same region for the X13s. Tested-by: Andrew Halaney <ahalaney@redhat.com> # sc8280xp-lenovo-thinkpad-x13s Reviewed-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by:
-
Judy Hsiao authored
1. Add DisplayPort sound node and lpass_cpu node. 2. Adjust the dai-link order to make the order to be consistent with sc7280-herobrine-audio-rt5682-3mic.dtsi. Signed-off-by:
Judy Hsiao <judyhsiao@chromium.org> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
-
Johan Hovold authored
Clean up the wcd938x codec node somewhat by adding newline separators, reordering properties and renaming it 'audio-codec'. Signed-off-by:
Johan Hovold <johan+linaro@kernel.org> Reviewed-by:
-
Johan Hovold authored
The wcd938x codec is not a memory-mapped device and does not belong under the soc node. Move the node to the root node to avoid DT validation failures. While at it, clean up the node somewhat by reordering properties and renaming it 'audio-codec'. Signed-off-by:
-
Johan Hovold authored
The wcd938x codec is not a memory-mapped device and does not belong under the soc node. Move the node to the root node to avoid DT validation failures. While at it, clean up the node somewhat by adding newline separators, reordering properties and renaming it 'audio-codec'. Reviewed-by:
-
Johan Hovold authored
Move the vamacro node to restore the alphabetical sort order. While at it, add some newline separators to improve readability. Signed-off-by:
-
Johan Hovold authored
The sound nodes in the SoC dtsi should be disabled by default. Note that the lpass-tlmm and macro blocks depend on having the board dts enable the adsp and specifying an appropriate firmware to enable the q6prm clock controller. Reviewed-by:
-
Krzysztof Kozlowski authored
tx-macro does not have children and does not allow address/size cells: sc8280xp-crd.dtb: txmacro@3220000: Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected) Signed-off-by: -
Krzysztof Kozlowski authored
There is no "clock-controller" property: sa8295p-adp.dtb: service@2: clock-controller: 'clock-controller' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/sound/qcom,q6prm.yaml Signed-off-by: -
Krzysztof Kozlowski authored
Neither qcom,sm8250-lpass-rx-macro bindings nor the driver use "clock-frequency" property. sm8250-mtp.dtb: rxmacro@3200000: Unevaluated properties are not allowed ('clock-frequency' was unexpected) Signed-off-by:
-
