- 25 May, 2020 3 commits
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Arnd Bergmann authored
Merge tag 'omap-for-v5.8/timer-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc System timer changes for omaps for v5.8 merge window This series of changes finally gets the legacy omap dual-mode timer and 32k counter system timer updated to use drivers/clocksource and device tree data. And we can now remove the unused legacy platform data. These changes are based on an immutable clocksource branch set up by Daniel Lezcano. * tag 'omap-for-v5.8/timer-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: bus: ti-sysc: Timers no longer need legacy quirk handling ARM: OMAP2+: Drop old timer code for dmtimer and 32k counter ARM: dts: Configure system timers for omap2 ARM: dts: Configure system timers for ti81xx ARM: dts: Configure system timers for omap3 ARM: dts: Configure system timers for omap5 and dra7 ARM: dts: Configure system timers for omap4 ARM: dts: Configure system timers for am437x ARM: dts: Configure system timers for am335x ARM: OMAP2+: Add omap_init_time_of() bus: ti-sysc: Ignore timer12 on secure omap3 clk: ti: dm816: enable sysclk6_ck on init clocksource/drivers/timer-ti-dm: Fix warning for set but not used clocksource/drivers/timer-ti-dm: Add clockevent and clocksource support clocksource/drivers/timer-ti-32k: Add support for initializing directly Link: https://lore.kernel.org/r/pull-1590169577-735045@atomide.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'imx-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc i.MX SoC changes for 5.8: - Add soc device support for Vybrid/VF platform. - Move the i.MX soc device registration code from mach-imx to drivers/soc/imx for possible future consolidation with i.MX8 code. - A small fixup to make pcm970_sja1000_platform_data static. * tag 'imx-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx: move cpu code to drivers/soc/imx ARM: imx: move cpu definitions into a header ARM: imx: use device_initcall for imx_soc_device_init ARM: imx: pcm037: make pcm970_sja1000_platform_data static ARM: vf610: report soc info via soc device Link: https://lore.kernel.org/r/20200523032516.11016-2-shawnguo@kernel.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Wei Yongjun authored
In case of error, the function of_find_matching_node() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Link: https://lore.kernel.org/r/20200525091634.8274-1-linus.walleij@linaro.org Fixes: ccea5e8a ("bus: Add driver for Integrator/AP logic modules") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Link: https://lore.kernel.org/r/20200520032150.165388-1-weiyongjun1@huawei.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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- 20 May, 2020 4 commits
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Peng Fan authored
Move the soc device register code to drivers/soc/imx to align with i.MX8. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Peng Fan authored
The soc device register code will be moved to drivers/soc/imx/, the code needs the cpu type definitions. So let's move the cpu type definitions to a header. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Peng Fan authored
This is preparation to move imx_soc_device_init to drivers/soc/imx/ There is no reason to must put dt devices under /sys/devices/soc0, they could also be under /sys/devices/platform, so we could pass NULL as parent when calling of_platform_default_populate. Following soc-imx8.c soc-imx-scu.c using device_initcall, need to change return type to int type for imx_soc_device_init. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Ma Feng authored
Fix sparse warning: arch/arm/mach-imx/mach-pcm037.c:407:30: warning: symbol 'pcm970_sja1000_platform_data' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Ma Feng <mafeng.ma@huawei.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 19 May, 2020 13 commits
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Tony Lindgren authored
As timers no longer need legacy quirk handling, let's move them to the CONFIG_DEBUG section to make it easier to see which drivers still need more work. Let's also add detection for few more older timer revisions while at it as that makes CONFIG_DEBUG output easier to read with proper names. Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
With dmtimer and 32k counter being initialized based on devicetree data, we can just drop the old timer code. This still leaves the omap5 and dra7 realtime_counter_init() that depend on the smc calls and control module platform code for the dra7 quirk init. Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Let's also update the dts file to use #include while at it. Cc: devicetree@vger.kernel.org Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Note that for ti81xx, also timer1 is of type 2 unlike on am335x where timer1 is type1 while the rest of the timers are type 2. Cc: devicetree@vger.kernel.org Cc: Brian Hutchinson <b.hutchman@gmail.com> Cc: Graeme Smecher <gsmecher@threespeedlogic.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Let's also update the dts file to use #include while at it. Cc: devicetree@vger.kernel.org Cc: Adam Ford <aford173@gmail.com> Cc: Andreas Kemnade <andreas@kemnade.info> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: "H. Nikolaus Schaller" <hns@goldelico.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Note that similar to omap_init_time_of(), we now need to call omap_clk_init() also from omap5_realtime_timer_init(). Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
This allows us to move the SoCs to probe system timers one SoC at at time. As arch/arm/mach-omap2/timer.c will be eventually gone, let's just add omap_init_time_of() to board-generic.c directly. Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
Some early omap3 boards use timer12 for system timer, but for secure SoCs like on n900 it's not accessible. Likely we will be configuring unavailable devices for other SoCs too based on runtime SoC detection, so let's use a switch to start with. Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
We need sysclk6_ck enabled early as it is needed by l4_ls and system timers early on boot. This removes the dependency of system timers to the interconnect related code that can be then probed later on when suitable at module_init time. Cc: linux-clk@vger.kernel.org Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Rob Herring <robh@kernel.org> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
We can get a warning for dmtimer_clocksource_init() with 'pa' set but not used. This was used in the earlier revisions of the code but no longer needed, so let's remove the unused pa and of_translate_address(). Let's also do it for dmtimer_clockevent_init() that has a similar issue. Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200519155157.12804-1-tony@atomide.com
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- 18 May, 2020 2 commits
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Tony Lindgren authored
We can move the TI dmtimer clockevent and clocksource to live under drivers/clocksource if we rely only on the clock framework, and handle the module configuration directly in the clocksource driver based on the device tree data. This removes the early dependency with system timers to the interconnect related code, and we can probe pretty much everything else later on at the module_init level. Let's first add a new driver for timer-ti-dm-systimer based on existing arch/arm/mach-omap2/timer.c. Then let's start moving SoCs to probe with device tree data while still keeping the old timer.c. And eventually we can just drop the old timer.c. Let's take the opportunity to switch to use readl/writel as pointed out by Daniel Lezcano <daniel.lezcano@linaro.org>. This allows further clean-up of the timer-ti-dm code the a lot of the shared helpers can just become static to the non-syster related code. Note the boards can optionally configure different timer source clocks if needed with assigned-clocks and assigned-clock-parents. Cc: linux-kernel@vger.kernel.org Cc: linux-omap@vger.kernel.org Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200507172330.18679-3-tony@atomide.com
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Tony Lindgren authored
Let's allow probing the 32k counter directly based on devicetree data to prepare for dropping the related legacy platform code. Let's only do this if the parent node is compatible with ti-sysc to make sure we have the related devicetree data available. Let's also show the 32k counter information before registering the clocksource, now we see it after the clocksource information which is a bit confusing. Cc: linux-kernel@vger.kernel.org Cc: linux-omap@vger.kernel.org Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Rob Herring <robh@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200507172330.18679-2-tony@atomide.com
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- 15 May, 2020 18 commits
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Geert Uytterhoeven authored
Support for Altera SOCFPGA systems depends on ARCH_MULTI_V7, and thus on ARCH_MULTIPLATFORM. As the latter selects PCI_DOMAINS_GENERIC, there is no need for ARCH_SOCFPGA to select PCI_DOMAINS_GENERIC. Link: https://lore.kernel.org/r/20200505150722.1575-16-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Dinh Nguyen <dinguyen@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Geert Uytterhoeven authored
Support for CSR SiRF SoCs depends on ARCH_MULTI_V7. As the latter selects HAVE_SMP, there is no need for ARCH_ATLAS7 to select HAVE_SMP. Link: https://lore.kernel.org/r/20200505150722.1575-14-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Barry Song <baohua@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Geert Uytterhoeven authored
Support for Marvell Armada 375, 380, 385, and 39x SoCs depends on ARCH_MULTI_V7. As the latter selects HAVE_SMP, there is no need for MACH_ARMADA_375, MACH_ARMADA_38X, and MACH_ARMADA_39X to select HAVE_SMP. Link: https://lore.kernel.org/r/20200505150722.1575-12-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@bootlin.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Geert Uytterhoeven authored
Support for Marvell MMP ARMv5 platforms depends on ARCH_MULTI_V5, and thus on ARCH_MULTIPLATFORM. As the latter selects COMMON_CLK, there is no need for MACH_MMP_DT to select COMMON_CLK. Link: https://lore.kernel.org/r/20200505150722.1575-11-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Geert Uytterhoeven authored
Support for TI DaVinci SoCs depends on ARCH_MULTI_V5, and thus on ARCH_MULTIPLATFORM. As the latter selects TIMER_OF, there is no need for MACH_DA8XX_DT to select TIMER_OF. Link: https://lore.kernel.org/r/20200505150722.1575-9-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Geert Uytterhoeven authored
Support for Cirrus Logic EP721x/EP731x-based SoCs depends on ARCH_MULTI_V7, and thus on ARCH_MULTIPLATFORM. As the latter selects AUTO_ZRELADDR, TIMER_OF, COMMON_CLK, GENERIC_CLOCKEVENTS, and USE_OF, there is no need for ARCH_CLPS711X to select any of them. Link: https://lore.kernel.org/r/20200505150722.1575-8-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Alexander Shiyan <shc_work@mail.ru> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Geert Uytterhoeven authored
Support for Marvell Berlin SoCs depends on ARCH_MULTI_V7. As the latter selects HAVE_SMP, there is no need for MACH_BERLIN_BG2 to select HAVE_SMP. Link: https://lore.kernel.org/r/20200505150722.1575-7-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Geert Uytterhoeven authored
Support for the 6th generation Aspeed SoCs depends on ARCH_MULTI_V7. As the latter selects HAVE_SMP, there is no need for MACH_ASPEED_G6 to select HAVE_SMP. Link: https://lore.kernel.org/r/20200505150722.1575-6-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Joel Stanley <joel@jms.id.au> Cc: Andrew Jeffery <andrew@aj.id.au> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Geert Uytterhoeven authored
Support for the Alphascale ASM9260 platform depends on ARCH_MULTI_V5, and thus on ARCH_MULTIPLATFORM. As the latter selects GENERIC_CLOCKEVENTS, there is no need for MACH_ASM9260 to select GENERIC_CLOCKEVENTS. Link: https://lore.kernel.org/r/20200505150722.1575-5-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Oleksij Rempel <linux@rempel-privat.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Geert Uytterhoeven authored
Support for Annapurna Labs Alpine platforms depends on ARCH_MULTI_V7. As the latter selects HAVE_SMP, there is no need for ARCH_ALPINE to select HAVE_SMP. Link: https://lore.kernel.org/r/20200505150722.1575-4-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Tsahee Zidenberg <tsahee@annapurnalabs.com> Cc: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Geert Uytterhoeven authored
Support for Actions Semi SoCs depends on ARCH_MULTI_V7, and thus on ARCH_MULTIPLATFORM. As the latter selects COMMON_CLK, there is no need for ARCH_ACTIONS to select COMMON_CLK. Link: https://lore.kernel.org/r/20200505150722.1575-3-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Andreas Färber <afaerber@suse.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Geert Uytterhoeven authored
The ARM Architected timer is available on ARMv7 SoCs only. As both ARCH_MULTIPLATFORM and ARM_SINGLE_ARMV7M select GENERIC_CLOCKEVENTS, there is no need for HAVE_ARM_ARCH_TIMER to select GENERIC_CLOCKEVENTS. Link: https://lore.kernel.org/r/20200505150722.1575-2-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'tegra-for-5.8-arm-core' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc ARM: tegra: Core changes for v5.8-rc1 This contains core changes needed for the CPU frequency scaling and CPU idle drivers on Tegra20 and Tegra30. * tag 'tegra-for-5.8-arm-core' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: Create tegra20-cpufreq platform device on Tegra30 ARM: tegra: Don't enable PLLX while resuming from LP1 on Tegra30 ARM: tegra: Switch CPU to PLLP on resume from LP1 on Tegra30/114/124 ARM: tegra: Correct PL310 Auxiliary Control Register initialization ARM: tegra: Do not fully reinitialize L2 on resume ARM: tegra: Initialize r0 register for firmware wake-up firmware: tf: Different way of L2 cache enabling after LP2 suspend firmware: tegra: Make BPMP a regular driver Link: https://lore.kernel.org/r/20200515145311.1580134-10-thierry.reding@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'renesas-arm-soc-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/soc Renesas ARM SoC updates for v5.8 (take two) - Add debug-ll support for RZ/G1H. * tag 'renesas-arm-soc-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: ARM: debug-ll: Add support for r8a7742 Link: https://lore.kernel.org/r/20200515100547.14671-4-geert+renesas@glider.beSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'vexpress-modules-for-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux into arm/soc VExpress modularization This series enables building various Versatile Express platform drivers as modules. The primary target is the Fast Model FVP which is supported in Android. As Android is moving towards their GKI, or generic kernel, the hardware support has to be in modules. Currently ARCH_VEXPRESS enables several built-in only drivers. Some of these are needed, but some are only needed for older 32-bit VExpress platforms and can just be disabled. * tag 'vexpress-modules-for-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: ARM: vexpress: Don't select VEXPRESS_CONFIG bus: vexpress-config: Support building as module vexpress: Move setting master site to vexpress-config bus bus: vexpress-config: simplify config bus probing bus: vexpress-config: Merge vexpress-syscfg into vexpress-config mfd: vexpress-sysreg: Support building as a module mfd: vexpress-sysreg: Use devres API variants mfd: vexpress-sysreg: Drop unused syscon child devices mfd: vexpress-sysreg: Drop selecting CONFIG_CLKSRC_MMIO clk: vexpress-osc: Support building as a module clk: vexpress-osc: Use the devres clock API variants clk: versatile: Only enable SP810 on 32-bit by default clk: versatile: Rework kconfig structure amba: Retry adding deferred devices at late_initcall arm64: vexpress: Don't select CONFIG_POWER_RESET_VEXPRESS ARM: vexpress: Move vexpress_flags_set() into arch code Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'omap-for-v5.8/soc-signed-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc SoC changes for omaps for v5.8 merge window SoC related changes for omaps: - Use ard instead of adrl for sleep34xx.S for clang - Stop selecting MIGHT_HAVE_CACHE_L2X0, it's already selected by ARCH_MULTI_V6_V7 - Make omap5_erratum_workaround_801819() and am43xx_get_rtc_base_addr() static * tag 'omap-for-v5.8/soc-signed-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: pm33xx-core: Make am43xx_get_rtc_base_addr static ARM: omap2: make omap5_erratum_workaround_801819 static ARM: omap2plus: Drop unneeded select of MIGHT_HAVE_CACHE_L2X0 ARM: OMAP2+: drop unnecessary adrl Link: https://lore.kernel.org/r/pull-1589387719-605999@atomide.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'samsung-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc Samsung mach/soc changes for v5.8 Cleanups and code simplifying. * tag 'samsung-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: samsung: Use devm_platform_ioremap_resource() to simplify code ARM: samsung: Omit superfluous error message in s3c_adc_probe() ARM: s3c64xx: convert to use i2c_new_client_device() Link: https://lore.kernel.org/r/20200512122922.5700-3-krzk@kernel.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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https://github.com/Broadcom/stblinuxArnd Bergmann authored
This pull request contains Broadcom ARM-based machine/SoC changes for v5.8, please pull the following: - Florian removes a print of a kernel virtual address in the Brahma-B15 read-ahead cache driver * tag 'arm-soc/for-5.8/soc' of https://github.com/Broadcom/stblinux: ARM: mm: Remove virtual address print from B15 RAC driver Link: https://lore.kernel.org/r/20200511210522.28243-4-f.fainelli@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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