This patch adds iommus properties to the R-Car Gen3 SoCs' SDHI/MMC
nodes.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1570437605-15804-1-git-send-email-yoshihiro.shimoda.uh@renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add support for the Interrupt Controller for External Devices
(INTC-EX) on RZ/G2N.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1570531132-21856-11-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add usb3.0 phy, host and function device nodes on RZ/G2N SoC dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1570531132-21856-10-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add usb dmac and hsusb device nodes to the RZ/G2N SoC dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1570531132-21856-9-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add USB2.0 phy and host (EHCI/OHCI) device nodes on RZ/G2N SoC dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1570531132-21856-8-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Based on a similar patch of the R8A7796 device tree
by Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1570200761-884-2-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

The plan for the HiHope RZ/G2N board is to enable pciec0 by default,
and use pciec1 physical interface for SATA (as SATA and PCIE1 share
the same physical interface), therefore move pciec1 enabling away
from hihope-rzg2-ex.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1570178133-21532-8-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds PCIe{0,1} device nodes for R8A774B1 SoC.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Link: https://lore.kernel.org/r/1570178133-21532-7-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add the device nodes for all MSIOF SPI controllers on the RZ/G2N
SoC (a.k.a. r8a774b1).
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1570178133-21532-6-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Populate the device tree node for the Watchdog Timer (RWDT)
controller on the Renesas RZ/G2N (r8a774b1) SoC.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1570178133-21532-5-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds support for Advantech idk-1110wr LVDS panel.
The HiHope RZ/G2[MN] is advertised as compatible with panel
idk-1110wr from Advantech, however the panel isn't sold alongside
the board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-10-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds LVDS support for RZ/G2[MN] boards.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-9-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch enables backlight support.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-8-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds PWM device nodes to r8a774b1 SoC DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-7-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

The r8a774b1 has a single FDP1 instance.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-6-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add display clock properties for the HiHope RZ/G2N board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-5-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add the HDMI encoder to the R8A774B1 DT in disabled state.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-4-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add the DU device to r8a774b1 SoC DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-3-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

RZ/G2N board is pin compatible with RZ/G2M board. However on the SoC
side RZ/G2N uses DU3 where as RZ/G2M uses DU2 for the DPAD. In order to
reuse the common dtsi for both the boards, it is required to move du clock
properties from common dtsi to board specific dts.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-2-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add IPMMU-DS0 to the Ethernet-AVB device node.

Based on work by Magnus Damm for the r8a7795.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569313375-53428-8-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Hook up r8a774b1 DMAC nodes to the IPMMUs. In particular SYS-DMAC0
gets tied to IPMMU-DS0, and SYS-DMAC1 and SYS-DMAC2 get tied to IPMMU-DS1.

Based on work for the r8a7796 by Magnus Damm.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569313375-53428-7-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

The r8a774b1 has 4 VSP instances.

Based on the work done for r8a77965 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569313375-53428-6-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add FCPF and FCPV instances to the r8a774b1 dtsi.

Based on the work done for r8a77965 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569313375-53428-5-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add RZ/G2N (R8A774B1) IPMMU nodes.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569313375-53428-4-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add the I2C[0-6] and IIC Bus Interface for DVFS (IIC for DVFS)
devices nodes to the r8a774b1 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569313375-53428-3-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add SDHI support for the r8a774b1 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569313375-53428-2-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds TMU[01234] device tree nodes to the
r8a774b1 SoC specific DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569250648-33857-5-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds the CMT[0123] device tree nodes to the
r8a774b1 SoC specific DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569250648-33857-4-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add thermal support for R8A774B1 (RZ/G2N) SoC.

Based on the work done for r8a77965 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569250648-33857-3-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds OPPs table for CA57{0,1} cpu devices.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569250648-33857-2-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

The HiHope RZ/G2N sub board sits below the HiHope RZ/G2N main board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569831527-1250-6-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds the SoC specific part of the Ethernet AVB
device tree node.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569831527-1250-5-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add GPIO device nodes to the DT of the r8a774b1 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569831527-1250-4-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add the device nodes for RZ/G2N SCIF and HSCIF serial ports,
including clocks, power domains and DMAs.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569831527-1250-3-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add sys-dmac[0-2] device nodes for RZ/G2N (R8A774B1) SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569831527-1250-2-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch enables HS400 mode on HiHope RZ/G2N board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569837778-55874-1-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch removes audio port node from SoC device tree and
fixes the below dtb warning

    Warning (unit_address_vs_reg): /soc/sound@ec500000/ports/port@0: node has a unit name, but no reg property

Fixes: e2f04248 ("arm64: dts: renesas: r8a774a1: Add audio support")
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1570200761-884-1-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Basic support for the HiHope RZ/G2N main board:
  - Memory,
  - Main crystal,
  - Serial console
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1568725530-55241-5-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Basic support for the RZ/G2N (R8A774B1) SoC. Added placeholders
to avoid compilation error with the common platform code.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569589584-56917-1-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Describe the dynamic power coefficient of A53 CPUs.

Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> and others.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Link: https://lore.kernel.org/r/1568364608-46548-2-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>