- 08 Feb, 2022 1 commit
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Dan Carpenter authored
A zero value for spi->max_speed_hz or spidev->speed_hz does not make sense and trying to set that can lead to divide by zero crashes in a some of the drivers. drivers/spi/spi-s3c64xx.c:874 s3c64xx_spi_setup() error: potential divide by zero bug '/ spi->max_speed_hz'. drivers/spi/spi-fsl-dspi.c:613 hz_to_spi_baud() error: potential divide by zero bug '/ speed_hz'. drivers/spi/spi-xlp.c:146 xlp_spi_setup() error: potential divide by zero bug '/ (spi->max_speed_hz)'. drivers/spi/spi-orion.c:162 orion_spi_baudrate_set() error: potential divide by zero bug '/ speed'. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20220125065202.GA8807@kiliSigned-off-by: Mark Brown <broonie@kernel.org>
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- 03 Feb, 2022 1 commit
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David Heidelberg authored
Added missing description type. Fixes warning: Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml: properties:reg:items: 'anyOf' conditional failed Fixes: a708078e ("spi: Add Sunplus SP7021 schema") Signed-off-by: David Heidelberg <david@ixit.cz> Link: https://lore.kernel.org/r/20220202104715.27839-1-david@ixit.czSigned-off-by: Mark Brown <broonie@kernel.org>
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- 02 Feb, 2022 3 commits
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Linus Walleij authored
My patch created compilation bugs in the MPC512x-PSC driver. Fix them up. Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: linuxppc-dev@lists.ozlabs.org Reported-by: kernel test robot <lkp@intel.com> Fixes: 2818824c (" spi: mpc512x-psc: Convert to use GPIO descriptors") Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220201234535.569973-1-linus.walleij@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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Rafael J. Wysocki authored
Replace acpi_bus_get_device() that is going to be dropped with acpi_fetch_acpi_dev(). No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://lore.kernel.org/r/2231987.ElGaqSPkdT@kreacherSigned-off-by: Mark Brown <broonie@kernel.org>
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Mark Brown authored
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- 01 Feb, 2022 12 commits
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Mark Brown authored
Merge series from Stefan Binding <sbinding@opensource.cirrus.com>: This series enhances the helpers for ACPI resources to cope with multiple resources and exports them for use in the x86 platform code's multi-instantiate driver.
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Stefan Binding authored
Some ACPI nodes may have more than one Spi Resource. To be able to handle these case, its necessary to have a way of counting these resources. Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20220121172431.6876-5-sbinding@opensource.cirrus.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Stefan Binding authored
If a node contains more than one SPI resource it may be necessary to use an index to select which one you want to allocate a spi device for. Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20220121172431.6876-4-sbinding@opensource.cirrus.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Stefan Binding authored
This can then be used to find a spi resource inside an ACPI node, and allocate a spi device. Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20220121172431.6876-3-sbinding@opensource.cirrus.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Stefan Binding authored
This functions were previously made private since they were not used. However, these functions will be needed again. Partial revert of commit da21fde0 ("spi: Make several public functions private to spi.c") Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20220121172431.6876-2-sbinding@opensource.cirrus.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Mark Brown authored
Merge series from Stefan Binding <sbinding@opensource.cirrus.com>: This series enhances the helpers for ACPI resources to cope with multiple resources and exports them for use in the x86 platform code's multi-instantiate driver.
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Stefan Binding authored
Some ACPI nodes may have more than one Spi Resource. To be able to handle these case, its necessary to have a way of counting these resources. Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20220121172431.6876-5-sbinding@opensource.cirrus.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Stefan Binding authored
If a node contains more than one SPI resource it may be necessary to use an index to select which one you want to allocate a spi device for. Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20220121172431.6876-4-sbinding@opensource.cirrus.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Stefan Binding authored
This can then be used to find a spi resource inside an ACPI node, and allocate a spi device. Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20220121172431.6876-3-sbinding@opensource.cirrus.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Stefan Binding authored
This functions were previously made private since they were not used. However, these functions will be needed again. Partial revert of commit da21fde0 ("spi: Make several public functions private to spi.c") Signed-off-by: Stefan Binding <sbinding@opensource.cirrus.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20220121172431.6876-2-sbinding@opensource.cirrus.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Linus Walleij authored
This one is pretty straight forward to switch over, the driver already relies on inspecting cs_gpio just check cs_gpiod instead and stop the special handling of requesting the GPIO and stuff the core will take care of. Cc: Lukas Wunner <lukas@wunner.de> Cc: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220201012956.563272-1-linus.walleij@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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Linus Walleij authored
This switches the ST SSC SPI controller to use GPIO descriptors from the core instead of GPIO numbers. It is already using the core parsing of GPIO numbers so the switch is pretty straight-forward. Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220201012654.562578-1-linus.walleij@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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- 31 Jan, 2022 5 commits
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郭力豪 authored
Fix compiler warming for kernel test Fixes: f62ca4e2 ("spi: Add spi driver for Sunplus SP7021") Signed-off-by: Li-hao Kuo <lhjeff911@gmail.com> Link: https://lore.kernel.org/r/CAGcXWkzM6wbhNFLbYoijq7iS_76nYVod1ySFEDu-BRgnBokEQA@mail.gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Linus Walleij authored
The driver already relies on the core looking up GPIO lines from the core, so this is trivial to switch over to using GPIO descriptors. Cc: Purna Chandra Mandal <purna.mandal@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220122004846.374930-1-linus.walleij@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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Linus Walleij authored
This driver is already relying on the core to provide valid GPIO numbers in spi->cs_gpio through of_spi_get_gpio_numbers(), so we can switch to letting the core use GPIO descriptors instead. The driver was assigning a local function to the custom chipselect callback, but I chose to just open code the gpiod setting instead, this is easier to read. The only platform that overrides the cs_control callback is the mpc832x_rdb. Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220120002600.216667-1-linus.walleij@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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Linus Walleij authored
The MT65xx driver was already relying on the core to get some GPIO line numbers so it can be (hopefully) trivially converted to use descriptors instead. Cc: Dafna Hirschfeld <dafna.hirschfeld@collabora.com> Cc: Mason Zhang <Mason.Zhang@mediatek.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Peter Hess <peter.hess@ph-home.de> Cc: Leilk Liu <leilk.liu@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220122003302.374304-1-linus.walleij@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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Linus Walleij authored
This converts the PXA2xx SPI driver to use GPIO descriptors exclusively to retrieve GPIO chip select lines. The device tree and ACPI paths of the driver already use descriptors, hence ->use_gpio_descriptors is already set and this codepath is well tested. Convert all the PXA boards providing chip select GPIOs as platform data and drop the old GPIO chipselect handling in favor of the core managing it exclusively. Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Daniel Mack <daniel@zonque.org> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: Robert Jarzmik <robert.jarzmik@free.fr> Cc: linux-arm-kernel@lists.infradead.org Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220125005836.494807-1-linus.walleij@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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- 28 Jan, 2022 1 commit
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Yang Yingliang authored
Add the missing unlock before return from sp7021_spi_master_transfer_one() in the error handling case. Fixes: f62ca4e2 ("spi: Add spi driver for Sunplus SP7021") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20220127115815.3148950-1-yangyingliang@huawei.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 26 Jan, 2022 1 commit
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Guochun Mao authored
Variables mtk_nor_caps_mt8173, mtk_nor_caps_mt8186 and mtk_nor_caps_mt8192 are not declared. Make them static. Fixes: 5b177234 ("spi: spi-mtk-nor: improve device table for adding more capabilities") Signed-off-by: Guochun Mao <guochun.mao@mediatek.com> Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20220126091159.27513-1-guochun.mao@mediatek.comSigned-off-by: Mark Brown <broonie@kernel.org>
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- 25 Jan, 2022 4 commits
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Li-hao Kuo authored
Add bindings for Sunplus SP7021 spi driver Signed-off-by: Li-hao Kuo <lhjeff911@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Li-hao Kuo authored
Add spi driver for Sunplus SP7021. Signed-off-by: Li-hao Kuo <lhjeff911@gmail.com> Link: https://lore.kernel.org/r/37998e515d561e762ee30d0ac4fca25a948e0c5c.1642494310.git.lhjeff911@gmail.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Mark Brown authored
Merge series from conor.dooley@microchip.com <conor.dooley@microchip.com> Conor Dooley <conor.dooley@microchip.com>: From: Conor Dooley <conor.dooley@microchip.com> This series updates the Microchip Icicle Kit device tree by adding a host of peripherals, and some updates to the memory map. In addition, the device tree has been split into a third part, which contains "soft" peripherals that are in the fpga fabric. Several of the entries are for peripherals that have not get had their drivers upstreamed, so in those cases the dt bindings are included where appropriate in order to avoid the many "DT compatible string <x> appears un-documented" errors. Depends on mpfs clock driver series [1] to provide: dt-bindings/clock/microchip,mpfs-clock.h and on the other changes to the icicle/mpfs device tree from geert that are already in linux/riscv/for-next. Additionally, the interrupt-extended warnings on the plic/clint are cleared by [2] & [3]. [1] https://lore.kernel.org/linux-clk/20211216140022.16146-1-conor.dooley@microchip.com/T/ [2] https://lore.kernel.org/linux-riscv/cover.1639744468.git.geert@linux-m68k.org/ [3] https://lore.kernel.org/linux-riscv/cover.1639744106.git.geert@linux-m68k.org/ Changes from v3: - drop "mailbox: change mailbox-mpfs compatible string", already upstream: commit f10b1fc0 - fix copy paste error in microchip,mpfs-mailbox dt-binding - remove whitespace in syscontroller dt entry Changes from v2: - dropped plic int header & corresponding defines in dts{,i} - use $ref to drmode in mpfs-musb binding - split changes to dts{,i} again: functional changes to existing elements now are in a new patch - drop num-cs property in mpfs-spi binding - dont make the system controller a simple-mfd - move the separate bindings for rng/generic system services into the system controller binding - added an instance corei2c as i2c2 in the fabric dtsi - add version numbering to corepwm and corei2c compat string (-rtl-vN) Conor Dooley (14): dt-bindings: soc/microchip: update syscontroller compatibles dt-bindings: soc/microchip: add services as children of sys ctrlr dt-bindings: i2c: add bindings for microchip mpfs i2c dt-bindings: rtc: add bindings for microchip mpfs rtc dt-bindings: gpio: add bindings for microchip mpfs gpio dt-bindings: spi: add bindings for microchip mpfs spi dt-bindings: usb: add bindings for microchip mpfs musb dt-bindings: pwm: add microchip corepwm binding riscv: dts: microchip: use clk defines for icicle kit riscv: dts: microchip: add fpga fabric section to icicle kit riscv: dts: microchip: refactor icicle kit device tree riscv: dts: microchip: update peripherals in icicle kit device tree riscv: dts: microchip: add new peripherals to icicle kit device tree MAINTAINERS: update riscv/microchip entry .../bindings/gpio/microchip,mpfs-gpio.yaml | 80 ++++++ .../bindings/i2c/microchip,mpfs-i2c.yaml | 55 ++++ ...ilbox.yaml => microchip,mpfs-mailbox.yaml} | 6 +- .../bindings/pwm/microchip,corepwm.yaml | 75 +++++ .../bindings/rtc/microchip,mfps-rtc.yaml | 63 +++++ .../microchip,mpfs-sys-controller.yaml | 73 +++++ ...icrochip,polarfire-soc-sys-controller.yaml | 35 --- .../bindings/spi/microchip,mpfs-spi.yaml | 52 ++++ .../bindings/usb/microchip,mpfs-musb.yaml | 59 ++++ MAINTAINERS | 2 + .../dts/microchip/microchip-mpfs-fabric.dtsi | 25 ++ .../microchip/microchip-mpfs-icicle-kit.dts | 115 ++++++-- .../boot/dts/microchip/microchip-mpfs.dtsi | 262 +++++++++++++++--- arch/riscv/configs/icicle_kit_defconfig | 134 +++++++++ 14 files changed, 932 insertions(+), 104 deletions(-) create mode 100644 Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml create mode 100644 Documentation/devicetree/bindings/i2c/microchip,mpfs-i2c.yaml rename Documentation/devicetree/bindings/mailbox/{microchip,polarfire-soc-mailbox.yaml => microchip,mpfs-mailbox.yaml} (82%) create mode 100644 Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml create mode 100644 Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml delete mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,polarfire-soc-sys-controller.yaml create mode 100644 Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml create mode 100644 Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi create mode 100644 arch/riscv/configs/icicle_kit_defconfig -- 2.32.0
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Mark Brown authored
Merge series from guochun.mao@mediatek.com <guochun.mao@mediatek.com>: These patches is mainly for adding mt8186 support. The spi nor controller of mt8186 has some differences, it needs one more clk, axi_s, for dma feature. And also needs one extra dummy bit when read flash registers.
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- 24 Jan, 2022 10 commits
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Linus Walleij authored
This driver has a bunch of custom oldstyle GPIO number-passing fields and a custom set-up callback. The good thing is: nothing in the kernel is using it. Convert the driver to use GPIO descriptors with a SPI_MASTER_GPIO_SS flag so that the local CS callback also get invoked as the hardware needs this. New users of this driver can provide GPIO descriptor tables like the other converted drivers. Cc: linux-samsung-soc@vger.kernel.org Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Cc: Sylwester Nawrocki <snawrocki@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220119000914.192553-1-linus.walleij@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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Linus Walleij authored
Convert the S3C64xx SPI host to use GPIO descriptors. Provide GPIO descriptor tables for the one user with CS 0 and 1. Cc: linux-samsung-soc@vger.kernel.org Cc: Sylwester Nawrocki <snawrocki@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220118230915.157797-3-linus.walleij@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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Linus Walleij authored
The SPI0 platform population function was taking a custom gpio setup callback but the only user pass NULL as argument so drop this argument. Cc: linux-samsung-soc@vger.kernel.org Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Cc: Sylwester Nawrocki <snawrocki@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20220118230915.157797-2-linus.walleij@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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Linus Walleij authored
The helpers to use SPI host 1 and 2 are unused in the kernel and taking up space and maintenance hours. New systems should use device tree and not this, so delete the code. Cc: linux-samsung-soc@vger.kernel.org Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Cc: Sylwester Nawrocki <snawrocki@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220118230915.157797-1-linus.walleij@linaro.orgSigned-off-by: Mark Brown <broonie@kernel.org>
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Guochun Mao authored
Add MT8186 spi-nor controller support. MT8186 needs a new clock name, axi_s, for spi nor axi slave bus clock. Signed-off-by: Guochun Mao <guochun.mao@mediatek.com> Signed-off-by: Zhen Zhang <zhen.zhang@mediatek.com> Link: https://lore.kernel.org/r/20220118142820.2729-2-guochun.mao@mediatek.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Guochun Mao authored
MT8186 needs axi_s clock for DMA feature. Signed-off-by: Guochun Mao <guochun.mao@mediatek.com> Signed-off-by: Zhen Zhang <zhen.zhang@mediatek.com> Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220118142820.2729-5-guochun.mao@mediatek.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Guochun Mao authored
Add compatible mediatek,mt8186-nor implementation. Signed-off-by: Guochun Mao <guochun.mao@mediatek.com> Signed-off-by: Zhen Zhang <zhen.zhang@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220118142820.2729-4-guochun.mao@mediatek.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Guochun Mao authored
Define a structure for adding more capabilities. Add a item extra_dummy_bit for new SoCs, due to design changed. Signed-off-by: Guochun Mao <guochun.mao@mediatek.com> Signed-off-by: Zhen Zhang <zhen.zhang@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220118142820.2729-3-guochun.mao@mediatek.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Conor Dooley authored
Add device tree bindings for the {q,}spi controller on the Microchip PolarFire SoC. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20220117110755.3433142-7-conor.dooley@microchip.comSigned-off-by: Mark Brown <broonie@kernel.org>
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Mark Brown authored
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- 23 Jan, 2022 2 commits
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Linus Torvalds authored
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Linus Torvalds authored
Merge tag 'perf-tools-for-v5.17-2022-01-22' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux Pull more perf tools updates from Arnaldo Carvalho de Melo: - Fix printing 'phys_addr' in 'perf script'. - Fix failure to add events with 'perf probe' in ppc64 due to not removing leading dot (ppc64 ABIv1). - Fix cpu_map__item() python binding building. - Support event alias in form foo-bar-baz, add pmu-events and parse-event tests for it. - No need to setup affinities when starting a workload or attaching to a pid. - Use path__join() to compose a path instead of ad-hoc snprintf() equivalent. - Override attr->sample_period for non-libpfm4 events. - Use libperf cpumap APIs instead of accessing the internal state directly. - Sync x86 arch prctl headers and files changed by the new set_mempolicy_home_node syscall with the kernel sources. - Remove duplicate include in cpumap.h. - Remove redundant err variable. * tag 'perf-tools-for-v5.17-2022-01-22' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux: perf tools: Remove redundant err variable perf test: Add parse-events test for aliases with hyphens perf test: Add pmu-events test for aliases with hyphens perf parse-events: Support event alias in form foo-bar-baz perf evsel: Override attr->sample_period for non-libpfm4 events perf cpumap: Remove duplicate include in cpumap.h perf cpumap: Migrate to libperf cpumap api perf python: Fix cpu_map__item() building perf script: Fix printing 'phys_addr' failure issue tools headers UAPI: Sync files changed by new set_mempolicy_home_node syscall tools headers UAPI: Sync x86 arch prctl headers with the kernel sources perf machine: Use path__join() to compose a path instead of snprintf(dir, '/', filename) perf evlist: No need to setup affinities when disabling events for pid targets perf evlist: No need to setup affinities when enabling events for pid targets perf stat: No need to setup affinities when starting a workload perf affinity: Allow passing a NULL arg to affinity__cleanup() perf probe: Fix ppc64 'perf probe add events failed' case
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