- 24 May, 2018 12 commits
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Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by:Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: -
Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: -
Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: -
Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: -
Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: -
Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: -
Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: -
Fabio Estevam authored
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by:
Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by:
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Laura Abbott authored
The new challenge is to remove VLAs from the kernel (see https://lkml.org/lkml/2018/3/7/621) The number of GPIOs on the supported chips is fairly small so stack allocate to a known upper bound and spit out a warning if any new chips have more gpios. Signed-off-by:
Laura Abbott <labbott@redhat.com> Reviewed-by:
Phil Reid <preid@electromag.com.au> Reviewed-by:
Kees Cook <keescook@chromium.org> Signed-off-by:
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Fabio Estevam authored
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by:
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Anson Huang authored
Some i.MX SoCs have GPIO clock gates in CCM CCGR, such as i.MX6SLL, need to enable clocks before accessing GPIO registers, add optional clock operation for GPIO driver. Signed-off-by:
Anson Huang <Anson.Huang@nxp.com> Reviewed-by:
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- 23 May, 2018 13 commits
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Laura Abbott authored
The new challenge is to remove VLAs from the kernel (see https://lkml.org/lkml/2018/3/7/621) to eventually turn on -Wvla. Using a kmalloc array is the easy way to fix this but kmalloc is still more expensive than stack allocation. Introduce a fast path with a fixed size stack array to cover most chip with gpios below some fixed amount. The slow path dynamically allocates an array to cover those chips with a large number of gpios. Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by:
Lukas Wunner <lukas@wunner.de> Signed-off-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by:
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Benjamin Herrenschmidt authored
The current driver does a read/modify/write of the output registers when changing a bit in __aspeed_gpio_set(). This is sub-optimal for a couple of reasons: - If any of the neighbouring GPIOs (sharing the shared register) isn't (yet) configured as an output, it will read the current input value, and then apply it to the output latch, which may not be what the user expects. There should be no bug in practice as aspeed_gpio_dir_out() will establish a new value but it's not great either. - The GPIO block in the aspeed chip is clocked rather slowly (typically 25Mhz). That extra MMIO read halves the maximum speed at which we can toggle the GPIO. This provides a significant performance improvement to the GPIO based FSI master. Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by:
Christopher Bostic <cbostic@linux.vnet.ibm.com> Reviewed-by:
Andrew Jeffery <andrew@aj.id.au> Tested-by:
Joel Stanley <joel@jms.id.au> Signed-off-by:
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Benjamin Herrenschmidt authored
In aspeed_gpio_dir_out(), we need to establish the new output value in the output latch *before* we change the direction to output in order to avoid a glitch on the output line if the previous value of the latch was different. Signed-off-by:
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H. Nikolaus Schaller authored
The register constants are so far defined in a way that they fit for the pcal9555a when shifted by the number of banks, i.e. are multiplied by 2 in the accessor function. Now, the pcal6524 has 3 banks which means the relative offset is multiplied by 4 for the standard registers. Simply applying the bit shift to the extended registers gives a wrong result, since the base offset is already included in the offset. Therefore, we have to add code to the 24 bit accessor functions that adjusts the register number for these exended registers. The formula finally used was developed and proposed by Andy Shevchenko <andy.shevchenko@gmail.com>. Suggested-by:
H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by:
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H. Nikolaus Schaller authored
These mask bits are to be used to map the extended register addresses (which are defined for an unsupported 8-bit pcal chip) to 16 and 24 bit chips (pcal6524). Signed-off-by:
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H. Nikolaus Schaller authored
The of_device_table is missing the PCA_PCAL flag so the pcal6524 would be operated in tca6424 compatibility mode which does not handle the new interrupt mask registers. Suggested-by:
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Grigoryev Denis authored
The driver stores the result of irq_set_type() in the internal variables irq_trig_raise and irq_trig_fall, which later are used to determine the GPIOs that must be re-configured as input. These variables retain their value between gpiolib's export / unexport, resulting in an incorrect state in some cases. The corresponding bits in the variables irq_trig_raise and irq_trig_fall should be cleared in irq_shutdown(). Signed-off-by:
Denis Grigoryev <grigoryev@fastwel.ru> Acked-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
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Michal Simek authored
In past Xilinx gpio-zynq driver was setting up gpio chip->base as 0 which was chagned to autodetection when driver was upstreamed. Older systems, which were using this old version, setup SW stack which expects zynq gpio base as 0 and right now there is no way how to set this up. The patch is adding an option to setup chip->base based on aliases which is something what some other drivers are doing too. It means when gpio0 alias is setup then chip->base is 0. When gpio alias is not setup gpiochip_find_base() set it up properly which is current behavior. Signed-off-by:
Michal Simek <michal.simek@xilinx.com> Signed-off-by:
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Phil Edworthy authored
Treat DT and ACPI the same as much as possible. Note that we can't use platform_get_irq() to get the DT interrupts as they are in the port sub-node and hence do not have an associated platform device. This also fixes a problem introduced with error checking when calling platform_get_irq(). Signed-off-by:
Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by:
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Heiko Stuebner authored
Syscon nodes can be a simple-mfd and the syscon-users then be declared as children of this node. That way the parent-child structure can be better represented for devices that are fully embedded in the syscon. Therefore allow getting the syscon from the parent if neither a special compatible nor a gpio,syscon-dev property is defined. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Levin Du <djw@t-chip.com.cn> Signed-off-by:
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Yoshihiro Shimoda authored
Add compatible string for R-Car E3 (r8a77990) in gpio-rcar. Signed-off-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by:
Simon Horman <horms+renesas@verge.net.au> Signed-off-by:
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Shubhrajyoti Datta authored
Get the driver data directly by dev_get_drvdata. Signed-off-by:
Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Reviewed-by:
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Shubhrajyoti Datta authored
Remove the call to platform_get_irq use the cached one instead. Signed-off-by:
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- 16 May, 2018 15 commits
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Andy Shevchenko authored
The new helper returns index of the matching string in an array. We are going to use it here. Signed-off-by:
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H. Nikolaus Schaller authored
It is not completely obvious that these are required and how to use them. So we provide a tested example. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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H. Nikolaus Schaller authored
Hardware can have a switchable Vcc supply, so let's add it to the bindings (the current Linux driver code already supports it). Signed-off-by:
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H. Nikolaus Schaller authored
The pcal6524 has another set of registers to fine control the interrupt handling. Signed-off-by:
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H. Nikolaus Schaller authored
PCAL chips ("L" seems to stand for "latched") have additional registers starting at address 0x40 to control the latches, interrupt mask, pull-up and pull down etc. Signed-off-by: -
H. Nikolaus Schaller authored
which makes it easier to match them with the data sheets. Signed-off-by:
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Thierry Reding authored
Casting a pointer to u16 can produce a compiler warning such as this: drivers/gpio/gpio-ge.c: In function 'gef_gpio_probe': drivers/gpio/gpio-ge.c:83:14: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] gc->ngpio = (u16)of_device_get_match_data(&pdev->dev); ^ Cast the pointer through a uintptr_t to avoid the warning. Reported-by:kbuild test robot <lkp@intel.com> Signed-off-by:
Thierry Reding <treding@nvidia.com> Signed-off-by:
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Dan Carpenter authored
There is a shifter vs vanilla mask bug here. We want to test if 1 << 11 is set but we're testing if 0xb is set. Fixes: 9a6c505f7df1 ("gpiolib: add hogs support for machine code") Signed-off-by:Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by:
Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by:
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Thierry Reding authored
Use of_device_get_match_data() instead of open-coding it. Signed-off-by:
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Thierry Reding authored
Use of_device_get_match_data() instead of open-coding it. Signed-off-by:
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Thierry Reding authored
Use of_device_get_match_data() instead of open-coding it. Signed-off-by:
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Thierry Reding authored
Use of_device_get_match_data() instead of open-coding it. Signed-off-by:
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Thierry Reding authored
Use of_device_get_match_data() instead of open-coding it. Signed-off-by:
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Thierry Reding authored
Use of_device_get_match_data() instead of open-coding it. Signed-off-by:
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Thierry Reding authored
Use of_device_get_match_data() instead of open-coding it. Signed-off-by:
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