- 15 May, 2020 17 commits
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Geert Uytterhoeven authored
Support for Annapurna Labs Alpine platforms depends on ARCH_MULTI_V7. As the latter selects HAVE_SMP, there is no need for ARCH_ALPINE to select HAVE_SMP. Link: https://lore.kernel.org/r/20200505150722.1575-4-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Tsahee Zidenberg <tsahee@annapurnalabs.com> Cc: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Geert Uytterhoeven authored
Support for Actions Semi SoCs depends on ARCH_MULTI_V7, and thus on ARCH_MULTIPLATFORM. As the latter selects COMMON_CLK, there is no need for ARCH_ACTIONS to select COMMON_CLK. Link: https://lore.kernel.org/r/20200505150722.1575-3-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Andreas Färber <afaerber@suse.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Geert Uytterhoeven authored
The ARM Architected timer is available on ARMv7 SoCs only. As both ARCH_MULTIPLATFORM and ARM_SINGLE_ARMV7M select GENERIC_CLOCKEVENTS, there is no need for HAVE_ARM_ARCH_TIMER to select GENERIC_CLOCKEVENTS. Link: https://lore.kernel.org/r/20200505150722.1575-2-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'tegra-for-5.8-arm-core' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc ARM: tegra: Core changes for v5.8-rc1 This contains core changes needed for the CPU frequency scaling and CPU idle drivers on Tegra20 and Tegra30. * tag 'tegra-for-5.8-arm-core' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: Create tegra20-cpufreq platform device on Tegra30 ARM: tegra: Don't enable PLLX while resuming from LP1 on Tegra30 ARM: tegra: Switch CPU to PLLP on resume from LP1 on Tegra30/114/124 ARM: tegra: Correct PL310 Auxiliary Control Register initialization ARM: tegra: Do not fully reinitialize L2 on resume ARM: tegra: Initialize r0 register for firmware wake-up firmware: tf: Different way of L2 cache enabling after LP2 suspend firmware: tegra: Make BPMP a regular driver Link: https://lore.kernel.org/r/20200515145311.1580134-10-thierry.reding@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'renesas-arm-soc-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/soc Renesas ARM SoC updates for v5.8 (take two) - Add debug-ll support for RZ/G1H. * tag 'renesas-arm-soc-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: ARM: debug-ll: Add support for r8a7742 Link: https://lore.kernel.org/r/20200515100547.14671-4-geert+renesas@glider.beSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'vexpress-modules-for-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux into arm/soc VExpress modularization This series enables building various Versatile Express platform drivers as modules. The primary target is the Fast Model FVP which is supported in Android. As Android is moving towards their GKI, or generic kernel, the hardware support has to be in modules. Currently ARCH_VEXPRESS enables several built-in only drivers. Some of these are needed, but some are only needed for older 32-bit VExpress platforms and can just be disabled. * tag 'vexpress-modules-for-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: ARM: vexpress: Don't select VEXPRESS_CONFIG bus: vexpress-config: Support building as module vexpress: Move setting master site to vexpress-config bus bus: vexpress-config: simplify config bus probing bus: vexpress-config: Merge vexpress-syscfg into vexpress-config mfd: vexpress-sysreg: Support building as a module mfd: vexpress-sysreg: Use devres API variants mfd: vexpress-sysreg: Drop unused syscon child devices mfd: vexpress-sysreg: Drop selecting CONFIG_CLKSRC_MMIO clk: vexpress-osc: Support building as a module clk: vexpress-osc: Use the devres clock API variants clk: versatile: Only enable SP810 on 32-bit by default clk: versatile: Rework kconfig structure amba: Retry adding deferred devices at late_initcall arm64: vexpress: Don't select CONFIG_POWER_RESET_VEXPRESS ARM: vexpress: Move vexpress_flags_set() into arch code Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'omap-for-v5.8/soc-signed-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc SoC changes for omaps for v5.8 merge window SoC related changes for omaps: - Use ard instead of adrl for sleep34xx.S for clang - Stop selecting MIGHT_HAVE_CACHE_L2X0, it's already selected by ARCH_MULTI_V6_V7 - Make omap5_erratum_workaround_801819() and am43xx_get_rtc_base_addr() static * tag 'omap-for-v5.8/soc-signed-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: pm33xx-core: Make am43xx_get_rtc_base_addr static ARM: omap2: make omap5_erratum_workaround_801819 static ARM: omap2plus: Drop unneeded select of MIGHT_HAVE_CACHE_L2X0 ARM: OMAP2+: drop unnecessary adrl Link: https://lore.kernel.org/r/pull-1589387719-605999@atomide.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'samsung-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc Samsung mach/soc changes for v5.8 Cleanups and code simplifying. * tag 'samsung-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: samsung: Use devm_platform_ioremap_resource() to simplify code ARM: samsung: Omit superfluous error message in s3c_adc_probe() ARM: s3c64xx: convert to use i2c_new_client_device() Link: https://lore.kernel.org/r/20200512122922.5700-3-krzk@kernel.orgSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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https://github.com/Broadcom/stblinuxArnd Bergmann authored
This pull request contains Broadcom ARM-based machine/SoC changes for v5.8, please pull the following: - Florian removes a print of a kernel virtual address in the Brahma-B15 read-ahead cache driver * tag 'arm-soc/for-5.8/soc' of https://github.com/Broadcom/stblinux: ARM: mm: Remove virtual address print from B15 RAC driver Link: https://lore.kernel.org/r/20200511210522.28243-4-f.fainelli@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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https://github.com/Broadcom/stblinuxArnd Bergmann authored
This pull request contains Broadcom SoCs MAINTAINERS file update for v5.8, please pull the following: - Nicolas updates the git tree where all BCM2835 kernel development is happening now * tag 'arm-soc/for-5.8/maintainers' of https://github.com/Broadcom/stblinux: MAINTAINERS: Update Raspberry Pi development repository Link: https://lore.kernel.org/r/20200511210522.28243-3-f.fainelli@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'realtek-soc-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek into arm/soc Realtek Arm based SoC for v5.8 Introduce ARCH_REALTEK also for 32-bit arm, and update MAINTAINERS. * tag 'realtek-soc-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek: MAINTAINERS: Add Realtek arm DT files ARM: Prepare Realtek RTD1195 Link: https://lore.kernel.org/r/20200510232158.18477-1-afaerber@suse.deSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Geert Uytterhoeven authored
The Marvell MMP platform code is not a clock provider, and just needs to call of_clk_init(). Hence it can include <linux/of_clk.h> instead of <linux/clk-provider.h>. Link: https://lore.kernel.org/r/20200505154536.4099-4-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Geert Uytterhoeven authored
The Mediatek platform code is not a clock provider, and just needs to call of_clk_init(). Hence it can include <linux/of_clk.h> instead of <linux/clk-provider.h>. Link: https://lore.kernel.org/r/20200505154536.4099-3-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Geert Uytterhoeven authored
The ARM time code is not a clock provider, and just needs to call of_clk_init(). Hence it can include <linux/of_clk.h> instead of <linux/clk-provider.h>. Link: https://lore.kernel.org/r/20200505154536.4099-2-geert+renesas@glider.beSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Rob Herring authored
Now that the non-DT IM-PD1 support code has been removed, drop the clock related code from clk-impd1.c. Link: https://lore.kernel.org/r/20200428204945.21067-1-robh@kernel.org Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Boyd <sboyd@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-clk@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'renesas-arm-soc-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/soc Renesas ARM SoC updates for v5.8 - Add Basic support for the new RZ/G1H SoC. * tag 'renesas-arm-soc-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: ARM: shmobile: r8a7742: Basic SoC support Link: https://lore.kernel.org/r/20200430084849.1457-4-geert+renesas@glider.beSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'versatile-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/soc Versatile family updates for the v5.8 kernel series: - Drop unneeded SPARSE_IRQ selection. - Drop a bunch of other unneed selections already selected by multiplatform overall Kconfig. - Remove the dead sched_clock() code in plat-versatile. - Drop the mapping of the IB2 registers. Now handled by the PL11x DRM driver. - Add a bus driver for the Integrator/AP logic modules, along with its device tree bindings. - Retire the LM and IM-PD1 boardfile code: we now handle this with the bus driver and device tree. - Select some Integrator features needed for boot in its KConfig. - Fix a minor MAINTAINERS entry. * tag 'versatile-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator: MAINTAINERS: adjust to renaming physmap_of_versatile.c ARM: integrator: Add some Kconfig selections ARM: integrator: Retire LM and IM-PD1 boardfile code bus: Add driver for Integrator/AP logic modules bus: Add DT bindings for Integrator/AP logic modules ARM: versatile: Drop mapping IB2 module registers ARM: versatile: Remove dead sched_clock code ARM: realview: Drop unneeded select of multi-platform features ARM: integrator: Drop unneeded select of SPARSE_IRQ Link: https://lore.kernel.org/r/CACRpkdZR5LnnvrCnXodaTsam9-BuW+LkYSc+6jq-EisrRsq2eQ@mail.gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>
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- 13 May, 2020 10 commits
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Rob Herring authored
CONFIG_VEXPRESS_CONFIG has 'default y if ARCH_VEXPRESS', so selecting is unnecessary. Selecting it also prevents setting CONFIG_VEXPRESS_CONFIG to a module. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Rob Herring <robh@kernel.org>
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Rob Herring authored
Enable building vexpress-config driver as a module. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Rob Herring <robh@kernel.org>
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Rob Herring authored
There's only a single caller of vexpress_config_set_master() from vexpress-sysreg.c. Let's just make the registers needed available to vexpress-config and move all the code there. The registers needed aren't used anywhere else either. With this, we can get rid of the private API between these 2 drivers. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org>
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Rob Herring authored
The vexpress-config initialization is dependent on the vexpress-syscfg driver probing. As vexpress-config was not a driver, deferred probe could not be used and instead initcall ordering was relied upon. This is fragile and doesn't work for modules. Let's move the config bus init into the vexpress-syscfg probe. This eliminates the initcall ordering requirement and the need to create a struct device and the "vexpress-config" class. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Rob Herring <robh@kernel.org>
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Rob Herring authored
The only thing that vexpress-syscfg does is provide a regmap to vexpress-config bus child devices. There's little reason to have 2 components for this. The current structure with initcall ordering requirements makes turning these components into modules more difficult. So let's start to simplify things and merge vexpress-syscfg into vexpress-config. There's no functional change in this commit and it's still separate components until subsequent commits. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Rob Herring <robh@kernel.org>
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Rob Herring authored
Enable building the vexpress-sysreg driver as a module. As deferred probe between the vexpress components works now, we don't need to create struct devices early with of_platform_device_create(). Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org>
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Rob Herring authored
Use the managed devm_gpiochip_add_data() and devm_mfd_add_devices() instead of their unmanaged counterparts. With this, no .remove() hook is needed for driver unbind. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org>
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Rob Herring authored
The "sys_id", "sys_misc" and "sys_procid" devices don't have a user anywhere in the tree and do nothing more than create a syscon regmap for a single register or 2. That's an overkill for creating child devices. Let's just remove them. Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org>
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Rob Herring authored
Nothing in the VExpress sysregs nor the MFD child drivers use CONFIG_CLKSRC_MMIO. There's the 24MHz counter, but that's handled by drivers/clocksource/timer-versatile.c which doesn't use CONFIG_CLKSRC_MMIO either. So let's just drop CONFIG_CLKSRC_MMIO. As the !ARCH_USES_GETTIMEOFFSET dependency was added for CONFIG_CLKSRC_MMIO, that can be dropped, too. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org>
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Rob Herring authored
Enable building the vexpress-osc clock driver as a module. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: linux-clk@vger.kernel.org Reviewed-by: Sudeep Holla <sudeep.holla@arm.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org>
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- 12 May, 2020 2 commits
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Samuel Zou authored
Fix the following sparse warning: arch/arm/mach-omap2/pm33xx-core.c:270:14: warning: symbol 'am43xx_get_rtc_base_addr' was not declared. The am43xx_get_rtc_base_addr has only call site within pm33xx-core.c It should be static Fixes: 8c5a916f ("ARM: OMAP2+: sleep33/43xx: Add RTC-Mode support") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Samuel Zou <zou_wei@huawei.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Ma Feng authored
Fix sparse warning: arch/arm/mach-omap2/omap-smp.c:75:6: warning: symbol 'omap5_erratum_workaround_801819' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Ma Feng <mafeng.ma@huawei.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 11 May, 2020 1 commit
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Nicolas Saenz Julienne authored
Eric Anholt's repo isn't used anymore. List current one. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Acked-by: Eric Anholt <eric@anholt.net> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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- 07 May, 2020 1 commit
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Geert Uytterhoeven authored
Support for TI AM43x SoCs depends on ARCH_MULTI_V7, which selects ARCH_MULTI_V6_V7. As the latter selects MIGHT_HAVE_CACHE_L2X0, there is no need for SOC_AM43XX to select MIGHT_HAVE_CACHE_L2X0. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Tony Lindgren <tony@atomide.com> Cc: linux-omap@vger.kernel.org Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 06 May, 2020 9 commits
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Florian Fainelli authored
We would be trying to print the kernel virtual address of the base register address which is not very useful and is not displayed by default because of pointer restriction. Print the Device Tree node name instead which is what was originally intended. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Dmitry Osipenko authored
The tegra20-cpufreq now instantiates cpufreq-dt and Tegra30 is fully supported by that driver. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Marcel Ziswiler <marcel@ziswiler.com> Tested-by: Jasper Korten <jja2000@gmail.com> Tested-by: David Heidelberg <david@ixit.cz> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
PLLX may be kept disabled if cpufreq driver selects some other clock for CPU. In that case PLLX will be disabled later in the resume path by the CLK driver, which also can enable PLLX if necessary by itself. Thus there is no need to enable PLLX early during resume. Tegra114/124 CLK drivers do not manage PLLX on resume and thus they are left untouched by this patch. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Marcel Ziswiler <marcel@ziswiler.com> Tested-by: Jasper Korten <jja2000@gmail.com> Tested-by: David Heidelberg <david@ixit.cz> Tested-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
The early-resume code shall not switch CPU to PLLX because PLLX configuration could be unstable or PLLX should be simply disabled if CPU enters into suspend running off some other PLL (the case if CPUFREQ driver is active). The actual burst policy is restored by the clock drivers. Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Marcel Ziswiler <marcel@ziswiler.com> Tested-by: Jasper Korten <jja2000@gmail.com> Tested-by: David Heidelberg <david@ixit.cz> Tested-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
The PL310 Auxiliary Control Register shouldn't have the "Full line of zero" optimization bit being set before L2 cache is enabled. The L2X0 driver takes care of enabling the optimization by itself. This patch fixes a noisy error message on Tegra20 and Tegra30 telling that cache optimization is erroneously enabled without enabling it for the CPU: L2C-310: enabling full line of zeros but not enabled in Cortex-A9 Cc: <stable@vger.kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
ASUS TF300T device may not work properly if firmware is asked to fully re-initialize L2 cache after resume from LP2 suspend. The downstream kernel of TF300T uses different opcode to enable cache after resuming from LP2, this opcode also works fine on Nexus 7 and Ouya devices. Supposedly, this may be needed by an older firmware versions. Reported-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Tested-by: Jasper Korten <jja2000@gmail.com> Tested-by: David Heidelberg <david@ixit.cz> Tested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko authored
Downstream kernel of ASUS TF300T sets r0 to #3. There is no explanation in downstream code whether this is really needed and some of T30 downstream kernels have and explicit comment telling that all arguments are ignored by firmware. Let's take a safe side by replicating behavior of the TF300T downstream kernel. This change works fine on Ouya and Nexus 7 devices. Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Tested-by: Jasper Korten <jja2000@gmail.com> Tested-by: David Heidelberg <david@ixit.cz> Tested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
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Dmitry Osipenko authored
ASUS TF300T device may not work properly if firmware is asked to fully re-initialize L2 cache after resume from LP2 suspend. The downstream kernel of TF300T uses different opcode to enable cache after resuming from LP2, this opcode also works fine on Nexus 7 and Ouya devices. Supposedly, this may be needed by an older firmware versions. Reported-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Tested-by: Jasper Korten <jja2000@gmail.com> Tested-by: David Heidelberg <david@ixit.cz> Tested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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