- 29 Nov, 2022 2 commits
-
-
Matthias Kaehlcke authored
sc7180_lpass_dev_resume() logs an error if clk_bulk_prepare_enable() fails. The clock framework already generates error logs if anything goes wrong, so the logging in _resume() is redundant, drop it. Signed-off-by:
Matthias Kaehlcke <mka@chromium.org> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20221129001633.v2.1.I8d1993f41f0da1eac0ecba321678ac489f9c0b9b@changeidSigned-off-by:
Mark Brown <broonie@kernel.org>
-
Srinivasa Rao Mandadapu authored
Update lpass sc7280 platform driver with PM ops, such as system supend and resume callbacks. This update is required to disable clocks during supend and avoid XO shutdown issue. Signed-off-by:
Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Tested-by:
Rahul Ajmeriya <quic_rajmeriy@quicinc.com> Link: https://lore.kernel.org/r/1669703784-27589-1-git-send-email-quic_srivasam@quicinc.comSigned-off-by:
-
- 28 Nov, 2022 31 commits
-
-
Ricardo Ribalda authored
If the device does not come straight from reset, we might receive an IRQ before we are ready to handle it. Fixes: [ 2.334737] Unable to handle kernel read from unreadable memory at virtual address 00000000000001e4 [ 2.522601] Call trace: [ 2.525040] regmap_read+0x1c/0x80 [ 2.528434] mt8173_afe_irq_handler+0x40/0xf0 ... [ 2.598921] start_kernel+0x338/0x42c Signed-off-by:
Ricardo Ribalda <ribalda@chromium.org> Fixes: ee0bcaff ("ASoC: mediatek: Add AFE platform driver") Link: https://lore.kernel.org/r/20221128-mt8173-afe-v1-0-70728221628f@chromium.orgSigned-off-by:
-
Mark Brown authored
Merge series from Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>: Adding sound support for Qualcomm SM8450 SoC (and later for SC8280XP) brought some changes to APR/GPR services bindings. These bindings are part of qcom,apr.yaml: apr-or-gpr-device-node <- qcom,apr.yaml apr-gpr-service@[0-9] <- qcom,apr.yaml service-specific-components <- /schemas/sound/qcom,q6*.yaml The schema for services (apr-gpr-service@[0-9]) was not complete and is still quite not specific. It allows several incorrect combinations, like adding a clock-controller to a APM device. Restricting it would complicate the schema even more. Bringing new support for sound on Qualcomm SM8450 and SC8280XP SoC would grow it as well. Refactor the bindings before extending them for Qualcomm SM8450 SoC. -
Srinivasa Rao Mandadapu authored
Update lpass sc7180 platform driver with PM ops, such as system supend and resume callbacks. This update is required to disable clocks during supend and avoid XO shutdown issue. Signed-off-by:
-
Oder Chiou authored
We found an corner case in RT5640 codec driver which schedules jack work after system suspend as IRQ was enabled. Due to this, hitting the error as register access happening after suspend as jack worker thread getting scheduled in irq handler. The patch disables the irq during the suspend to prevent the corner case happening. Signed-off-by:
Oder Chiou <oder_chiou@realtek.com> Reported-by:
Mohan Kumar D <mkumard@nvidia.com> Link: https://lore.kernel.org/r/20221128070825.91215-1-oder_chiou@realtek.comSigned-off-by:
-
Jean Delvare authored
Since commit 0166dc11 ("of: make CONFIG_OF user selectable"), it is possible to test-build any driver which depends on OF on any architecture by explicitly selecting OF. Therefore depending on COMPILE_TEST as an alternative is no longer needed. Signed-off-by:
Jean Delvare <jdelvare@suse.de> Link: https://lore.kernel.org/r/20221127193549.211bf8f7@endymion.delvareSigned-off-by:
-
Pavel Dobias authored
For 8kHz and 16kHz sample rates and certain PCLK values the codec can be programmed to operate in exact integer mode. If available, use it to achieve the exact sample rate. Signed-off-by:
Pavel Dobias <dobias@2n.com> Link: https://lore.kernel.org/r/20221123153818.24650-1-dobias@2n.comSigned-off-by:
-
Kuninori Morimoto authored
Current rsnd_adg_clk_dbg_info() is using locak clk_name[] to ndicating clk name, but we don't want to use local clk_name[] everywhere when we support R-Car Gen4 sound to handling non compatible clk naming. This patch uses __clk_get_name() instead of local clk_name[] for it. Signed-off-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87v8mz8wcs.wl-kuninori.morimoto.gx@renesas.comSigned-off-by:
-
Charles Keepax authored
The conversion from hw_params to SoundWire config is pretty standard as such most of the conversion can be handled by the new snd_sdw_params_to_config helper function. Signed-off-by:
Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20221123165432.594972-9-ckeepax@opensource.cirrus.comSigned-off-by:
-
Charles Keepax authored
The conversion from hw_params to SoundWire config is pretty standard as such most of the conversion can be handled by the new snd_sdw_params_to_config helper function. Signed-off-by:
-
Charles Keepax authored
The conversion from hw_params to SoundWire config is pretty standard as such most of the conversion can be handled by the new snd_sdw_params_to_config helper function. Signed-off-by:
-
Charles Keepax authored
The conversion from hw_params to SoundWire config is pretty standard as such most of the conversion can be handled by the new snd_sdw_params_to_config helper function. Signed-off-by:
-
Charles Keepax authored
The conversion from hw_params to SoundWire config is pretty standard as such most of the conversion can be handled by the new snd_sdw_params_to_config helper function. Signed-off-by:
-
Charles Keepax authored
The conversion from hw_params to SoundWire config is pretty standard as such most of the conversion can be handled by the new snd_sdw_params_to_config helper function. Signed-off-by:
-
Charles Keepax authored
The conversion from hw_params to SoundWire config is pretty standard as such most of the conversion can be handled by the new snd_sdw_params_to_config helper function. Signed-off-by:
-
Charles Keepax authored
The conversion from hw_params to SoundWire config is pretty standard as such most of the conversion can be handled by the new snd_sdw_params_to_config helper function. Signed-off-by:
-
Charles Keepax authored
The vast majority of the current users of the SoundWire framework have almost identical code for converting from hw_params to SoundWire configuration. Whilst complex devices might require more, it is very likely that most new devices will follow the same pattern. Save a little code by factoring this out into a helper function. Signed-off-by:
-
Jean Delvare authored
Since commit 0166dc11 ("of: make CONFIG_OF user selectable"), it is possible to test-build any driver which depends on OF on any architecture by explicitly selecting OF. Therefore depending on COMPILE_TEST as an alternative is no longer needed. Signed-off-by:
-
V sujith kumar Reddy authored
ADD HS and SP virtual DAI driver to support AMD platforms. Signed-off-by:
V sujith kumar Reddy <Vsujithkumar.Reddy@amd.com> Link: https://lore.kernel.org/r/20221123121911.3446224-4-vsujithkumar.reddy@amd.corp-partner.google.comSigned-off-by:
-
V sujith kumar Reddy authored
By default clock source is selected as internal clock of 96Mhz which is not configurable. Now we select the clock source to external clock (ACLK) which can be configurable to different clock ranges depending on usecase. Signed-off-by:
-
V sujith kumar Reddy authored
By default the position updates are read from dsp box when streambox size is not defined.if the streambox size is defined to some value then position updates can be read from the streambox. Signed-off-by:
-
Krzysztof Kozlowski authored
On SM8450 and SC8280XP, the Q6APM is a bit different: 1. It is used as a platform DAI link, so it needs #sound-dai-cells. 2. It has two DAI children, so add new "bedais" node. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221115120235.167812-12-krzysztof.kozlowski@linaro.orgSigned-off-by:
-
Krzysztof Kozlowski authored
The Qualcomm DSP LPASS Audio DAIs are a bit different than Qualcomm DSP Audio FrontEnd (Q6AFE) DAIs - they do not use children nodes for each DAI. None of other properties from qcom,q6dsp-lpass-ports.yaml apply here as well, so move the qcom,q6apm-lpass-dais compatible to its own binding. Signed-off-by:
-
Krzysztof Kozlowski authored
The APR/GPR bindings with services got complicated so move out the Q6Core service to its own binding. Previously the compatible was documented in qcom,apr.yaml. Signed-off-by:
-
Krzysztof Kozlowski authored
The APR/GPR bindings with services got complicated so move out the Q6PRM service to its own binding. Previously the compatible was documented in qcom,apr.yaml. Signed-off-by:
-
Krzysztof Kozlowski authored
The APR/GPR bindings with services got complicated so move out the Q6ASM service to its own binding. Previously the compatible was documented in qcom,apr.yaml. Move most of the examples from its children to this new file. Signed-off-by:
-
Krzysztof Kozlowski authored
The APR/GPR bindings with services got complicated so move out the Q6ADM service to its own binding. Previously the compatible was documented in qcom,apr.yaml. Move most of the examples from its children to this new file. Signed-off-by:
-
Krzysztof Kozlowski authored
The APR/GPR bindings with services got complicated so move out the Q6APM service to its own binding. Previously the compatible was documented in qcom,apr.yaml. Move most of the examples from its children to this new file. Signed-off-by:
-
Krzysztof Kozlowski authored
The APR/GPR bindings with services got complicated so move out the Q6AFE service to its own binding. Previously the compatible was documented in qcom,apr.yaml. Move most of the examples from its children to this new file. Signed-off-by:
-
Krzysztof Kozlowski authored
Correct the APR/GPR example: 1. Use consistent 4-space indentation, 2. Add required properties to services nodes, so the binding check passes once schema for these services is improved, 3. Add few other properties as APR/GPR is part of a GLINK edge: qcom,glink-channels and qcom,intents. 4. Drop unnecessary services, to make the example compact. Signed-off-by:
-
Krzysztof Kozlowski authored
The APR/GPR nodes are organized like: apr-or-gpr-device-node <- qcom,apr.yaml apr-gpr-service@[0-9] <- qcom,apr.yaml service-specific-components <- /schemas/sound/qcom,q6*.yaml The schema for services (apr-gpr-service@[0-9]) already grows considerably and is still quite not specific. It allows several incorrect combinations, like adding a clock-controller to a APM device. Restricting it would complicate the schema even more. Bringing new support for sound on Qualcomm SM8450 and SC8280XP SoC would grow it as well. Simplify the qcom,apr.yaml by splitting the services to a shared file which will be: 1. Referenced by qcom,apr.yaml with additionalProperties:true, 2. Referenced by specific bindings for services with additionalProperties:false (not yet in this commit). While moving the code, add also required 'reg' and 'qcom,protection-domain' to further constrain the bindings. Signed-off-by: -
Krzysztof Kozlowski authored
On SM8450 and SC8280XP with Qualcomm GPR, the GLINK channel name (qcom,glink-channels) for ADSP is "adsp_apps". Signed-off-by:
-
- 25 Nov, 2022 7 commits
-
-
Mark Brown authored
Merge series from Nicolas Frattaroli <frattaroli.nicolas@gmail.com>: This patchset refactors the Rockchip I2S/TDM driver in order to support the RK3588 SoC, and then adds the necessary compatible string to load the driver for it. Patch 1 rectifies a problem with the bindings where we were too strict about requiring the rockchip,grf property. Most features of this audio device don't need access to the GRF to function. Patch 2 modifies the driver to adjust its behaviour to what the changed bindings now allow, namely using most things without the GRF. Patch 3 and 4 are boring compatible string stuff that enables RK3588 support. No special data is needed to initialise the driver for this instance of the I2S/TDM IP.
-
Mark Brown authored
Merge series from Maarten Zanders <maarten.zanders@mind.be>: A collection of fixes and improvements for the adau1372 driver.
-
Maarten Zanders authored
The ADAU1372 contains 24bit ADCs and DACs. Allow the driver to use its native mode which uses the same settings as the current 32 bit mode. Signed-off-by:
Maarten Zanders <maarten.zanders@mind.be> Link: https://lore.kernel.org/r/20221028152626.109603-3-maarten.zanders@mind.beSigned-off-by:
-
Maarten Zanders authored
The DAPM control for PGAx uses the PGA mute bit for power management. This bit is active high but is set to non-inverted (ie when powering, it will mute). The ALSA control "PGA x Capture Switch" uses the active high PGA_ENx bit, but is set to inverted. So when enabling this switch, the PGA gets disabled. To correct the behaviour, invert both these bits. Signed-off-by:
-
Maarten Zanders authored
"mclk" is retrieved from the configuration and assigned to adau1372->clk. However adau1372->mclk (==NULL) is used for clk_prepare_enable() and clk_disable_unprepare() which don't have any effect. Remove .clk from struct adau1372 and use .mclk throughout. This change ensures that the input clock is switched on/off when the bias level is changed. Signed-off-by:
-
Jiasheng Jiang authored
As the mtk_btcvsd_snd_write and mtk_btcvsd_snd_read may return error, it should be better to catch the exception. Fixes: 4bd8597d ("ASoC: mediatek: add btcvsd driver") Signed-off-by:
Jiasheng Jiang <jiasheng@iscas.ac.cn> Link: https://lore.kernel.org/r/20221116030750.40500-1-jiasheng@iscas.ac.cnSigned-off-by:
-
Dmitry Torokhov authored
When resetting the block, the reset line is being driven low and then high, which means that the line in DTS should be annotated as "active low". Fixes: 1877c9fd ("ASoC: dt-bindings: add dt bindings for wcd9335 audio codec") Signed-off-by:
Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by:
-
