- 27 Feb, 2010 40 commits
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David Daney authored
The userspace runtime linker uses the elf_platform to find the libraries optimized for the current CPU archecture variant. First we need to allow it to be set to something other than NULL. Follow-on patches will set some values for specific CPUs. GLIBC already does the right thing. The kernel just needs to supply good data. Signed-off-by:
David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/891/Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Manuel Lauss authored
Although the hardware supports a 4/8bit SD interface and the driver unconditionally advertises all hardware caps to the MMC core, not all datalines may actually be wired up. This patch introduces another field to au1xmmc platform data allowing platforms to disable certain advanced host controller features. Signed-off-by:
Manuel Lauss <manuel.lauss@gmail.com> To: linux-mmc@vger.kernel.org CC: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/460/Signed-off-by:
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Florian Fainelli authored
AR7 has a larger physical offset than other MIPS based systems and therefore needs to setup its handlers beyond the usual KSEG0 range. When running the kernel in mapped mode this modification is also required. Remove function comment which is now incorrect. Signed-off-by:
Eugene Konev <ejka@imfi.kspu.ru> Signed-off-by:
Florian Fainelli <florian@openwrt.org> To: linux-mips@linux-mips.org To: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/889/ Patchwork: http://patchwork.linux-mips.org/patch/932/Signed-off-by:
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Florian Fainelli authored
All call sites of set_except_vector are already annotated with __init, so annotate that one too. Signed-off-by:
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Florian Fainelli authored
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Yoichi Yuasa authored
Signed-off-by:
Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/886/Signed-off-by:
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Yoichi Yuasa authored
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pascal@pabr.org authored
I believe these changes are needed on Alchemy SoCs in order to use iomem above 4G with the usual platform_device machinery: - Set CONFIG_ARCH_PHYS_ADDR_T_64BIT to make resource_size_t 64-bit. - Increase IOMEM_RESOURCE_END so that platforms can register resources. To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/814/Signed-off-by:
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Wu Zhangjin authored
In the old source code, I have let halt and poweroff do the same action, but in reality, they have different meanings. As the manpage of shutdown shows: -r Reboot after shutdown. -H Halt action is to halt or drop into boot monitor on systems that support it. -P Halt action is to turn off the power. and in the real world, some machines(e.g. NAS) did not provide a power button and the shutdown works as reset, so, we need to provide a mechanism to let the users turn off the power safely without breaking the system, such a mechanism is "halt", which only put the system into a dead loop or a power-save mode and print some information to the screen to tell the users to turn off the power safely. $ shutdown -hH now /* loongson_halt, not turn off the power */ $ shutdown -hP now /* loongson_poweroff, work as poweroff */ Signed-off-by:
Wu Zhangjin <wuzhangjin@gmail.com> Tested-by:
Liu Shiwei <liushiwei@gmail.com> Cc: Liu Shiwei <liushiwei@gmail.com> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/883/Signed-off-by:
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Wu Zhangjin authored
Found by $ find arch/mips/ -name "*.c" | xargs -i grep -H weak {} | grep -v __weak [Ralf: Made this bulletproof by including <linux/compiler.h>] Signed-off-by: -
Manuel Lauss authored
Hook up the compressed debug output for all Alchemy systems supported by current kernel codebase. Signed-off-by:
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Florian Fainelli authored
This patch makes the ar7 clock code implement the Linux clk API. Drivers using the various clocks available in the SoC are updated accordingly. Signed-off-by:
Wim Van Sebroeck <wim@iguana.be> To: linux-mips@linux-mips.org Cc: Wim Van Sebroeck <wim@iguana.be> Cc: netdev@vger.kernel.org Cc: David Miller <davem@davemloft.net> Patchwork: http://patchwork.linux-mips.org/patch/881/Signed-off-by:
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Florian Fainelli authored
This patch implements gpiolib for the AR7 SoC. Signed-off-by:
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Yoichi Yuasa authored
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Wu Zhangjin authored
This patch removes a useless "\" (line break) and tunes the format of a long line. Signed-off-by:
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Yoichi Yuasa authored
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Yoichi Yuasa authored
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Ralf Baechle authored
Recent git versions now warn about those and they've always been a bit of an annoyance. Signed-off-by: -
Roel Kluin authored
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Roel Kluin <roel.kluin@gmail.com> To: linux-mips@linux-mips.org To: Andrew Morton <akpm@linux-foundation.org> To: LKML <linux-kernel@vger.kernel.org> Patchwork: http://patchwork.linux-mips.org/patch/860/Signed-off-by:
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David Daney authored
For processors that have more than 64 TLBs, we need to decode both config1 and config4 to determine the total number TLBs. Signed-off-by:
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David Daney authored
The function probe_tlb() only does anything for processors that are not PRID_COMP_LEGACY. This is precisely the set of processors for which decode_configs() is called to do identical tlbsize probing calculations. Therefore probe_tlb() is completely redundant and may be removed. Signed-off-by:
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Florian Fainelli authored
MIPS currently lacks the readl_be and writel_be accessors which are required by BCM63xx for OHCI and EHCI support. Let's define them globally for MIPS. This also fixes the compilation of the bcm63xx defconfig against USB. Signed-off-by:
Florian Fainelli <ffainelli@freebox.fr> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Patchwork: http://patchwork.linux-mips.org/patch/793/Signed-off-by:
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Wu Zhangjin authored
Changes: o Serial port related configuration Disable EARLY_PRINTK, CONFIG_SYS_SUPPORTS_ZBOOT_UART16550 Enable the serial port support as module. o PM related support Enable CPUFreq as module, use the external timer(MFGPT) instead of r4k timer. Enable Suspend support Enable Run Time PM support o Enable SM7XX Video Driver Disable the buggy 2d acceleration o Enable CONFIG_OPROFILE as module o Use GZIP instead of LZMA, which need less decompression time o Enable more USB devices support o Enable initrd support(needed by gNewsense) o Enable more crypto support Signed-off-by: -
Wu Zhangjin authored
Currently wuzj@lemote.com is not usable; change it to wuzhangjin@gmail.com. Signed-off-by:
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Wu Zhangjin authored
Replace whitespace by tabs. Signed-off-by:
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Wu Zhangjin authored
This patch add missing whitespace after every "+=" in the loongson related part of arch/mips/Makefile. Signed-off-by:
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Wu Zhangjin authored
Changes: o Move bus_clock into prom_init_env() o Initialize the cpu_clock_freq to the default values for the correspoding processor revisions if no such environment variable passed by BIOS/Bootloader. Signed-off-by:
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Wu Zhangjin authored
prom_argc and prom_argv are only used by prom_init_cmdline(), move them into the function. Signed-off-by:
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Wu Zhangjin authored
The compressed kernel support on loongson family machines is stable now, so, remove the debug information via using SYS_SUPPORTS_ZBOOT instead of SYS_SUPPORTS_ZBOOT_UART16550. This may reduce the image size and speedup the booting. Signed-off-by:
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Wu Zhangjin authored
Use the new unreachable() macro instead of while(1); Signed-off-by:
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Wu Zhangjin authored
Without this patch, when copying large amounts of data between the USB storage devices and the hard disk, the USB device will disconnect regularly. Signed-off-by:
Hu Hongbing <huhb@lemote.com> Signed-off-by:
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Wu Zhangjin authored
Lemote have used the PMON_VER strings to indicate the loongson-2f machine series: PMON_VER=LM8089 Lemote 8.9'' netbook LM8101 Lemote 10.1'' netbook (The above two netbooks have the same kernel support) LM6XXX Lemote FuLoong(2F) box series LM9XXX Lemote LynLoong PC series Before the machtype is supported by the PMON, we can get the machine type from the PMON_VER for these machines, this will help the users a lot. Signed-off-by:
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David Daney authored
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David Daney authored
Octeon ethernet hardware can handle NETIF_F_SG, so we enable it. A gather list of up to six fragments will fit in the SKB's CB structure, so no extra memory is required. If a SKB has more than six fragments, we must linearize it. Signed-off-by:
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David Daney authored
Convert the driver to be a reasonably well behaved NAPI citizen. There is one NAPI instance per CPU shared between all input ports. As receive backlog increases, NAPI is scheduled on additional CPUs. Receive buffer refill code factored out so it can also be called from the periodic timer. This is needed to recover from temporary buffer starvation conditions. Signed-off-by:
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David Daney authored
Stop the queue if too many packets are queued. Restart it from a high resolution timer. Rearrange and simplify locking and SKB freeing code Signed-off-by:
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David Daney authored
After aligning the blocks returned by kmalloc, we need to save the original pointer so they can be correctly freed. There are no guarantees about the alignment of SKB data, so we need to handle worst case alignment. Since right shifts over subtraction have no distributive property, we need to fix the back pointer calculation. Signed-off-by:
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David Daney authored
Remove unused code, reindent, and join some spilt strings. Signed-off-by:
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David Daney authored
If an interrupt handler disables interrupts, the EOI function will just reenable them. This will put us in an endless loop when the upcoming Ethernet driver patches are applied. Only reenable the interrupt on EOI if it is not IRQ_DISABLED. This requires that the EOI function be separate from the ENABLE function. We also rename the ACK functions to correspond with their function. Signed-off-by:
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David Daney authored
In order to achieve correct synchronization semantics, the Octeon port had defined CONFIG_WEAK_REORDERING_BEYOND_LLSC. This resulted in code that looks like: sync ll ... . . . sc ... . . sync The second SYNC was redundant, but harmless. Octeon has a SYNCW instruction that acts as a write-memory-barrier (due to an erratum in some parts two SYNCW are used). It is much faster than SYNC because it imposes ordering on the writes, but doesn't otherwise stall the execution pipeline. On Octeon, SYNC stalls execution until all preceeding writes are committed to the coherent memory system. Using: syncw;syncw ll . . . sc . . Has identical semantics to the first sequence, but is much faster. The SYNCW orders the writes, and the SC will not complete successfully until the write is committed to the coherent memory system. So at the end all preceeding writes have been committed. Since Octeon does not do speculative reads, this functions as a full barrier. The patch removes CONFIG_WEAK_REORDERING_BEYOND_LLSC, and substitutes SYNCW for SYNC in write-memory-barriers. Signed-off-by:
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