1. 05 Dec, 2013 13 commits
    • Geert Uytterhoeven's avatar
      powerpc/windfarm: Remove superfluous name casts · 8bb61fe1
      Geert Uytterhoeven authored
      wf_sensor.name is "const char *"
      Signed-off-by: default avatarGeert Uytterhoeven <geert@linux-m68k.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: linuxppc-dev@lists.ozlabs.org
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      8bb61fe1
    • Mahesh Salgaonkar's avatar
      powerpc/powernv: Machine check exception handling. · b63a0ffe
      Mahesh Salgaonkar authored
      Add basic error handling in machine check exception handler.
      
      - If MSR_RI isn't set, we can not recover.
      - Check if disposition set to OpalMCE_DISPOSITION_RECOVERED.
      - Check if address at fault is inside kernel address space, if not then send
        SIGBUS to process if we hit exception when in userspace.
      - If address at fault is not provided then and if we get a synchronous machine
        check while in userspace then kill the task.
      Signed-off-by: default avatarMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      b63a0ffe
    • Mahesh Salgaonkar's avatar
      powerpc/powernv: Remove machine check handling in OPAL. · 28446de2
      Mahesh Salgaonkar authored
      Now that we are ready to handle machine check directly in linux, do not
      register with firmware to handle machine check exception.
      Signed-off-by: default avatarMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      28446de2
    • Mahesh Salgaonkar's avatar
      powerpc/book3s: Queue up and process delayed MCE events. · b5ff4211
      Mahesh Salgaonkar authored
      When machine check real mode handler can not continue into host kernel
      in V mode, it returns from the interrupt and we loose MCE event which
      never gets logged. In such a situation queue up the MCE event so that
      we can log it later when we get back into host kernel with r1 pointing to
      kernel stack e.g. during syscall exit.
      Signed-off-by: default avatarMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      b5ff4211
    • Mahesh Salgaonkar's avatar
      powerpc/book3s: Decode and save machine check event. · 36df96f8
      Mahesh Salgaonkar authored
      Now that we handle machine check in linux, the MCE decoding should also
      take place in linux host. This info is crucial to log before we go down
      in case we can not handle the machine check errors. This patch decodes
      and populates a machine check event which contain high level meaning full
      MCE information.
      
      We do this in real mode C code with ME bit on. The MCE information is still
      available on emergency stack (in pt_regs structure format). Even if we take
      another exception at this point the MCE early handler will allocate a new
      stack frame on top of current one. So when we return back here we still have
      our MCE information safe on current stack.
      
      We use per cpu buffer to save high level MCE information. Each per cpu buffer
      is an array of machine check event structure indexed by per cpu counter
      mce_nest_count. The mce_nest_count is incremented every time we enter
      machine check early handler in real mode to get the current free slot
      (index = mce_nest_count - 1). The mce_nest_count is decremented once the
      MCE info is consumed by virtual mode machine exception handler.
      
      This patch provides save_mce_event(), get_mce_event() and release_mce_event()
      generic routines that can be used by machine check handlers to populate and
      retrieve the event. The routine release_mce_event() will free the event slot so
      that it can be reused. Caller can invoke get_mce_event() with a release flag
      either to release the event slot immediately OR keep it so that it can be
      fetched again. The event slot can be also released anytime by invoking
      release_mce_event().
      
      This patch also updates kvm code to invoke get_mce_event to retrieve generic
      mce event rather than paca->opal_mce_evt.
      
      The KVM code always calls get_mce_event() with release flags set to false so
      that event is available for linus host machine
      
      If machine check occurs while we are in guest, KVM tries to handle the error.
      If KVM is able to handle MC error successfully, it enters the guest and
      delivers the machine check to guest. If KVM is not able to handle MC error, it
      exists the guest and passes the control to linux host machine check handler
      which then logs MC event and decides how to handle it in linux host. In failure
      case, KVM needs to make sure that the MC event is available for linux host to
      consume. Hence KVM always calls get_mce_event() with release flags set to false
      and later it invokes release_mce_event() only if it succeeds to handle error.
      Signed-off-by: default avatarMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      36df96f8
    • Mahesh Salgaonkar's avatar
      powerpc/book3s: Flush SLB/TLBs if we get SLB/TLB machine check errors on power8. · ae744f34
      Mahesh Salgaonkar authored
      This patch handles the memory errors on power8. If we get a machine check
      exception due to SLB or TLB errors, then flush SLBs/TLBs and reload SLBs to
      recover.
      Signed-off-by: default avatarMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Acked-by: default avatarPaul Mackerras <paulus@samba.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      ae744f34
    • Mahesh Salgaonkar's avatar
      powerpc/book3s: Flush SLB/TLBs if we get SLB/TLB machine check errors on power7. · e22a2274
      Mahesh Salgaonkar authored
      If we get a machine check exception due to SLB or TLB errors, then flush
      SLBs/TLBs and reload SLBs to recover. We do this in real mode before turning
      on MMU. Otherwise we would run into nested machine checks.
      
      If we get a machine check when we are in guest, then just flush the
      SLBs and continue. This patch handles errors for power7. The next
      patch will handle errors for power8
      Signed-off-by: default avatarMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      e22a2274
    • Mahesh Salgaonkar's avatar
      powerpc/book3s: Add flush_tlb operation in cpu_spec. · 04407050
      Mahesh Salgaonkar authored
      This patch introduces flush_tlb operation in cpu_spec structure. This will
      help us to invoke appropriate CPU-side flush tlb routine. This patch
      adds the foundation to invoke CPU specific flush routine for respective
      architectures. Currently this patch introduce flush_tlb for p7 and p8.
      Signed-off-by: default avatarMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Acked-by: default avatarPaul Mackerras <paulus@samba.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      04407050
    • Mahesh Salgaonkar's avatar
      powerpc/book3s: Introduce a early machine check hook in cpu_spec. · 4c703416
      Mahesh Salgaonkar authored
      This patch adds the early machine check function pointer in cputable for
      CPU specific early machine check handling. The early machine handle routine
      will be called in real mode to handle SLB and TLB errors. We can not reuse
      the existing machine_check hook because it is always invoked in kernel
      virtual mode and we would already be in trouble if we get SLB or TLB errors.
      This patch just sets up a mechanism to invoke CPU specific handler. The
      subsequent patches will populate the function pointer.
      Signed-off-by: default avatarMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Acked-by: default avatarPaul Mackerras <paulus@samba.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      4c703416
    • Mahesh Salgaonkar's avatar
      powerpc/book3s: Return from interrupt if coming from evil context. · 1c51089f
      Mahesh Salgaonkar authored
      We can get machine checks from any context. We need to make sure that
      we handle all of them correctly. If we are coming from hypervisor user-space,
      we can continue in host kernel in virtual mode to deliver the MC event.
      If we got woken up from power-saving mode then we may come in with one of
      the following state:
       a. No state loss
       b. Supervisor state loss
       c. Hypervisor state loss
      For (a) and (b), we go back to nap again. State (c) is fatal, keep spinning.
      
      For all other context which we not sure of queue up the MCE event and return
      from the interrupt.
      Signed-off-by: default avatarMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      1c51089f
    • Mahesh Salgaonkar's avatar
      powerpc/book3s: handle machine check in Linux host. · 1e9b4507
      Mahesh Salgaonkar authored
      Move machine check entry point into Linux. So far we were dependent on
      firmware to decode MCE error details and handover the high level info to OS.
      
      This patch introduces early machine check routine that saves the MCE
      information (srr1, srr0, dar and dsisr) to the emergency stack. We allocate
      stack frame on emergency stack and set the r1 accordingly. This allows us to be
      prepared to take another exception without loosing context. One thing to note
      here that, if we get another machine check while ME bit is off then we risk a
      checkstop. Hence we restrict ourselves to save only MCE information and
      register saved on PACA_EXMC save are before we turn the ME bit on. We use
      paca->in_mce flag to differentiate between first entry and nested machine check
      entry which helps proper use of emergency stack. We increment paca->in_mce
      every time we enter in early machine check handler and decrement it while
      leaving. When we enter machine check early handler first time (paca->in_mce ==
      0), we are sure nobody is using MC emergency stack and allocate a stack frame
      at the start of the emergency stack. During subsequent entry (paca->in_mce >
      0), we know that r1 points inside emergency stack and we allocate separate
      stack frame accordingly. This prevents us from clobbering MCE information
      during nested machine checks.
      
      The early machine check handler changes are placed under CPU_FTR_HVMODE
      section. This makes sure that the early machine check handler will get executed
      only in hypervisor kernel.
      
      This is the code flow:
      
      		Machine Check Interrupt
      			|
      			V
      		   0x200 vector				  ME=0, IR=0, DR=0
      			|
      			V
      	+-----------------------------------------------+
      	|machine_check_pSeries_early:			| ME=0, IR=0, DR=0
      	|	Alloc frame on emergency stack		|
      	|	Save srr1, srr0, dar and dsisr on stack |
      	+-----------------------------------------------+
      			|
      		(ME=1, IR=0, DR=0, RFID)
      			|
      			V
      		machine_check_handle_early		  ME=1, IR=0, DR=0
      			|
      			V
      	+-----------------------------------------------+
      	|	machine_check_early (r3=pt_regs)	| ME=1, IR=0, DR=0
      	|	Things to do: (in next patches)		|
      	|		Flush SLB for SLB errors	|
      	|		Flush TLB for TLB errors	|
      	|		Decode and save MCE info	|
      	+-----------------------------------------------+
      			|
      	(Fall through existing exception handler routine.)
      			|
      			V
      		machine_check_pSerie			  ME=1, IR=0, DR=0
      			|
      		(ME=1, IR=1, DR=1, RFID)
      			|
      			V
      		machine_check_common			  ME=1, IR=1, DR=1
      			.
      			.
      			.
      Signed-off-by: default avatarMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      1e9b4507
    • Mahesh Salgaonkar's avatar
      powerpc/book3s: Introduce exclusive emergency stack for machine check exception. · 729b0f71
      Mahesh Salgaonkar authored
      This patch introduces exclusive emergency stack for machine check exception.
      We use emergency stack to handle machine check exception so that we can save
      MCE information (srr1, srr0, dar and dsisr) before turning on ME bit and be
      ready for re-entrancy. This helps us to prevent clobbering of MCE information
      in case of nested machine checks.
      
      The reason for using emergency stack over normal kernel stack is that the
      machine check might occur in the middle of setting up a stack frame which may
      result into improper use of kernel stack.
      Signed-off-by: default avatarMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Acked-by: default avatarPaul Mackerras <paulus@samba.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      729b0f71
    • Mahesh Salgaonkar's avatar
      powerpc/book3s: Split the common exception prolog logic into two section. · b14a7253
      Mahesh Salgaonkar authored
      This patch splits the common exception prolog logic into three parts to
      facilitate reuse of existing code in the next patch. This patch also
      re-arranges few instructions in such a way that the second part now deals
      with saving register values from paca save area to stack frame, and
      the third part deals with saving current register values to stack frame.
      
      The second and third part will be reused in the machine check exception
      routine in the subsequent patch.
      
      Please note that this patch does not introduce or change existing code
      logic. Instead it is just a code movement and instruction re-ordering.
      
      Patch Acked-by Paul. But made some minor modification (explained above) to
      address Paul's comment in the later patch(3).
      Signed-off-by: default avatarMahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
      Acked-by: default avatarPaul Mackerras <paulus@samba.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      b14a7253
  2. 02 Dec, 2013 12 commits
  3. 27 Nov, 2013 1 commit
  4. 25 Nov, 2013 5 commits
    • Chen Gang's avatar
      arch/powerpc/kernel: Use %12.12s instead of %12s to avoid memory overflow · e0513d9e
      Chen Gang authored
      for tmp_part->header.name:
          it is "Terminating null required only for names < 12 chars".
          so need to limit the %.12s for it in printk
      
        additional info:
      
          %12s  limit the width, not for the original string output length
                if name length is more than 12, it still can be fully displayed.
                if name length is less than 12, the ' ' will be filled before name.
      
          %.12s truly limit the original string output length (precision)
      Signed-off-by: default avatarChen Gang <gang.chen@asianux.com>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      e0513d9e
    • Michael Neuling's avatar
      powerpc/signals: Improved mark VSX not saved with small contexts fix · ec67ad82
      Michael Neuling authored
      In a recent patch:
        commit c13f20ac
        Author: Michael Neuling <mikey@neuling.org>
        powerpc/signals: Mark VSX not saved with small contexts
      
      We fixed an issue but an improved solution was later discussed after the patch
      was merged.
      
      Firstly, this patch doesn't handle the 64bit signals case, which could also hit
      this issue (but has never been reported).
      
      Secondly, the original patch isn't clear what MSR VSX should be set to.  The
      new approach below always clears the MSR VSX bit (to indicate no VSX is in the
      context) and sets it only in the specific case where VSX is available (ie. when
      VSX has been used and the signal context passed has space to provide the
      state).
      
      This reverts the original patch and replaces it with the improved solution.  It
      also adds a 64 bit version.
      Signed-off-by: default avatarMichael Neuling <mikey@neuling.org>
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      ec67ad82
    • Hari Bathini's avatar
      powerpc/kdump: Adding symbols in vmcoreinfo to facilitate dump filtering · 8ff81271
      Hari Bathini authored
      When CONFIG_SPARSEMEM_VMEMMAP option is used in kernel, makedumpfile fails
      to filter vmcore dump as it fails to do vmemmap translations. So far
      dump filtering on ppc64 never had to deal with vmemmap addresses seperately
      as vmemmap regions where mapped in zone normal. But with the inclusion of
      CONFIG_SPARSEMEM_VMEMMAP config option in kernel, this vmemmap address
      translation support becomes necessary for dump filtering. For vmemmap adress
      translation, few kernel symbols are needed by dump filtering tool. This patch
      adds those symbols to vmcoreinfo, which a dump filtering tool can use for
      filtering the kernel dump. Tested this changes successfully with makedumpfile
      tool that supports vmemmap to physical address translation outside zone normal.
      
      [ Removed unneeded #ifdef as suggested by Michael Ellerman --BenH ]
      Signed-off-by: default avatarHari Bathini <hbathini@linux.vnet.ibm.com>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      8ff81271
    • Anton Blanchard's avatar
      powerpc: allyesconfig should not select CONFIG_CPU_LITTLE_ENDIAN · 962bc221
      Anton Blanchard authored
      Stephen reported a failure in an allyesconfig build.
      CONFIG_CPU_LITTLE_ENDIAN=y gets set but his toolchain is not
      new enough to support little endian. We really want to
      default to a big endian build; Ben suggested using a choice
      which defaults to CPU_BIG_ENDIAN.
      Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      962bc221
    • Michael Neuling's avatar
      powerpc: Fix error when cross building TAGS & cscope · 924dd50b
      Michael Neuling authored
      Currently if I cross build TAGS or cscope from x86 I get this:
        % make ARCH=powerpc TAGS
        gcc-4.8.real: error: unrecognized command line option ‘-mbig-endian’
        GEN     TAGS
        %
      
      I'm not setting CROSS_COMPILE= as logically I shouldn't need to and I
      haven't needed to in the past when building TAGS or cscope.  Also, the
      above completess correct as the error is not fatal to the build.
      
      This was caused by:
          commit d72b0801
          Author: Ian Munsie <imunsie@au1.ibm.com>
          powerpc: Add ability to build little endian kernels
      
      The below fixes this by testing for the -mbig-endian option before
      adding it.
      
      I've not done the same thing in the little endian case as if
      -mlittle-endian doesn't exist, we probably want to fail quickly as you
      probably have an old big endian compiler.
      Signed-off-by: default avatarMichael Neuling <mikey@neuling.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      924dd50b
  5. 24 Nov, 2013 1 commit
  6. 22 Nov, 2013 8 commits
    • Scott Wood's avatar
      powerpc/booke: Only check for hugetlb in flush if vma != NULL · d742aa15
      Scott Wood authored
      And in flush_hugetlb_page(), don't check whether vma is NULL after
      we've already dereferenced it.
      
      This was found by Dan using static analysis as described here:
      https://lists.ozlabs.org/pipermail/linuxppc-dev/2013-November/113161.html
      
      We currently get away with this because the callers that currently pass
      NULL for vma seem to be 32-bit-only (e.g. highmem, and
      CONFIG_DEBUG_PGALLOC in pgtable_32.c)  Hugetlb is currently 64-bit only,
      so we never saw a NULL vma here.
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      Reported-by: default avatarDan Carpenter <dan.carpenter@oracle.com>
      d742aa15
    • Adam Borowski's avatar
      powerpc/85xx: typo in dts: "interupt" (four devices) · 53567cf3
      Adam Borowski authored
      These lines were inoperative for four years, which puts some doubt into
      their importance, and it's possible the fixed version will regress, but
      at the very least they should be removed instead.
      Signed-off-by: default avatarAdam Borowski <kilobyte@angband.pl>
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      53567cf3
    • LEROY Christophe's avatar
      powerpc/8xx: mfspr SPRN_TBRx in lieu of mftb/mftbu is not supported · ae2163be
      LEROY Christophe authored
      Commit beb2dc0a breaks the MPC8xx which
      seems to not support using mfspr SPRN_TBRx instead of mftb/mftbu
      despite what is written in the reference manual.
      
      This patch reverts to the use of mftb/mftbu when CONFIG_8xx is
      selected.
      Signed-off-by: default avatarChristophe Leroy <christophe.leroy@c-s.fr>
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      ae2163be
    • Tiejun Chen's avatar
      powerpc/corenet64: compile with CONFIG_E{5,6}500_CPU well · cbf8a358
      Tiejun Chen authored
      If CONFIG_ALTIVEC is enabled for CoreNet64, and if we also
      select CONFIG_E{5,6}500_CPU this may introduce -mcpu=e500mc64
      into $CFLAGS. But Altivec option not allowed with e500mc64,
      then some compiling errors occur like this:
      
            CC      arch/powerpc/lib/xor_vmx.o
          arch/powerpc/lib/xor_vmx.c:1:0: error: AltiVec not supported in this target
          make[1]: *** [arch/powerpc/lib/xor_vmx.o] Error 1
          make: *** [arch/powerpc/lib] Error 2
      
      So we should restrict e500mc64 in altivec scenario.
      Signed-off-by: default avatarTiejun Chen <tiejun.chen@windriver.com>
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      cbf8a358
    • Linus Torvalds's avatar
      Linux 3.13-rc1 · 6ce4eac1
      Linus Torvalds authored
      6ce4eac1
    • Linus Torvalds's avatar
      Merge tag 'ecryptfs-3.13-rc1-quiet-checkers' of... · 57498f9c
      Linus Torvalds authored
      Merge tag 'ecryptfs-3.13-rc1-quiet-checkers' of git://git.kernel.org/pub/scm/linux/kernel/git/tyhicks/ecryptfs
      
      Pull minor eCryptfs fix from Tyler Hicks:
       "Quiet static checkers by removing unneeded conditionals"
      
      * tag 'ecryptfs-3.13-rc1-quiet-checkers' of git://git.kernel.org/pub/scm/linux/kernel/git/tyhicks/ecryptfs:
        eCryptfs: file->private_data is always valid
      57498f9c
    • Linus Torvalds's avatar
      Merge tag 'sound-fix2-3.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound · e48f88a3
      Linus Torvalds authored
      Pull second set of sound fixes from Takashi Iwai:
       "A collection of small fixes in HD-audio quirks and runtime PM, ASoC
        rcar, abs8500 and other codecs.  Most of commits are for stable
        kernels, too"
      
      * tag 'sound-fix2-3.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
        ALSA: hda - Set current_headset_type to ALC_HEADSET_TYPE_ENUM (janitorial)
        ALSA: hda - Provide missing pin configs for VAIO with ALC260
        ALSA: hda - Add headset quirk for Dell Inspiron 3135
        ALSA: hda - Fix the headphone jack detection on Sony VAIO TX
        ALSA: hda - Fix missing bass speaker on ASUS N550
        ALSA: hda - Fix unbalanced runtime PM notification at resume
        ASoC: arizona: Set FLL to free-run before disabling
        ALSA: hda - A casual Dell Headset quirk
        ASoC: rcar: fixup dma_async_issue_pending() timing
        ASoC: rcar: off by one in rsnd_scu_set_route()
        ASoC: wm5110: Add post SYSCLK register patch for rev D chip
        ASoC: ab8500: Revert to using custom I/O functions
        ALSA: hda - Also enable mute/micmute LED control for "Lenovo dock" fixup
        ALSA: firewire-lib: include sound/asound.h to refer to snd_pcm_format_t
        ALSA: hda - Select FW_LOADER from CONFIG_SND_HDA_CODEC_CA0132_DSP
        ALSA: hda - Enable mute/mic-mute LEDs for more Thinkpads with Realtek codec
        ASoC: rcar: fixup mod access before checking
      e48f88a3
    • Linus Torvalds's avatar
      Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux · aecde27c
      Linus Torvalds authored
      Pull DRM fixes from Dave Airlie:
       "I was going to leave this until post -rc1 but sysfs fixes broke
        hotplug in userspace, so I had to fix it harder, otherwise a set of
        pulls from intel, radeon and vmware,
      
        The vmware/ttm changes are bit larger but since its early and they are
        unlikely to break anything else I put them in, it lets vmware work
        with dri3"
      
      * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: (36 commits)
        drm/sysfs: fix hotplug regression since lifetime changes
        drm/exynos: g2d: fix memory leak to userptr
        drm/i915: Fix gen3 self-refresh watermarks
        drm/ttm: Remove set_need_resched from the ttm fault handler
        drm/ttm: Don't move non-existing data
        drm/radeon: hook up backlight functions for CI and KV family.
        drm/i915: Replicate BIOS eDP bpp clamping hack for hsw
        drm/i915: Do not enable package C8 on unsupported hardware
        drm/i915: Hold pc8 lock around toggling pc8.gpu_idle
        drm/i915: encoder->get_config is no longer optional
        drm/i915/tv: add ->get_config callback
        drm/radeon/cik: Add macrotile mode array query
        drm/radeon/cik: Return backend map information to userspace
        drm/vmwgfx: Make vmwgfx dma buffers prime aware
        drm/vmwgfx: Make surfaces prime-aware
        drm/vmwgfx: Hook up the prime ioctls
        drm/ttm: Add a minimal prime implementation for ttm base objects
        drm/vmwgfx: Fix false lockdep warning
        drm/ttm: Allow execbuf util reserves without ticket
        drm/i915: restore the early forcewake cleanup
        ...
      aecde27c