- 09 Jul, 2024 13 commits
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Arnd Bergmann authored
Merge tag 'qcom-drivers-for-6.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers A few more Qualcomm driver updates for v6.11 This adds a quirk to skip using the newly introduced SHM Bridge implementation while regressions are being investigated. One occurance of return no_free_ptr() is replaced with return_ptr() to make code easier to read. llcc, mdt_loader, ocmem, pdr, socinfo and wcnss drivers gets simplified using cleanup.h. * tag 'qcom-drivers-for-6.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: firmware: qcom: tzmem: blacklist more platforms for SHM Bridge soc: qcom: wcnss: simplify with cleanup.h soc: qcom: pdr: simplify with cleanup.h soc: qcom: ocmem: simplify with cleanup.h soc: qcom: mdt_loader: simplify with cleanup.h soc: qcom: llcc: simplify with cleanup.h firmware: qcom: tzmem: simplify returning pointer without cleanup soc: qcom: socinfo: Add PM6350 PMIC Link: https://lore.kernel.org/r/20240709191246.3053-1-andersson@kernel.orgSigned-off-by:
Arnd Bergmann <arnd@arndb.de>
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https://github.com/Xilinx/linux-xlnxArnd Bergmann authored
arm64: Xilinx SoC changes for 6.11 Timer - Fix u32 overflow issue in 32-bit width PWM mode. Event manager: - rename cpu_number1 to dummy_cpu_number Power: - Add cb event for subsystem restart - check return status of get_api_version() Firmware: - Move FIRMWARE_VERSION_MASK to xlnx-zynqmp.h * tag 'zynqmp-soc2-for-6.11' of https://github.com/Xilinx/linux-xlnx: drivers: soc: xilinx: check return status of get_api_version() firmware: xilinx: Move FIRMWARE_VERSION_MASK to xlnx-zynqmp.h soc: xilinx: Add cb event for subsystem restart soc: xilinx: rename cpu_number1 to dummy_cpu_number pwm: xilinx: Fix u32 overflow issue in 32-bit width PWM mode. Link: https://lore.kernel.org/r/CAHTX3dKMtqgNpkEvrw0p2w+SPN83Ai1_kzhefUGOO5rMkPaH_w@mail.gmail.comSigned-off-by:
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Marek Behún authored
Add depend on WATCHDOG, otherwise modpost fails with ERROR: modpost: "watchdog_init_timeout" [drivers/platform/cznic/turris-omnia-mcu.ko] undefined! ERROR: modpost: "devm_watchdog_register_device" [drivers/platform/cznic/turris-omnia-mcu.ko] undefined! Fixes: ab89fb5f ("platform: cznic: turris-omnia-mcu: Add support for MCU watchdog") Reported-by:
kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202407040711.g19y3cWq-lkp@intel.com/Signed-off-by:
Marek Behún <kabel@kernel.org> Link: https://lore.kernel.org/r/20240708114002.4285-3-kabel@kernel.orgSigned-off-by:
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Marek Behún authored
Add depend on OF, otherwise the compilation fails with error: no member named 'of_gpio_n_cells' in 'struct gpio_chip' error: no member named 'of_xlate' in 'struct gpio_chip' Fixes: dfa556e4 ("platform: cznic: turris-omnia-mcu: Add support for MCU connected GPIOs") Reported-by:
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Peter Griffin authored
Not all registers in PMU_ALIVE block support atomic set/clear operations. GS101_SYSIP_DAT0 and GS101_SYSTEM_CONFIGURATION registers are two regs where attempting atomic access fails. As documentation on exactly which registers support atomic operations is not forthcoming. We default to atomic access, unless the register is explicitly added to the tensor_is_atomic() function. Update the comment to reflect this as well. Reviewed-by:
Will McVicker <willmcvicker@google.com> Tested-by:
Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20240628223506.1237523-4-peter.griffin@linaro.orgSigned-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240702063514.6215-2-krzysztof.kozlowski@linaro.orgSigned-off-by:
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Arnd Bergmann authored
Merge tag 'memory-controller-drv-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers Memory controller drivers for v6.11 Make the Freescale IFC driver selectable because it is used now by two drivers: Freescale NAND and generic NOR flash. The patches adjusting defconfig are waiting on the mailing lists to be picked up. * tag 'memory-controller-drv-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: dt-bindings: memory: fsl: replace maintainer memory: fsl_ifc: Make FSL_IFC config visible and selectable Link: https://lore.kernel.org/r/20240702070212.8291-1-krzysztof.kozlowski@linaro.orgSigned-off-by:
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Arnd Bergmann authored
Merge tag 'sunxi-drivers-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/drivers Allwinner SoC driver changes for 6.11 - DT binding addition of regulator node under SRAM node - Cleanup of unused list in SRAM driver * tag 'sunxi-drivers-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: dt-bindings: sram: sunxi-sram: Add regulators child soc: sunxi: sram: Remove unused list 'claimed_sram' Link: https://lore.kernel.org/r/ZoQZguQ6taJziJ11@wens.twSigned-off-by:
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git://git.pengutronix.de/pza/linuxArnd Bergmann authored
Reset controller updates for v6.11, part 2 This tag adds USB VBUS regulator control for Renesas RZ/G2L SoCs, which also touches PHY driver and device tree, and pulls in a new regulator_hardware_enable() helper. The Tegra BPMP reset driver can be compiled under COMPILE_TEST now. * tag 'reset-for-v6.11-2' of git://git.pengutronix.de/pza/linux: arm64: dts: renesas: rz-smarc: Replace fixed regulator for USB VBUS phy: renesas: phy-rcar-gen3-usb2: Control VBUS for RZ/G2L SoCs reset: renesas: Add USB VBUS regulator device as child dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document USB VBUS regulator reset: tegra-bpmp: allow building under COMPILE_TEST regulator: core: Add helper for allow HW access to enable/disable regulator Link: https://lore.kernel.org/r/20240703100809.2773890-1-p.zabel@pengutronix.deSigned-off-by:
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Arnd Bergmann authored
Merge tag 'qcom-drivers-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.11 Support for Shared Memory (shm) Bridge is added, which provides a stricter interface for handling of buffers passed to TrustZone. The X1Elite platform is added to uefisecapp allow list, to instantiate the efivars implementation. A new in-kernel implementation of the pd-mapper (or servreg) service is introduced, to replace the userspace dependency for USB Type-C and battery management. Support for sharing interrupts across multiple bwmon instances is added, and a refcount imbalance issue is corrected. The LLCC support for recent platforms is corrected, and SA8775P support is added. A new interface is added to SMEM, to expose "feature codes". One example of the usecase for this is to indicate to the GPU driver which frequencies are available on the given device. The interrupt consumer and provider side of SMP2P is updated to provide more useful names in interrupt stats. Support for using the mailbox binding and driver for outgoing IPC interrupt in the SMSM driver is introduced. socinfo driver learns about SDM670 and IPQ5321, as well as get some updates to the X1E PMICs. pmic_glink is bumped to now support managing 3 USB Type-C ports. * tag 'qcom-drivers-for-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (48 commits) soc: qcom: smp2p: Use devname for interrupt descriptions soc: qcom: smsm: Add missing mailbox dependency to Kconfig soc: qcom: add missing pd-mapper dependencies soc: qcom: icc-bwmon: Allow for interrupts to be shared across instances dt-bindings: interconnect: qcom,msm8998-bwmon: Add X1E80100 BWMON instances dt-bindings: interconnect: qcom,msm8998-bwmon: Remove opp-table from the required list firmware: qcom: tzmem: export devm_qcom_tzmem_pool_new() soc: qcom: add pd-mapper implementation soc: qcom: pdr: extract PDR message marshalling data soc: qcom: pdr: fix parsing of domains lists soc: qcom: pdr: protect locator_addr with the main mutex firmware: qcom: scm: clarify the comment in qcom_scm_pas_init_image() firmware: qcom: scm: add support for SHM bridge memory carveout firmware: qcom: tzmem: enable SHM Bridge support firmware: qcom: scm: add support for SHM bridge operations firmware: qcom: qseecom: convert to using the TZ allocator firmware: qcom: scm: make qcom_scm_qseecom_app_get_id() use the TZ allocator firmware: qcom: scm: make qcom_scm_lmh_dcvsh() use the TZ allocator firmware: qcom: scm: make qcom_scm_ice_set_key() use the TZ allocator firmware: qcom: scm: make qcom_scm_assign_mem() use the TZ allocator ... Link: https://lore.kernel.org/r/20240705034410.13968-1-andersson@kernel.orgSigned-off-by:
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Pascal Paillet authored
Add SCMI ARM REGULATOR configuration for stm32. Signed-off-by:
Pascal Paillet <p.paillet@foss.st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@foss.st.com> Acked-by:
Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20240705134554.2833835-1-alexandre.torgue@foss.st.comSigned-off-by:
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Arnd Bergmann authored
Merge tag 'ti-driver-soc-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/drivers TI SoC driver updates for v6.11 - Update TISCI protocol URL link which was dead - socinfo: Add j721E SR 2.0 detection support - MAINTAINER list additions: ti,pruss.yaml and ti,j721e-system-controller.yaml - pm33xx: log statement improvement - knav_qmss: minor data structure optimization * tag 'ti-driver-soc-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: dt-bindings: soc: ti: Move ti,j721e-system-controller.yaml to soc/ti MAINTAINERS: Add entry for ti,pruss.yaml to TI KEYSTONE MULTICORE NAVIGATOR DRIVERS soc: ti: k3-socinfo: Add J721E SR2.0 soc: ti: knav_qmss: Constify struct knav_range_ops firmware: ti_sci: fix TISCI protocol URL link dt-bindings: ti: fix TISCI protocol URL link soc: ti: pm33xx: Fix missing newlines in log statements Link: https://lore.kernel.org/r/20240705151449.s4rngkehjn73favn@streamSigned-off-by:
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Arnd Bergmann authored
Merge tag 'riscv-firmware-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V firmware drivers for v6.11 Microchip: Support for writing "bitstream info" to the flash using the auto-update driver. At this point the "bitstream info" is a glorified dtbo wrapper, but there's plans to add more info there in the future. Additionally, rework some allocations in the driver and use scope-based cleanup on them. Signed-off-by:
Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-firmware-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: firmware: microchip: use scope-based cleanup where possible firmware: microchip: move buffer allocation into mpfs_auto_update_set_image_address() firmware: microchip: support writing bitstream info to flash Link: https://lore.kernel.org/r/20240707-lukewarm-film-8a9da40a1c27@spudSigned-off-by:
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Arnd Bergmann authored
Merge tag 'riscv-cache-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V cache drivers for v6.11 StarFive: A new driver for the cache controller on the jh8100, which didn't implement Zicbom and thus needs an implementation of non-standard cache management operations. Signed-off-by:
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- 08 Jul, 2024 1 commit
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Arnd Bergmann authored
Merge tag 'tegra-for-6.11-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers soc/tegra: Changes for v6.11-rc1 This is a simple change that condenses two function calls into one in two places to save some boilerplate. * tag 'tegra-for-6.11-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: pmc: Simplify resource lookup Link: https://lore.kernel.org/r/20240628210818.3627404-1-thierry.reding@gmail.comSigned-off-by:
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- 06 Jul, 2024 8 commits
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Dmitry Baryshkov authored
The SHM bridge makes the Qualcomm RB3 and SM8150-HDK reset while probing the RMTFS (in qcom_scm_assign_mem()). Blacklist the SHM Bridge on corresponding platforms using SoC-level compat string. If later it's found that the bad behaviour is limited just to the particular boards rather than SoC, the compat strings can be adjusted. Reported-by:
Neil Armstrong <neil.armstrong@linaro.org> Fixes: f86c6149 ("firmware: qcom: tzmem: enable SHM Bridge support") Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by:
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on Qualcomm RB3 Link: https://lore.kernel.org/r/20240704-shmbridge-blacklist-v1-1-14b027b3b2dc@linaro.orgSigned-off-by:
Bjorn Andersson <andersson@kernel.org>
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Krzysztof Kozlowski authored
Allocate the memory with scoped/cleanup.h to reduce error handling (less error paths) and make the code a bit simpler. Signed-off-by:
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Krzysztof Kozlowski authored
Allocate the memory with scoped/cleanup.h to reduce error handling (less error paths) and make the code a bit simpler. Signed-off-by:
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Krzysztof Kozlowski authored
Allocate the memory with scoped/cleanup.h to reduce error handling (less error paths) and make the code a bit simpler. Signed-off-by:
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Krzysztof Kozlowski authored
Allocate the memory with scoped/cleanup.h to reduce error handling and make the code a bit simpler. Signed-off-by:
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Krzysztof Kozlowski authored
Allocate the memory with scoped/cleanup.h to reduce error handling and make the code a bit simpler. Signed-off-by:
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Krzysztof Kozlowski authored
Use 'return_ptr' helper for returning a pointer without cleanup for shorter code. Signed-off-by:
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Luca Weiss authored
Add the ID for the PM6350 PMIC found on e.g. SM7225 Fairphone 4. Signed-off-by:
Luca Weiss <luca.weiss@fairphone.com> Reviewed-by:
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- 03 Jul, 2024 5 commits
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Biju Das authored
Replace the fixed regulator for USB VBUS and use the proper one that controls regulator based on VBUS detection. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Acked-by:
Philipp Zabel <p.zabel@pengutronix.de>
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Biju Das authored
Use regulator_hardware_enable() for controlling VBUS enable for RZ/G2L alike SoCs in interrupt context. Signed-off-by:
Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20240702180032.207275-4-biju.das.jz@bp.renesas.comSigned-off-by:
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Biju Das authored
As per RZ/G2L HW manual, VBUS enable can be controlled by the VBOUT bit of the VBUS Control Register(VBENCTL) register in the USBPHY Control. Expose this register as regmap and instantiate the USB VBUS regulator device, so that consumer can control the vbus using regulator API's Signed-off-by:
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Biju Das authored
The VBUS enable can be controlled by the VBOUT bit of the VBUS control register. This register is part of usbphy-ctrl IP. Document the USB VBUS regulator object. Signed-off-by:
Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20240702180032.207275-2-biju.das.jz@bp.renesas.comSigned-off-by:
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Philipp Zabel authored
Merge tag 'regulator-hw-enable-helper' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator into reset/next regulator: Add helper to allow enable/disable in interrupt context Add a helper function that enables exclusive consumers to bypass locking and do an enable/disable from within interrupt context. Link: https://lore.kernel.org/r/988df019-00d4-4209-8716-39e82c565bf1@sirena.org.ukSigned-off-by:
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- 02 Jul, 2024 2 commits
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Chris Lew authored
When using /proc/interrupts to collect statistics on smp2p interrupt counts, it is hard to distinguish the different instances of smp2p from each other. For example to debug a processor boot issue, the ready and handover interrupts are checked for sanity to ensure the firmware reached a specific initialization stage. Remove "smp2p" string from the irq request so that the irq will default to the device name. Add an .irq_print_chip() callback to print the irq chip name as the device name. These two changes allow for a unique name to be used in /proc/interrupts as shown below. / # cat /proc/interrupts | grep smp2p 18: ... ipcc 196610 Edge smp2p-adsp 20: ... ipcc 131074 Edge smp2p-modem 170: ... smp2p-modem 1 Edge q6v5 ready 178: ... smp2p-adsp 1 Edge q6v5 ready Signed-off-by:
Chris Lew <quic_clew@quicinc.com> Reviewed-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20240627104831.4176799-2-quic_sudeepgo@quicinc.comSigned-off-by:
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Luca Weiss authored
Since the smsm driver got the ability to interact with the mailbox using the mailbox subsystem and not just syscon, we need to add the dependency to kconfig as well to avoid compile errors. Fixes: 75287992 ("soc: qcom: smsm: Support using mailbox interface") Reported-by:
Luca Weiss <luca@lucaweiss.eu> Reviewed-by:
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- 01 Jul, 2024 10 commits
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Dmitry Baryshkov authored
The pd-mapper driver uses auxiliary bus and Qualcomm PDR message format data. Add missing dependencies to the driver's Kconfig entry. Reported-by:
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Arnd Bergmann authored
Merge tag 'amlogic-drivers-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/drivers Amlogic drivers changes for v6.11: - Add S905L & A113X SoC IDs - add missing MODULE_DESCRIPTION() macro for meson_sm driver * tag 'amlogic-drivers-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: firmware: meson_sm: add missing MODULE_DESCRIPTION() macro soc: amlogic: meson-gx-socinfo: add new A113X SoC id soc: amlogic: meson-gx-socinfo: Add S905L ID Link: https://lore.kernel.org/r/35093904-c4a8-432d-b010-a994fc1ee536@linaro.orgSigned-off-by:
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Marek Behún authored
Add support for true random number generator provided by the MCU. New Omnia boards come without the Atmel SHA204-A chip. Instead the crypto functionality is provided by new microcontroller, which has a TRNG peripheral. Signed-off-by:
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Marek Behún authored
Add support for the watchdog mechanism provided by the MCU. Signed-off-by:
Andy Shevchenko <andy@kernel.org> Reviewed-by:
Guenter Roeck <linux@roeck-us.net> Acked-by:
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Marek Behún authored
Add support for true board poweroff (MCU can disable all unnecessary voltage regulators) and wakeup at a specified time, implemented via a RTC driver so that the rtcwake utility can be used to configure it. Signed-off-by:
Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by:
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Marek Behún authored
Add support for GPIOs connected to the MCU on the Turris Omnia board. This includes: - front button pin - enable pins for USB regulators - MiniPCIe / mSATA card presence pins in MiniPCIe port 0 - LED output pins from WAN ethernet PHY, LAN switch and MiniPCIe ports - on board revisions 32+ also various peripheral resets and another voltage regulator enable pin Signed-off-by:
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Marek Behún authored
Add the basic skeleton for a new platform driver for the microcontroller found on the Turris Omnia board. Signed-off-by:
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Marek Behún authored
Add binding for cznic,turris-omnia-mcu, the device-tree node representing the system-controller features provided by the MCU on the Turris Omnia router. Signed-off-by:
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Roger Quadros authored
soc/ti is the more appropriate location for the system controller device tree binding documentation so move there. Update Kishon's email address to a working one. Signed-off-by:
Roger Quadros <rogerq@kernel.org> Acked-by:
Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20240520-for-v6-11-j721e-syscon-v1-1-f57a93e12cad@kernel.orgSigned-off-by:
Nishanth Menon <nm@ti.com>
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Philipp Zabel authored
The Tegra BPMP reset driver can be compiled without TEGRA_BPMP being enabled. Allow it to be built under COMPILE_TEST. Acked-by:
Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20240625-reset-compile-bpmp-v1-1-647e846303d8@pengutronix.deSigned-off-by:
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- 30 Jun, 2024 1 commit
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Samuel Holland authored
Some sunxi SoCs have in-package regulators controlled by a register in the system control MMIO block. Allow a child node for this regulator device in addition to SRAM child nodes. Signed-off-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
Chen-Yu Tsai <wens@csie.org>
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