1. 09 Aug, 2009 4 commits
    • Mike Galbraith's avatar
      perf_counter tools: Fix/resurrect perf top annotation in a simple interactive form · 923c42c1
      Mike Galbraith authored
      perf top used to have annotation support, but it has bitrotted and
      removed.
      
      This patch restores that: it allows the user to select any symbol
      in kernel space for source level annotation on the fly, switch
      between event counters and alter display variables. When symbol
      details are being displayed, stopping annotation reverts to normal.
      
      known keys:
              [d]     select display delay.
              [e]     select display entries (lines).
              [E]     select annotation event counter.
              [f]     select normal display count filter.
              [F]     select annotation display count filter (percentage).
              [qQ]    quit.
              [s]     select annotation symbol and start annotation.
              [S]     stop annotation, revert to normal display.
              [z]     toggle event count zeroing.
      
      Sample:
      ------------------------------------------------------------------------------
         PerfTop:   16719 irqs/sec  kernel:78.7% [cache-misses/cache-references/instructions/cycles],  (all, 4 CPUs)
      ------------------------------------------------------------------------------
      
      Showing cache-misses for e1000_clean_rx_irq
        Events  Pcnt (>=3%)
             0  0.0%                  /* adjust length to remove Ethernet CRC */
             0  0.0%                  if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
             0  0.0%                          length -= 4;
           436  5.0%      f039:       41 f6 84 24 5c 29 00    testb  $0x1,0x295c(%r12)
             0  0.0%      f089:       8b 4d 84                mov    -0x7c(%rbp),%ecx
             0  0.0%      f08c:       48 83 ef 02             sub    $0x2,%rdi
             0  0.0%      f090:       48 83 ee 02             sub    $0x2,%rsi
           811  9.3%      f094:       f3 a4                   rep movsb %ds:(%rsi),%es:(%rdi)
             0  0.0%
             0  0.0%          while (rx_desc->status & E1000_RXD_STAT_DD) {
             0  0.0%      f114:       41 f6 47 0c 01          testb  $0x1,0xc(%r15)
          7226 82.6%      f119:       0f 85 24 fe ff ff       jne    ef43 <e1000_clean_rx_irq+0x84>
      
      Available events:
              0 cache-misses
              1 cache-references
              2 instructions
              3 cycles
      Enter details event counter: 2
      ------------------------------------------------------------------------------
         PerfTop:   15035 irqs/sec  kernel:79.0% [cache-misses/cache-references/instructions/cycles],  (all, 4 CPUs)
      ------------------------------------------------------------------------------
      
      Showing instructions for e1000_clean_rx_irq
        Events  Pcnt (>=3%)
             0  0.0%                                 int *work_done, int work_to_do)
             0  0.0%  {
           175  0.9%      eebf:       55                      push   %rbp
          1898  9.8%      eec0:       48 89 e5                mov    %rsp,%rbp
             0  0.0%
             0  0.0%          i = rx_ring->next_to_clean;
           140  0.7%      ef0a:       0f b7 41 1a             movzwl 0x1a(%rcx),%eax
           670  3.4%      ef0e:       89 45 ac                mov    %eax,-0x54(%rbp)
             0  0.0%  {
             0  0.0%          memcpy(skb->data + offset, from, len);
            91  0.5%      f07b:       49 8b b6 e8 00 00 00    mov    0xe8(%r14),%rsi
          1153  5.9%      f082:       48 8b b8 e8 00 00 00    mov    0xe8(%rax),%rdi
            42  0.2%      f089:       8b 4d 84                mov    -0x7c(%rbp),%ecx
            14  0.1%      f08c:       48 83 ef 02             sub    $0x2,%rdi
             0  0.0%      f090:       48 83 ee 02             sub    $0x2,%rsi
          1618  8.3%      f094:       f3 a4                   rep movsb %ds:(%rsi),%es:(%rdi)
             0  0.0%
             0  0.0%                  /* return some buffers to hardware, one at a time is too slow */
             0  0.0%                  if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
           867  4.5%      f0e7:       83 7d b0 0f             cmpl   $0xf,-0x50(%rbp)
             0  0.0%
             0  0.0%          while (rx_desc->status & E1000_RXD_STAT_DD) {
            37  0.2%      f114:       41 f6 47 0c 01          testb  $0x1,0xc(%r15)
          4047 20.8%      f119:       0f 85 24 fe ff ff       jne    ef43 <e1000_clean_rx_irq+0x84>
      Signed-off-by: default avatarMike Galbraith <efault@gmx.de>
      Signed-off-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Paul Mackerras <paulus@samba.org>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      923c42c1
    • Frederic Weisbecker's avatar
      perf_counter: Fix/complete ftrace event records sampling · f413cdb8
      Frederic Weisbecker authored
      This patch implements the kernel side support for ftrace event
      record sampling.
      
      A new counter sampling attribute is added:
      
         PERF_SAMPLE_TP_RECORD
      
      which requests ftrace events record sampling. In this case
      if a PERF_TYPE_TRACEPOINT counter is active and a tracepoint
      fires, we emit the tracepoint binary record to the
      perfcounter event buffer, as a sample.
      
      Result, after setting PERF_SAMPLE_TP_RECORD attribute from perf
      record:
      
       perf record -f -F 1 -a -e workqueue:workqueue_execution
       perf report -D
      
       0x21e18 [0x48]: event: 9
       .
       . ... raw event: size 72 bytes
       .  0000:  09 00 00 00 01 00 48 00 d0 c7 00 81 ff ff ff ff  ......H........
       .  0010:  0a 00 00 00 0a 00 00 00 21 00 00 00 00 00 00 00  ........!......
       .  0020:  2b 00 01 02 0a 00 00 00 0a 00 00 00 65 76 65 6e  +...........eve
       .  0030:  74 73 2f 31 00 00 00 00 00 00 00 00 0a 00 00 00  ts/1...........
       .  0040:  e0 b1 31 81 ff ff ff ff                          .......
      .
      0x21e18 [0x48]: PERF_EVENT_SAMPLE (IP, 1): 10: 0xffffffff8100c7d0 period: 33
      
      The raw ftrace binary record starts at offset 0020.
      
      Translation:
      
       struct trace_entry {
      	type		= 0x2b = 43;
      	flags		= 1;
      	preempt_count	= 2;
      	pid		= 0xa = 10;
      	tgid		= 0xa = 10;
       }
      
       thread_comm = "events/1"
       thread_pid  = 0xa = 10;
       func	    = 0xffffffff8131b1e0 = flush_to_ldisc()
      
      What will come next?
      
       - Userspace support ('perf trace'), 'flight data recorder' mode
         for perf trace, etc.
      
       - The unconditional copy from the profiling callback brings
         some costs however if someone wants no such sampling to
         occur, and needs to be fixed in the future. For that we need
         to have an instant access to the perf counter attribute.
         This is a matter of a flag to add in the struct ftrace_event.
      
       - Take care of the events recursivity! Don't ever try to record
         a lock event for example, it seems some locking is used in
         the profiling fast path and lead to a tracing recursivity.
         That will be fixed using raw spinlock or recursivity
         protection.
      
       - [...]
      
       - Profit! :-)
      Signed-off-by: default avatarFrederic Weisbecker <fweisbec@gmail.com>
      Cc: Li Zefan <lizf@cn.fujitsu.com>
      Cc: Tom Zanussi <tzanussi@gmail.com>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Mike Galbraith <efault@gmx.de>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Pekka Enberg <penberg@cs.helsinki.fi>
      Cc: Gabriel Munteanu <eduard.munteanu@linux360.ro>
      Cc: Lai Jiangshan <laijs@cn.fujitsu.com>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      f413cdb8
    • Peter Zijlstra's avatar
      perf_counter, ftrace: Fix perf_counter integration · 3a659305
      Peter Zijlstra authored
      Adds possible second part to the assign argument of TP_EVENT().
      
        TP_perf_assign(
      	__perf_count(foo);
      	__perf_addr(bar);
        )
      
      Which, when specified make the swcounter increment with @foo instead
      of the usual 1, and report @bar for PERF_SAMPLE_ADDR (data address
      associated with the event) when this triggers a counter overflow.
      Signed-off-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
      Acked-by: default avatarSteven Rostedt <rostedt@goodmis.org>
      Cc: Frederic Weisbecker <fweisbec@gmail.com>
      Cc: Jason Baron <jbaron@redhat.com>
      Cc: Paul Mackerras <paulus@samba.org>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      3a659305
    • Ingo Molnar's avatar
      Merge branch 'linus' into tracing/urgent · e3560336
      Ingo Molnar authored
      Merge reason: Merge up to almost-rc6 to pick up latest perfcounters
                    (on which we'll queue up a dependent fix)
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      e3560336
  2. 08 Aug, 2009 7 commits
  3. 07 Aug, 2009 29 commits