- 08 Oct, 2015 10 commits
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Lee Jones authored
The original representation of FIFO size in the driver coupled with the ambiguity in the documentation meant that it was easy to confuse readers. This lead to a false positive BUG-find and subsequently time wastage debugging this phantom issue. Hopefully this patch can prevent future readers from falling into the same trap. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Lee Jones authored
Samples are documented to be available every 0.667us, so in theory the 8 sample deep FIFO should take 5.336us to fill. However, during thorough testing, it became apparent that filling the FIFO actually takes closer to 12us. Also take into consideration that udelay() can behave oddly i.e. not delay for as long as requested. Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk>: "IIRC, Linus recommends a x2 factor on delays, especially timeouts generated by these functions. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Lee Jones authored
DT nodes should not append their addresses with '0x'. Suggested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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LABBE Corentin authored
clk_prepare_enable() can fail so add a check for this and return the error code if it fails. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Catalin Vasile authored
Add support for AES working in XEX-based Tweaked-codebook mode with ciphertext Stealing (XTS) sector index - HW limitation: CAAM device supports sector index of only 8 bytes to be used for sector index inside IV, instead of whole 16 bytes received on request. This represents 2 ^ 64 = 16,777,216 Tera of possible values for sector index. Signed-off-by: Cristian Hristea <cristi.hristea@gmail.com> Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Signed-off-by: Catalin Vasile <catalin.vasile@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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LABBE Corentin authored
The qce driver use two dma_map_sg path according to SG are chained or not. Since dma_map_sg can handle both case, clean the code with all references to sg chained. Thus removing qce_mapsg, qce_unmapsg and qce_countsg functions. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Tom Lendacky authored
The convention is to use the name of the module in the driver structures that are used for registering the device. The CCP module is currently using a descriptive name. Replace the descriptive name with module name. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Tom Lendacky authored
The CCP is meant to be more of an offload engine than an accelerator engine. To avoid any confusion, change references to accelerator to offload. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Tom Lendacky authored
With the creation of the device_dma_is_coherent API the "use_acpi" field is no longer needed, so remove it. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Tom Lendacky authored
Replace the usage of BUG_ON with WARN_ON and return an error. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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- 01 Oct, 2015 8 commits
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Tadeusz Struk authored
Remove unneeded variable val_indx. Issue found by a static analyzer. Reported-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com> Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Tadeusz Struk authored
Add support for ctr and xts encryption modes. Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Geliang Tang authored
Fixes the following sparse warnings: crypto/skcipher.c:94:5: warning: symbol 'crypto_init_skcipher_ops_blkcipher' was not declared. Should it be static? crypto/skcipher.c:185:5: warning: symbol 'crypto_init_skcipher_ops_ablkcipher' was not declared. Should it be static? Signed-off-by: Geliang Tang <geliangtang@163.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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John Haxby authored
No authenc() ciphers are FIPS approved, nor is ecb(des). After the end of 2015, ansi_cprng will also be non-approved. Signed-off-by: John Haxby <john.haxby@oracle.com> Acked-by: Stephan Mueller <smueller@chronox.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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LABBE Corentin authored
The sahara driver use two dma_map_sg path according to SG are chained or not. Since dma_map_sg can handle both case, clean the code with all references to sg chained. Thus removing the sahara_sha_unmap_sg function. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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LABBE Corentin authored
The caam driver use two dma_map_sg path according to SG are chained or not. Since dma_map_sg can handle both case, clean the code with all references to sg chained. Thus removing dma_map_sg_chained, dma_unmap_sg_chained and __sg_count functions. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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LABBE Corentin authored
The talitos driver use two dma_map_sg path according to SG are chained or not. Since dma_map_sg can handle both case, clean the code with all references to sg chained. Thus removing talitos_map_sg, talitos_unmap_sg_chain and sg_count functions. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Tadeusz Struk authored
Some code cleanups after crypto API changes: - Change qat_algs_unregister to a void function to keep it consistent with qat_asym_algs_unregister. - Remove empty functions qat_algs_init & qat_algs_exit. Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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- 21 Sep, 2015 22 commits
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Nicolas Iooss authored
Module crc32c-intel uses a special read-only data section named .rotata. This section is defined for K_table, and its name seems to be a spelling mistake for .rodata. Fixes: 473946e6 ("crypto: crc32c-pclmul - Shrink K_table to 32-bit words") Signed-off-by: Nicolas Iooss <nicolas.iooss_linux@m4x.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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LABBE Corentin authored
The sahara_sg_length function of the sahara driver is the same as sg_nents_for_len from lib/scatterlist.c Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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LABBE Corentin authored
The get_sg_count function of amcc is the same as sg_nents_for_len from lib/scatterlist.c Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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LABBE Corentin authored
The sg_count function in bfin_crc.c is the same function as sg_nents. Remove the duplicate code and use sg_nents() instead. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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tim authored
Restructure the x86 sha512 glue code so we will expose sha512 transforms based on SSSE3, AVX or AVX2 as separate individual drivers when cpu provides support. This will make it easy for alternative algorithms to be used if desired and makes the code cleaner and easier to maintain. Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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tim authored
Restructure the x86 sha256 glue code so we will expose sha256 transforms based on SSSE3, AVX, AVX2 or SHA-NI extension as separate individual drivers when cpu provides such support. This will make it easy for alternative algorithms to be used if desired and makes the code cleaner and easier to maintain. Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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tim authored
Restructure the x86 sha1 glue code so we will expose sha1 transforms based on SSSE3, AVX, AVX2 or SHA-NI extension as separate individual drivers when cpu provides such support. This will make it easy for alternative algorithms to be used if desired and makes the code cleaner and easier to maintain. Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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tim authored
This patch provides the configuration and build support to include and build the optimized SHA1 and SHA256 update transforms for the kernel's crypto library. Originally-by: Chandramouli Narayanan <mouli_7982@yahoo.com> Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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tim authored
This patch adds the glue code to detect and utilize the Intel SHA extensions optimized SHA1 and SHA256 update transforms when available. This code has been tested on Broxton for functionality. Originally-by: Chandramouli Narayanan <mouli_7982@yahoo.com> Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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tim authored
This patch includes the Intel SHA Extensions optimized implementation of SHA-256 update function. This function has been tested on Broxton platform and measured a speed up of 3.6x over the SSSE3 implementiation for 4K blocks. Originally-by: Chandramouli Narayanan <mouli_7982@yahoo.com> Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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tim authored
This patch includes the Intel SHA Extensions optimized implementation of SHA-1 update function. This function has been tested on Broxton platform and measured a speed up of 3.6x over the SSSE3 implementiation for 4K blocks. Originally-by: Chandramouli Narayanan <mouli_7982@yahoo.com> Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Lee Jones authored
Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Lee Jones authored
Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Lee Jones authored
Signed-off-by: Pankaj Dev <pankaj.dev@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Kieran Bingham <kieranbingham@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Lee Jones authored
Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Lee Jones authored
If we attempt to use sysfs to change the current RNG in the usual way i.e. issuing something like: `echo 8a8a000.rng > /sys/devices/virtual/misc/hw_random/rng_current` ... it will fail because the code doesn't currently take the '\n' into consideration. Well, now it does. Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Peter Korsgaard <peter@korsgaard.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Lee Jones authored
In April 2009, commit d4056405 ("Driver Core: misc: add node name support for misc devices.") inadvertently changed the device node name from /dev/hw_random to /dev/hwrng. Since 6 years has passed since the change it seems unpractical to change it back, as this node name is probably considered ABI by now. So instead, we'll just change the Kconfig help to match the current situation. NB: It looks like rng-tools have already been updated. Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Kieran Bingham <kieranbingham@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Lee Jones authored
In April 2009, commit d4056405 ("Driver Core: misc: add node name support for misc devices.") inadvertently changed the device node name from /dev/hw_random to /dev/hwrng. Since 6 years has passed since the change it seems unpractical to change it back, as this node name is probably considered ABI by now. So instead, we'll just change the documentation to match the current situation. NB: It looks like rng-tools have already been updated. Signed-off-by: Lee Jones <lee.jones@linaro.org> Acked-by: Kieran Bingham <kieranbingham@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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sudip authored
hour, min and sec are unsigned int and they can never be less than zero. Signed-off-by: Sudip Mukherjee <sudip@vectorindia.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Tadeusz Struk authored
Load balancing of crypto instances only used a single device. There was no problem with that on PF, but since there is only one or two instance per VF we need to loadbalance across devices. Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Fabio Estevam authored
Commit a1efb01f ("jump_label, locking/static_keys: Rename JUMP_LABEL_TYPE_* and related helpers to the static_key* pattern") introduced the definition of JUMP_TYPE_MASK in include/linux/jump_label.h causing the following name collision: In file included from drivers/crypto/caam/desc_constr.h:7:0, from drivers/crypto/caam/ctrl.c:15: drivers/crypto/caam/desc.h:1495:0: warning: "JUMP_TYPE_MASK" redefined #define JUMP_TYPE_MASK (0x03 << JUMP_TYPE_SHIFT) ^ In file included from include/linux/module.h:19:0, from drivers/crypto/caam/compat.h:9, from drivers/crypto/caam/ctrl.c:11: include/linux/jump_label.h:131:0: note: this is the location of the previous definition #define JUMP_TYPE_MASK 1UL As JUMP_TYPE_MASK definition in desc.h is never used, we can safely remove it to avoid the name collision. Reported-by: Olof's autobuilder <build@lixom.net> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Horia Geant? <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Luis de Bethencourt authored
This platform drivers have a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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