- 15 Mar, 2022 17 commits
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Chen-Yu Tsai authored
The current code deals with optional features by testing for the function pointers and returning -ENOTSUPP if it is not valid. This is done for multiple pin config settings and results in the code that handles the supporting cases to get indented by one level. This is aggrevated by the fact that some features require another level of conditionals. Instead of assigning the same error code in all unsupported optional feature cases, simply have that error code as the default, and break out of the switch/case block whenever a feature is unsupported, or an error is returned. This reduces indentation by one level for the useful code. Also replace the goto statements with break statements. The result is the same, as the gotos simply exit the switch/case block, which can also be achieved with a break statement. With the latter the intent is clear and easier to understand. Signed-off-by:
Chen-Yu Tsai <wenst@chromium.org> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220308100956.2750295-8-wenst@chromium.orgSigned-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Chen-Yu Tsai authored
Virtual GPIOs do not have any hardware state associated with them. Any attempt to read back hardware state for these pins result in error codes. Skip dumping extra pin config information for these virtual GPIOs. Fixes: 184d8e13 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.") Signed-off-by:
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Chen-Yu Tsai authored
The caller of mtk_pctrl_show_one_pin() is responsible for printing the full line. mtk_pctrl_show_one_pin(), called through mtk_pctrl_dbg_show(), should only produce a string containing the extra information the driver wants included. Drop the extra newlines. Also unbreak the line that is only slightly over 80 characters to make it easier on the eye, and get rid of the braces now that each block in the conditionals is just one line. Fixes: 184d8e13 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.") Fixes: fb34a9ae ("pinctrl: mediatek: support rsel feature") Signed-off-by:
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Chen-Yu Tsai authored
mtk_pconf_group_get(), used to read back pingroup pin config state, simply returns a set of configs saved from a previous invocation of mtk_pconf_group_set(). This is an unfiltered, unvalidated set passed in from the pinconf core, which does not match the current hardware state. Since the driver library is designed to have one pin per group, pass through mtk_pconf_group_get() to mtk_pinconf_get(), to read back the current pin config state of the only pin in the group. Also drop the assignment of pin config state to the group. Fixes: 80525098 ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings") Signed-off-by:
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Chen-Yu Tsai authored
For mtk_pinconf_get(), the "argument" argument is typically returned by pinconf_to_config_argument(), which holds the value for a given pinconf parameter. It certainly should not have the type of "enum pin_config_param", which describes the type of the pinconf parameter itself. Change the type to u32, which matches the return type of pinconf_to_config_argument(). Fixes: 80525098 ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings") Signed-off-by:
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Chen-Yu Tsai authored
When reading back pin bias settings, if the pin is not in the corresponding bias state, the function should return -EINVAL. Fix this in the mediatek-paris pinctrl library so that the read back state is not littered with bogus a "input bias disabled" combined with "pull up" or "pull down" states. Fixes: 80525098 ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings") Signed-off-by:
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Chen-Yu Tsai authored
The bias-pull-* properties, or PIN_CONFIG_BIAS_PULL_* pin config parameters, accept optional arguments in ohms denoting the strength of the pin bias. Print these values out in debugfs as well. Fixes: eec45071 ("pinctrl: pinconf-generic: Add flag to print arguments") Signed-off-by:
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Miaoqian Lin authored
The device_node pointer is returned by of_parse_phandle() with refcount incremented. We should use of_node_put() on it when done. Fixes: a6df410d ("pinctrl: mediatek: Add Pinctrl/GPIO driver for mt8135.") Signed-off-by:
Miaoqian Lin <linmq006@gmail.com> Reviewed-by:
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Jonathan Neuschäfer authored
This driver is based on the one for NPCM7xx, because the WPCM450 is a predecessor of those SoCs. Notable differences: - On WPCM450, the GPIO registers are not organized in multiple banks, but rather placed continually into the same register block. This affects how register offsets are computed. - Pinmux nodes can explicitly select GPIO mode, whereas in the npcm7xx driver, this happens automatically when a GPIO is requested. Some functionality implemented in the hardware was (for now) left unused in the driver, specifically blinking and pull-up/down. Signed-off-by:
Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reported-by:
kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20220129115228.2257310-6-j.neuschaefer@gmx.netSigned-off-by:
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Jonathan Neuschäfer authored
This binding is heavily based on the one for NPCM7xx, because the hardware is similar. There are some notable differences, however: - The addresses of GPIO banks are not physical addresses but simple indices (0 to 7), because the GPIO registers are not laid out in convenient blocks. - Pinmux settings can explicitly specify that the GPIO mode is used. Certain pins support blink patterns in hardware. This is currently not modelled in the DT binding. Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220129115228.2257310-5-j.neuschaefer@gmx.netSigned-off-by:
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Michael Walle authored
This driver can have up to two regmaps. If the second one is registered its debugfs entry will have the same name as the first one and the following error will be printed: [ 2.242568] debugfs: Directory 'e2004064.pinctrl' with parent 'regmap' already present! Give the second regmap a name to avoid this. Fixes: 076d9e71 ("pinctrl: ocelot: convert pinctrl to regmap") Signed-off-by:
Michael Walle <michael@walle.cc> Reviewed-by:
Colin Foster <colin.foster@in-advantage.com> Link: https://lore.kernel.org/r/20220216122727.1005041-1-michael@walle.ccSigned-off-by:
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Michael Walle authored
Prior to commit ad96111e ("pinctrl: ocelot: combine get resource and ioremap into single call") the resource index was 1, now it is 0. But 0 is the base region for the pinctrl block. Fix it. I noticed this because there was an error that the memory region was ioremapped twice. Fixes: ad96111e ("pinctrl: ocelot: combine get resource and ioremap into single call") Signed-off-by:
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Jacky Bai authored
Add i.MX93 pinctrl driver Signed-off-by:
Jacky Bai <ping.bai@nxp.com> Signed-off-by:
Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220228010103.2725893-2-peng.fan@oss.nxp.comSigned-off-by:
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Peng Fan authored
Add pinctrl binding doc for i.MX93 Signed-off-by:
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Guodong Liu authored
Change "mediatek,rsel_resistance_in_si_unit" to "mediatek,rsel-resistance-in-si-unit" Fixes: fb34a9ae ("pinctrl: mediatek: support rsel feature") Signed-off-by:
Guodong Liu <guodong.liu@mediatek.com> Link: https://lore.kernel.org/r/20220216032124.28067-4-guodong.liu@mediatek.comSigned-off-by:
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Guodong Liu authored
This commit includes pinctrl driver for mt8186. Signed-off-by:
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Guodong Liu authored
1. This patch adds pinctrl file for mt8186. 2. This patch adds mt8186 compatible node in binding document. Signed-off-by:
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- 28 Feb, 2022 1 commit
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Linus Walleij authored
Merge tag 'intel-pinctrl-v5.18-1' of gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into devel intel-pinctrl for v5.18-1 * Introduce support for Alder Lake-N (required to revert misplaced ID) * Add support for Raptor Lake-S * Add support for Ice Lake-N (MacBookPro16,2) * Miscellaneous fixes The following is an automated git shortlog grouped by driver: alderlake: - Add Intel Alder Lake-N pin controller support - Add Raptor Lake-S ACPI ID baytrail: - Clear direct_irq_en flag on broken configs icelake: - Add Ice Lake-N PCH pin controller support intel: - Fix a glitch when updating IRQ flags on a preconfigured line - fix unexpected interrupt Place correctly CONFIG_PINCTRL_ST in the Makefile: - Place correctly CONFIG_PINCTRL_ST in the Makefile tigerlake: - Revert "Add Alder Lake-M ACPI ID"
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- 27 Feb, 2022 1 commit
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Linus Walleij authored
Merge tag 'renesas-pinctrl-for-v5.18-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.18 (take two) - Share more pin group data, to reduce kernel size and ease review, - Improve the pin control table validator, - Add support for the new R-Car S4-8 SoC, - Miscellaneous fixes and improvements.
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- 25 Feb, 2022 12 commits
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Geert Uytterhoeven authored
Add pins, groups, and functions for the Ethernet Time-Sensitive Networking (TSN) interfaces on the Renesas R-Car S4-8 (R8A779F0) SoC. Based on a larger patch in the BSP by LUU HOAI. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/e0a1dc7d2435d28811e3acb361dae050eb3aabc9.1645457792.git.geert+renesas@glider.be
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Geert Uytterhoeven authored
Add pins, groups, and functions for the Quad SPI Controllers on the Renesas R-Car S4-8 (R8A779F0) SoC. Based on a larger patch in the BSP by LUU HOAI. Signed-off-by:
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Geert Uytterhoeven authored
Add pins, groups, and function for the PCIe Controllers on the Renesas R-Car S4-8 (R8A779F0) SoC. Extracted from a larger patch in the BSP by LUU HOAI. Signed-off-by:
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Geert Uytterhoeven authored
Add pins, groups, and function for the Clock-Synchronized Serial Interfaces with FIFO (MSIOF) on the Renesas R-Car S4-8 (R8A779F0) SoC. Based on a larger patch in the BSP by LUU HOAI. Signed-off-by:
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Geert Uytterhoeven authored
Add pins, groups, and function for the MMC interface on the Renesas R-Car S4-8 (R8A779F0) SoC. Based on a larger patch in the BSP by LUU HOAI. Signed-off-by:
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Geert Uytterhoeven authored
Add pins, groups, and function for the Interrupt Controller for External Devices (INTC-EX) on the Renesas R-Car S4-8 (R8A779F0) SoC. Based on a larger patch in the BSP by LUU HOAI. Signed-off-by:
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Geert Uytterhoeven authored
Add pins, groups, and functions for the High Speed Serial Communication Interfaces with FIFO (HSCIF) on the Renesas R-Car S4-8 (R8A779F0) SoC. Based on a larger patch in the BSP by LUU HOAI. Signed-off-by:
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Geert Uytterhoeven authored
Add pins, groups, and functions for the I2C Bus Interfaces (I2C) on the Renesas R-Car S4-8 (R8A779F0) SoC. Extracted from a larger patch in the BSP by LUU HOAI. Signed-off-by:
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Geert Uytterhoeven authored
Add pins, groups, and functions for the Serial Communication Interfaces with FIFO (SCIF) on the Renesas R-Car S4-8 (R8A779F0) SoC. Extracted from a larger patch in the BSP by LUU HOAI. Signed-off-by:
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Geert Uytterhoeven authored
Add initial Pin Function Controller (PFC) support for the Renesas R-Car S4-8 (R8A779F0) SoC, including bias, drive strength and voltage control. Based on a larger patch in the BSP by LUU HOAI. Signed-off-by:
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Geert Uytterhoeven authored
Add PORT_GP_CFG_19() and PORT_GP_19() helper macros, to be used by the r8a779f0 subdriver. Based on a larger patch in the BSP by LUU HOAI. Signed-off-by:
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LUU HOAI authored
Document Pin Function Controller (PFC) support for the Renesas R-Car S4-8 (R8A779F0) SoC. Signed-off-by:
LUU HOAI <hoai.luu.ub@renesas.com> Signed-off-by:
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- 24 Feb, 2022 2 commits
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Geert Uytterhoeven authored
Linus reports that some Renesas pin control sub-drivers are still including <linux/gpio.h> instead of <linux/gpio/driver.h>. As these sub-drivers don't need either, the includes can just be removed. Reported-by:
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Geert Uytterhoeven authored
The checker failed to validate all enum IDs in the description of a register with fixed-width register fields, due to a miscalculation of the number of described states: each register field of n bits can have "1 << n" possible states, not "1". Increase SH_PFC_MAX_ENUMS accordingly, now more enum IDs are checked (SH-Mobile AG5 has more than 4000 enum IDs defined). Fixes: 12d057ba ("pinctrl: sh-pfc: checker: Add check for enum ID conflicts") Signed-off-by:
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- 23 Feb, 2022 4 commits
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Andy Shevchenko authored
This adds pinctrl/GPIO support for Intel Ice Lake-N PCH. The Ice Lake-N PCH GPIO is based on the same version of the Intel GPIO hardware than Intel Cannon Lake with different set of pins and ACPI ID. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by:
Mika Westerberg <mika.westerberg@linux.intel.com>
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Andy Shevchenko authored
This change driver adds pinctrl/GPIO support for Intel Alder Lake-N SoC. The GPIO controller is based on the next generation GPIO hardware but still compatible with the one supported by the Intel core pinctrl/GPIO driver. Signed-off-by:
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Andy Shevchenko authored
Intel Raptor Lake-S PCH has the same GPIO hardware than Alder Lake-S PCH but the ACPI ID is different. Add this new ACPI ID to the list of supported devices. Signed-off-by:
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Andy Shevchenko authored
It appears that last minute change moved ACPI ID of Alder Lake-M to the INTC1055, which is already in the driver. This ID on the other hand will be used elsewhere. This reverts commit 258435a1. Signed-off-by:
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- 22 Feb, 2022 3 commits
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Geert Uytterhoeven authored
Check that there is only a single entry for each pin with drive strength capabilities. Signed-off-by:
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Geert Uytterhoeven authored
Check that there is only a single entry for each pin with pull-up and/or pull-down capabilities. Signed-off-by:
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Geert Uytterhoeven authored
Validate consistency of the pin control tables for pins with I/O voltage capabilities. If a pin has I/O voltage register bits declarations through .pin_to_pocctrl(), the SH_PFC_PIN_CFG_IO_VOLTAGE flag should be set in the pin's configs, and vice versa. Signed-off-by:
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