- 19 May, 2015 2 commits
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git://anongit.freedesktop.org/drm-intelDave Airlie authored
Scattering of random drm core patches. Bunch of atomic prep work too, but the final bits for blob properties, atomic modesets and lifting the experimental tag on the atomic ioctl are still blocked on Daniel Stone finalizing and testing the weston support for it. I hope that we can get it all ready for 4.2 though. * tag 'topic/drm-misc-2015-05-19' of git://anongit.freedesktop.org/drm-intel: (22 commits) drm/atomic: Allow drivers to subclass drm_atomic_state, v3 drm/atomic: remove duplicated assignment of old_plane_state drm/dp: Fix comment in DP helper drm/atomic: add drm_atomic_get_existing_*_state helpers drm/core: get rid of -Iinclude/drm drm/i915: get rid of -Iinclude/drm drm/atomic-helpers: Export drm_atomic_helper_update_legacy_modeset_state drm/atomic-helpers: Update vblank timestamping constants drm/sysfs: remove unnecessary connector type checks drm/sysfs: split DVI-I and TV-out attributes drm/sysfs: make optional attribute groups per connector type drm/sysfs: add a helper for extracting connector type from kobject drm/edid: Add CEA modes before inferred modes drm/prime: Allow internal imports without import_sg_table drm: Add reference counting to blob properties drm: Introduce blob_lock drm: Introduce helper for replacing blob properties drm: Don't leak path blob property when updating drm/atomic: Don't open-code CRTC state destroy drm/edid: Add DMT modes with ID > 0x50 ...
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git://anongit.freedesktop.org/drm-intelDave Airlie authored
- skl plane scaler support (Chandra Kondru) - enable hsw cmd parser (Daniel and fix from Rebecca Palmer) - skl dc5/6 support (low power display modes) from Suketu&Sunil - dp compliance testing patches (Todd Previte) - dp link training optimization (Mika Kahola) - fixes to make skl resume work (Damien) - rework modeset code to fully use atomic state objects (Ander&Maarten) - pile of bxt w/a patchs from Nick Hoath - (linear) partial gtt mmap support (Joonas Lahtinen) * tag 'drm-intel-next-2015-05-08' of git://anongit.freedesktop.org/drm-intel: (103 commits) drm/i915: Update DRIVER_DATE to 20150508 drm/i915: Only wait for required lanes in vlv_wait_port_ready() drm/i915: Fix possible security hole in command parsing drm/edid: Kerneldoc for newly added edid_corrupt drm/i915: Reject huge tiled objects Revert "drm/i915: Hack to tie both common lanes together on chv" drm/i915: Work around DISPLAY_PHY_CONTROL register corruption on CHV drm/i915: Implement chv display PHY lane stagger setup drm/i915/vlv: remove wait for previous GFX clk disable request drm/i915: Set crtc_state->active to false when CRTC is disabled (v2) drm/i915/skl: Re-indent part of skl_ddi_calculate_wrpll() drm/i915: Use partial view in mmap fault handler drm/i915: Add a partial GGTT view type drm/i915: Consider object pinned if any VMA is pinned drm/i915: Do not make assumptions on GGTT VMA sizes drm/i915/bxt: Mark WaCcsTlbPrefetchDisable as for Broxton also. drm/i915/bxt: Mark WaDisablePartialResolveInVc as for Broxton also. drm/i915/bxt: Mark Wa4x4STCOptimizationDisable as for Broxton also. drm/i915/bxt: Move WaForceEnableNonCoherent to Skylake only drm/i915/bxt: Enable WaEnableYV12BugFixInHalfSliceChicken7 for Broxton ...
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- 18 May, 2015 3 commits
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Maarten Lankhorst authored
Drivers may need to store the state of shared resources, such as PLLs or FIFO space, into the atomic state. Allow this by making it possible to subclass drm_atomic_state. Changes since v1: - Change member names for functions to atomic_state_(alloc,clear) - Change __drm_atomic_state_new to drm_atomic_state_init - Allow free function to be overridden too, in case extra memory is allocated in alloc. Changes since v2: - Rename *_default_free to default_release, to make clear it doesn't free the state object itself. Cc: dri-devel@lists.freedesktop.org Acked-by:
Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
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Gustavo Padovan authored
old_plane_state is already assigned to old_state->plane_states[i] inside for_each_plane_in_state(). Here we remove an the extra assignment. Signed-off-by:
Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by:
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Jon Hunter authored
Commit 4f71d0cb ("drm/dp: add a hw mutex around the transfer functions. (v2)"), renamed the functions drm_dp_aux_register_i2c_bus() and drm_dp_aux_unregister_i2c_bus() to drm_dp_aux_register() and drm_dp_aux_unregister(), respectively. However, a comment referring to the original names was not updated in the DP helper header file. Hence, correct these names. Signed-off-by:
Jon Hunter <jonathanh@nvidia.com> Signed-off-by:
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- 15 May, 2015 2 commits
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git://ftp.arm.linux.org.uk/~rmk/linux-armDave Airlie authored
some minor cleanups * 'drm-armada-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: drm/armada: armada_drv: Remove unused function drm/armada: armada_output: Remove some unused functions
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git://ftp.arm.linux.org.uk/~rmk/linux-armDave Airlie authored
tda998x: use helpers for infoframe. * 'drm-tda998x-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: drm/i2c: tda998x: use drm_hdmi_avi_infoframe_from_display_mode()
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- 13 May, 2015 5 commits
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Maarten Lankhorst authored
There are cases where we want to test if a given object is part of the state, but don't want to add them if they're not. Signed-off-by:
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Maarten Lankhorst authored
This results in a warning when building out of tree: "cc1: warning: include/drm: No such file or directory [enabled by default]" Most code already uses #include <drm/foo.h> correctly, so fix the instances that don't. Reported-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
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Maarten Lankhorst authored
This results in a warning when building out of tree: "cc1: warning: include/drm: No such file or directory [enabled by default]" Most code already uses #include <drm/foo.h> correctly, so fix the instances that don't. Reported-by:
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Daniel Vetter authored
This is useful for drivers which have their own modeset infrastructure but want to reuse most of the legacy state frobbery from the helpers. i915 wants this. v2: Add header declaration. Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by:
Daniel Vetter <daniel.vetter@intel.com>
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Daniel Vetter authored
The atomic helpers don't call drm_calc_timestamping_constants, which is a regression compared to the crtc helpers. Fix this. Noticed while reviewing i915 atomic patches from Maarten. v2: Also check state->enable to avoid a warning in dmesg. Reported by Maarten. Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by:
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- 12 May, 2015 7 commits
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Jani Nikula authored
These attributes should be exposed for the matching connector types only, so checking is redundant. Signed-off-by:
Jani Nikula <jani.nikula@intel.com> Reviewed-by:
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Jani Nikula authored
The show methods for the attributes of DVI-I and TV-out types have a bunch of code to deal with the differences between the two. Just split the attributes into connector type specific ones. No functional changes. Signed-off-by:
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Jani Nikula authored
Split DVI-I and TV-out (which remains a group of types). As an intermediate step, still share the attributes themselves between the two. No user visible changes. Signed-off-by:
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Jani Nikula authored
This reduces duplication in the patches to follow. No functional changes. Signed-off-by:
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Ville Syrjälä authored
Currently we're adding CEA modes after the inferred modes, which means we might get multiple modes that are very close to each other, but slightly different, which seems a bit silly. That's because duplicate mode check that occurs when adding inferred modes would not consider CEA modes as potential duplicates. Reverse the order so that CEA modes get added before inferred modes, and are thus considered potential duplicates. Or as ajax put it on irc: "< ajax> the point of the "pick a timing formula" heuristic was to generate something the sink could _likely_ sink. if it tells us timings it can sink explicitly then second-guessing seems dumb." Cc: Adam Jackson <ajax@redhat.com> Signed-off-by:
Adam Jackson <ajax@redhat.com> Signed-off-by:
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Tomasz Figa authored
Currently drm_gem_prime_import() checks if gem_prime_import_sg_table() is implemented in DRM driver ops. However it is not necessary for internal imports (i.e. dma_buf->ops == &drm_gem_prime_dmabuf_ops and obj->dev == dev), which only increment reference count on respective GEM objects. This patch makes the helper check this condition only in case of external imports fo rwhich importing sg table is indeed needed. Signed-off-by:
Tomasz Figa <tfiga@chromium.org> Signed-off-by:
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Daniel Stone authored
Reference-count drm_property_blob objects, changing the API to ref/unref. Signed-off-by:
Daniel Stone <daniels@collabora.com> Reviewed-by:
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- 11 May, 2015 1 commit
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Jesse Barnes authored
Looks like it was introduced in: commit 650ad970 Author: Imre Deak <imre.deak@intel.com> Date: Fri Apr 18 16:35:02 2014 +0300 drm/i915: vlv: factor out vlv_force_gfx_clock and check for pending force-of but I'm not sure why. It has caused problems for us in the past (see 85250ddf "drm/i915/chv: Remove Wait for a previous gfx force-off" and 8d4eee9c "drm/i915: vlv: increase timeout when forcing on the GFX clock") and doesn't seem to be required, so let's just drop it. [airlied: I messed up a merge - readd this] References: https://bugs.freedesktop.org/show_bug.cgi?id=89611Signed-off-by:
Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by:
Darren Hart <dvhart@linux.intel.com> Reviewed-by:
Deepak S <deepak.s@linux.intel.com> Cc: stable@vger.kernel.org # c9c52e24: drm/i915/chv: Remove Wait ... Cc: stable@vger.kernel.org Signed-off-by:
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- 08 May, 2015 20 commits
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Daniel Vetter authored
Signed-off-by: -
Ville Syrjälä authored
Currently vlv_wait_port_ready() waits for all four lanes on the appropriate channel. This no longer works on CHV when the unused lanes may be power gated. So pass in a mask of lanes that the caller is expecting to be ready. Signed-off-by:
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Rebecca N. Palmer authored
i915_parse_cmds returns -EACCES on chained batches, which "tells the caller to abort and dispatch the workload as a non-secure batch", but the mechanism implementing that was broken when flags |= I915_DISPATCH_SECURE was moved from i915_gem_execbuffer_parse to i915_gem_do_execbuffer (17cabf57): i915_gem_execbuffer_parse returns the original batch_obj in this case, and i915_gem_do_execbuffer doesn't check for that. Don't set the secure bit in this case to make sure such batches don't run with elevated priviledges. Signed-off-by:
Rebecca Palmer <rebecca_palmer@zoho.com> Reviewed-by:
Mika Kuoppala <mika.kuoppala@intel.com> [danvet: Stitch together commit message. Also remove a comment as suggested by Mika. And style-align the comment while at it.] Signed-off-by:
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Daniel Vetter authored
Also treat it as a proper boolean. Cc: Todd Previte <tprevite@gmail.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: dri-devel@lists.freedesktop.org Signed-off-by: -
Joonas Lahtinen authored
We do not yet support tiled objects bigger than the mappable aperture size so reject them. Reported-by:
Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by:
Joonas Lahtinen <joonas.lahtinen@linux.intel.com> [danvet: Rework the check a bit to avoid warnings.] Signed-off-by:
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Ville Syrjälä authored
With recent hardware/firmware there don't appear to be any glitches on the other PHY when we toggle the cmnreset for the other PHY. So detangle the cmnlane power wells from one another and let them be controlled independently. This reverts commit 3dd7b974. Signed-off-by:
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Ville Syrjälä authored
Sometimes (exactly when is a bit unclear) DISPLAY_PHY_CONTROL appears to get corrupted. The values I've managed to read from it seem to have some pattern but vary quite a lot. The corruption doesn't seem to just happen when the register is accessed, but can also happen spontaneosly during modeset. When this happens during a modeset things go south and the display doesn't light up. I've managed to hit the problemn when toggling HDMI on port D on and off. When things get corrupted the display doesn't light up, but as soon as I manually write the correct value to the register the display comes up. First I was suspicious that we ourselves accidentally overwrite it with garbage, but didn't catch anything with the reg_rw tracepoint. Also I sprinkled check all over the modeset path to see exactly when the corruption happens, and eg. the read back value was fine just before intel_dp_set_m(), and corrupted immediately after it. I also made my check function repair the register value whenever it was wrong, and with this approach the corruption repeated several times during the modeset operation, always seeming to trigger in the same exact calls to the check function, while other calls to the function never caught anything. So far I've not seen this problem occurring when carefully avoiding all read accesses to DISPLAY_PHY_CONTROL. Not sure if that's just pure luck or an actual workaround, but we can hope it works. So let's avoid reading the register and instead track the desired value of the register in dev_priv. v2: Read out the power well state to determine initial register value v3: Use DPIO_CHx names instead of raw numbers Signed-off-by:
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Ville Syrjälä authored
Set up the chv display PHY lane stagger registers according to "Programming Guide for 1273 CHV eDP/DP/HDMI Display PHY" v1.04 Signed-off-by:
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Daniel Stone authored
Create a new global blob_lock mutex, which protects the blob property list from insertion and/or deletion. Signed-off-by:
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Daniel Stone authored
Introduce a common helper for the pattern of: - allocate new blob property - potentially free old blob property - replace content of indicative property with new blob ID - change member pointer on modeset object Signed-off-by:
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Jesse Barnes authored
Looks like it was introduced in: commit 650ad970 Author: Imre Deak <imre.deak@intel.com> Date: Fri Apr 18 16:35:02 2014 +0300 drm/i915: vlv: factor out vlv_force_gfx_clock and check for pending force-of but I'm not sure why. It has caused problems for us in the past (see 85250ddf "drm/i915/chv: Remove Wait for a previous gfx force-off" and 8d4eee9c "drm/i915: vlv: increase timeout when forcing on the GFX clock") and doesn't seem to be required, so let's just drop it. References: https://bugs.freedesktop.org/show_bug.cgi?id=89611Signed-off-by:
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Matt Roper authored
With the recent modeset internal rework, we wind up setting crtc_state->enable to false, but leave crtc_state->active as true, which is incorrect. This mismatch gets caught by drm_atomic_crtc_check() and causes subsequent atomic operations (such as plane updates while the CRTC is disabled) to fail. Bisect points to commit dad9a7d6d96630182fb52aae7c3856e9e7285e13 Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Date: Tue Apr 21 17:13:19 2015 +0300 drm/i915: Use atomic helpers for computing changed flags as the commit that actually triggers the regression. v2: Update to alter in-flight state rather than already-committed state (first version was accidentally based on a midpoint of Ander's modeset rework series, before his final patches that add proper state swapping to the legacy modeset path). Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Testcase: igt/kms_universal_plane Signed-off-by:Matt Roper <matthew.d.roper@intel.com> Reviewed-by:
Ander Conselvan de Oliveira <conselvan2@gmail.com> Signed-off-by:
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Damien Lespiau authored
A part of this function was indented with 2 tabs and 1 space instead of just 2 tabs. We're going to touch that code, so start by re-indenting it. Signed-off-by:
Damien Lespiau <damien.lespiau@intel.com> Signed-off-by:
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Joonas Lahtinen authored
Use partial view for huge BOs (bigger than half the mappable aperture) in fault handler so that they can be accessed withough trying to make room for them by evicting other objects. v2: - Only use partial views in the case where early rejection was previously done. - Account variable type changes from previous reroll. v3: - Add a comment about overwriting existing page entries. (Tvrtko Ursulin) - Whitespace fixes. Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Signed-off-by:
Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by:
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Joonas Lahtinen authored
Partial view type allows manipulating parts of huge BOs through the GGTT, which was not previously possible due to constraint that whole object had to be mapped for any access to it through GGTT. v2: - Retain error value from sg_alloc_table (Tvrtko Ursulin) - Do not zero already zeroed variable (Tvrtko Ursulin) - Use more common variable types for page size/offset (Tvrtko Ursulin) v3: - Only compare additional view parameters when need to (Tvrtko Ursulin) v4: - Do zero out the variable that needs to be (bug introduced in v2). Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by:
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Joonas Lahtinen authored
Do not skip special GGTT views when considering whether an object is pinned or not. Wrong behaviour was introduced in; commit ec7adb6e Author: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Date: Mon Mar 16 14:11:13 2015 +0200 drm/i915: Do not use ggtt_view with (aliasing) PPGTT Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Signed-off-by:
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Joonas Lahtinen authored
GGTT VMA sizes might be smaller than the whole object size due to different GGTT views. v2: - Separate GGTT view constraint calculations from normal view constraint calculations (Chris Wilson) v3: - Do not bother with debug wording. (Tvrtko Ursulin) v4: - Clearer logic for calculating map_and_fenceable (Tvrtko Ursulin) Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by:
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Nick Hoath authored
Signed-off-by:
Nick Hoath <nicholas.hoath@intel.com> Reviewed-by:
Imre Deak <imre.deak@intel.com> Signed-off-by:
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Nick Hoath authored
Signed-off-by:
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Nick Hoath authored
Signed-off-by:
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